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| author | twinaphex | 2014-12-10 17:27:18 +0100 |
|---|---|---|
| committer | twinaphex | 2014-12-10 17:27:18 +0100 |
| commit | 82731290ee4e162fb040ee34337405e544e2e0ac (patch) | |
| tree | fc298a3b65b27c26ce8c1eba55c641d663ef7476 /cpu_threaded.c | |
| parent | 75cffe81f22426c10d5bd506efc0045b9c7e0867 (diff) | |
| download | picogpsp-82731290ee4e162fb040ee34337405e544e2e0ac.tar.gz picogpsp-82731290ee4e162fb040ee34337405e544e2e0ac.tar.bz2 picogpsp-82731290ee4e162fb040ee34337405e544e2e0ac.zip | |
We don't need to get rid of idle loop patching for non-dynarec
core
Diffstat (limited to 'cpu_threaded.c')
| -rw-r--r-- | cpu_threaded.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/cpu_threaded.c b/cpu_threaded.c index 99887ec..36a188a 100644 --- a/cpu_threaded.c +++ b/cpu_threaded.c @@ -48,13 +48,7 @@ u32 ewram_code_max = 0xFFFFFFFF; u32 *rom_branch_hash[ROM_BRANCH_HASH_SIZE]; // Default -#ifdef HAVE_DYNAREC -u32 idle_loop_target_pc = 0xFFFFFFFF; -u32 iwram_stack_optimize = 1; -#endif u32 force_pc_update_target = 0xFFFFFFFF; -u32 translation_gate_target_pc[MAX_TRANSLATION_GATES]; -u32 translation_gate_targets = 0; u32 allow_smc_ram_u8 = 1; u32 allow_smc_ram_u16 = 1; u32 allow_smc_ram_u32 = 1; |