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authorDavid Guillen Fandos2021-03-12 17:59:36 +0100
committerDavid Guillen Fandos2021-03-12 18:05:48 +0100
commit1e8097ac79bd9026e6dd2d0046a687b8d7bec1aa (patch)
tree53dfc26767e50bb74a34870b19e91f942101c1ab /psp
parent462f0e97843fad1e05b72e4512c99bef3347303d (diff)
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Improve and simplify dynarec JIT area.
Also fix a regression on VITA. Use gcc/OS cache flushing routines for MIPS32 instead of synci
Diffstat (limited to 'psp')
-rw-r--r--psp/mips_stub.S18
1 files changed, 1 insertions, 17 deletions
diff --git a/psp/mips_stub.S b/psp/mips_stub.S
index 7f0f303..1b76753 100644
--- a/psp/mips_stub.S
+++ b/psp/mips_stub.S
@@ -2808,24 +2808,8 @@ execute_arm_translate:
jr $2 # jump to return
nop
-# This is only to be used with MIPS32
-# $4: start location
-# $5: length
-
-icache_region_sync:
- ins $4, $0, 0, 6 # align to 64 bytes
- addiu $2, $5, 63 # align up to 64 bytes
- srl $2, $2, 6 # divide by 64
-
-1:
- synci ($4) # sync caches
- addiu $2, $2, -1 # next loop iteration
- bne $2, $0, 1b # loop
- addiu $4, $4, 64 # go to next cache line (delay slot)
-
- jr $ra # return
- nop
+.data:
memory_map_read:
.space 0x8000