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author | David Guillen Fandos | 2021-05-07 20:41:54 +0200 |
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committer | David Guillen Fandos | 2021-05-07 20:41:54 +0200 |
commit | 37430f22c5234cb09f2325575806b830f947bf8a (patch) | |
tree | 715e87726e9c9e6c7aec3d7d1e7faf259f6874eb /psp | |
parent | 7877a8888b4e607c3df77c5d5f47e2c880cb9a24 (diff) | |
download | picogpsp-37430f22c5234cb09f2325575806b830f947bf8a.tar.gz picogpsp-37430f22c5234cb09f2325575806b830f947bf8a.tar.bz2 picogpsp-37430f22c5234cb09f2325575806b830f947bf8a.zip |
Small optimization (~2-4%) and whitespace cleanup!
Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.
Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
Diffstat (limited to 'psp')
-rw-r--r-- | psp/mips_emit.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/psp/mips_emit.h b/psp/mips_emit.h index aa00d86..3f70f13 100644 --- a/psp/mips_emit.h +++ b/psp/mips_emit.h @@ -535,14 +535,14 @@ u32 arm_to_mips_reg[] = #define generate_load_pc(ireg, new_pc) \ { \ - s32 pc_delta = new_pc - stored_pc; \ + s32 pc_delta = (new_pc) - (stored_pc); \ if((pc_delta >= -32768) && (pc_delta <= 32767)) \ { \ mips_emit_addiu(ireg, reg_pc, pc_delta); \ } \ else \ { \ - generate_load_imm(ireg, new_pc); \ + generate_load_imm(ireg, (new_pc)); \ } \ } \ @@ -1697,6 +1697,9 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address) arm_psr_##transfer_type(op_type, psr_reg); \ } \ +#define thumb_load_pc_pool_const(rd, value) \ + generate_load_imm(arm_to_mips_reg[rd], (value)); \ + #define arm_access_memory_load(mem_type) \ cycle_count += 2; \ mips_emit_jal(mips_absolute_offset(execute_load_##mem_type)); \ |