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| author | David Guillen Fandos | 2021-03-25 21:02:06 +0100 |
|---|---|---|
| committer | David Guillen Fandos | 2021-03-26 23:13:26 +0100 |
| commit | a494a3f00ee3bd35ee9ab76f8cd4f164da080113 (patch) | |
| tree | 8d8002c0aa696e8feac09afcd9b3ce8247507ef4 /psp | |
| parent | 53cc4a2475ebc8cc510dc97fe8db95939230cee9 (diff) | |
| download | picogpsp-a494a3f00ee3bd35ee9ab76f8cd4f164da080113.tar.gz picogpsp-a494a3f00ee3bd35ee9ab76f8cd4f164da080113.tar.bz2 picogpsp-a494a3f00ee3bd35ee9ab76f8cd4f164da080113.zip | |
Move OAM update flag to a register
Fix a small bug in MIPS dynarec that affects non -G0 targets
Diffstat (limited to 'psp')
| -rw-r--r-- | psp/mips_emit.h | 8 | ||||
| -rw-r--r-- | psp/mips_stub.S | 4 |
2 files changed, 7 insertions, 5 deletions
diff --git a/psp/mips_emit.h b/psp/mips_emit.h index b996f2b..d24c174 100644 --- a/psp/mips_emit.h +++ b/psp/mips_emit.h @@ -2512,7 +2512,8 @@ u8 swi_hle_handle[256] = #define ReOff_SaveR1 (21*4) // 3 save scratch regs #define ReOff_SaveR2 (22*4) #define ReOff_SaveR3 (23*4) -#define ReOff_GP_Save (32*4) // GP_SAVE +#define ReOff_OamUpd (33*4) // OAM_UPDATED +#define ReOff_GP_Save (34*4) // GP_SAVE // Saves all regs to their right slot and loads gp #define emit_save_regs(save_a2) { \ @@ -2873,9 +2874,8 @@ static void emit_pmemst_stub( // Post processing store: // Signal that OAM was updated if (region == 7) { - u32 palcaddr = (u32)&oam_update; - mips_emit_lui(reg_temp, ((palcaddr + 0x8000) >> 16)); - mips_emit_sw(reg_base, reg_temp, palcaddr & 0xffff); // Write any nonzero data + // Write any nonzero data + mips_emit_sw(reg_base, reg_base, ReOff_OamUpd); generate_function_return_swap_delay(); } else { diff --git a/psp/mips_stub.S b/psp/mips_stub.S index 3d046d8..cc3a220 100644 --- a/psp/mips_stub.S +++ b/psp/mips_stub.S @@ -52,6 +52,7 @@ .global reg .global spsr .global reg_mode +.global oam_update # MIPS register layout: @@ -116,7 +117,8 @@ .equ CPU_HALT_STATE, (30 * 4) .equ CHANGED_PC_STATUS, (31 * 4) .equ COMPLETED_FRAME, (32 * 4) -.equ GP_SAVE, (33 * 4) +.equ OAM_UPDATED, (33 * 4) +.equ GP_SAVE, (34 * 4) .equ SPSR_BASE, (0x900) .equ REGMODE_BASE, (0x900 + 24) |