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authorhizzlekizzle2019-10-22 15:19:04 -0500
committerGitHub2019-10-22 15:19:04 -0500
commita6d35e0165e270e7fc760b9a559a57ca9318ec11 (patch)
treecc0ddb321febbce3925d404b7340da7704dfe582 /psp
parent24af89596e6484ff5a7a08efecfa8288cfbc02f3 (diff)
parenta60de42f3a7fba8e22d5b2a602a035c68ea4223c (diff)
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Merge pull request #56 from bmaupin/enable-psp-dynarec
Reenable dynarec for PSP
Diffstat (limited to 'psp')
-rw-r--r--psp/mips_emit.h17
-rw-r--r--psp/mips_stub.S14
2 files changed, 25 insertions, 6 deletions
diff --git a/psp/mips_emit.h b/psp/mips_emit.h
index f2ab1e8..9510156 100644
--- a/psp/mips_emit.h
+++ b/psp/mips_emit.h
@@ -1553,9 +1553,13 @@ typedef enum
#define arm_generate_op_imm(name, load_op) \
arm_decode_data_proc_imm(opcode); \
+ ror(imm, imm, imm_ror); \
arm_op_check_##load_op(); \
generate_op_##name##_imm(arm_to_mips_reg[rd], arm_to_mips_reg[rn]) \
+#define arm_generate_op_imm_flags(name, load_op) \
+ arm_generate_op_imm(name, load_op) \
+
#define arm_data_proc(name, type, flags_op) \
{ \
arm_generate_op_##type(name, yes); \
@@ -2137,10 +2141,16 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
mips_emit_addiu(arm_to_mips_reg[_rd], reg_r13, (imm * 4)); \
} \
-#define thumb_adjust_sp(value) \
+#define thumb_adjust_sp_up() \
+ mips_emit_addiu(reg_r13, reg_r13, (imm * 4)); \
+
+#define thumb_adjust_sp_down() \
+ mips_emit_addiu(reg_r13, reg_r13, -(imm * 4)); \
+
+#define thumb_adjust_sp(direction) \
{ \
thumb_decode_add_sp(); \
- mips_emit_addiu(reg_r13, reg_r13, (value)); \
+ thumb_adjust_sp_##direction(); \
} \
// Decode types: shift, alu_op
@@ -2203,6 +2213,9 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
#define thumb_access_memory_generate_address_reg_imm(offset, reg_rb, reg_ro) \
mips_emit_addiu(reg_a0, arm_to_mips_reg[reg_rb], (offset)) \
+#define thumb_access_memory_generate_address_reg_imm_sp(offset, reg_rb, reg_ro) \
+ mips_emit_addiu(reg_a0, arm_to_mips_reg[reg_rb], (offset * 4)) \
+
#define thumb_access_memory_generate_address_reg_reg(offset, reg_rb, reg_ro) \
mips_emit_addu(reg_a0, arm_to_mips_reg[reg_rb], arm_to_mips_reg[reg_ro]) \
diff --git a/psp/mips_stub.S b/psp/mips_stub.S
index aaef70b..dd91ea8 100644
--- a/psp/mips_stub.S
+++ b/psp/mips_stub.S
@@ -3343,8 +3343,13 @@ ror_zero_shift:
execute_arm_translate:
addu $17, $4, $0 # load cycle counter register
- lui $16, %hi(reg) # load base register
- addiu $16, %lo(reg)
+
+ lui $4, %hi(arm_reg) # load arm_reg address into $4
+ addiu $4, %lo(arm_reg)
+
+ jal move_reg # update reg to point to arm_reg
+ addu $16, $4, $0 # copy address of arm_reg into $16
+
extract_flags # load flag variables
and $1, $1, 0x20 # see if Thumb bit is set in flags
@@ -3405,9 +3410,10 @@ iac_loop:
memory_map_read:
.space 0x8000
-reg:
+# This must be between memory_map_read and memory_map_write because it's used
+# to calculate their addresses elsewhere in this file.
+arm_reg:
.space 0x100
memory_map_write:
.space 0x8000
-