diff options
| -rw-r--r-- | .gitlab-ci.yml | 30 | ||||
| -rw-r--r-- | Makefile | 8 | ||||
| -rw-r--r-- | cheats.c | 2 | ||||
| -rw-r--r-- | common.h | 16 | ||||
| -rw-r--r-- | cpu.c | 26 | ||||
| -rw-r--r-- | gba_memory.c | 199 | ||||
| -rw-r--r-- | gba_memory.h | 13 | ||||
| -rw-r--r-- | input.c | 4 | ||||
| -rw-r--r-- | main.c | 22 | ||||
| -rw-r--r-- | sound.c | 4 | ||||
| -rw-r--r-- | video.c | 267 |
11 files changed, 326 insertions, 265 deletions
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index fdbedc4..62b38e9 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -63,6 +63,18 @@ include: - project: 'libretro-infrastructure/ci-templates'
file: '/ctr-static.yml'
+ # Nintendo GameCube
+ - project: 'libretro-infrastructure/ci-templates'
+ file: '/ngc-static.yml'
+
+ # Nintendo Wii
+ - project: 'libretro-infrastructure/ci-templates'
+ file: '/wii-static.yml'
+
+ # Nintendo WiiU
+ - project: 'libretro-infrastructure/ci-templates'
+ file: '/wiiu-static.yml'
+
# Nintendo Switch
- project: 'libretro-infrastructure/ci-templates'
file: '/libnx-static.yml'
@@ -174,6 +186,24 @@ libretro-build-ctr: - .libretro-ctr-static-retroarch-master
- .core-defs
+# Nintendo GameCube
+libretro-build-ngc:
+ extends:
+ - .libretro-ngc-static-retroarch-master
+ - .core-defs
+
+# Nintendo Wii
+libretro-build-wii:
+ extends:
+ - .libretro-wii-static-retroarch-master
+ - .core-defs
+
+# Nintendo WiiU
+libretro-build-wiiu:
+ extends:
+ - .libretro-wiiu-static-retroarch-master
+ - .core-defs
+
# OpenDingux
libretro-build-dingux-mips32:
extends:
@@ -195,6 +195,14 @@ else ifeq ($(platform), switch) include $(LIBTRANSISTOR_HOME)/libtransistor.mk STATIC_LINKING=1 +# Nintendo Game Cube / Wii / WiiU +else ifneq (,$(filter $(platform), ngc wii wiiu)) + TARGET := $(TARGET_NAME)_libretro_$(platform).a + CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT) + AR = $(DEVKITPPC)/bin/powerpc-eabi-ar$(EXE_EXT) + CFLAGS += -DGEKKO -mcpu=750 -meabi -mhard-float -DHAVE_STRTOF_L + STATIC_LINKING = 1 + # PSP else ifeq ($(platform), psp1) TARGET := $(TARGET_NAME)_libretro_$(platform).a @@ -190,7 +190,7 @@ void process_cheats(void) if(!cheats[i].cheat_active) continue; - process_cheat_codebreaker(&cheats[i], 0x3ff ^ io_registers[REG_P1]); + process_cheat_codebreaker(&cheats[i], 0x3ff ^ read_ioreg(REG_P1)); } } @@ -124,6 +124,22 @@ typedef u32 fixed8_24; #define address32(base, offset) \ *((u32 *)((u8 *)base + (offset))) \ +#define eswap8(value) (value) +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ + #define eswap16(value) __builtin_bswap16(value) + #define eswap32(value) __builtin_bswap32(value) +#else + #define eswap16(value) (value) + #define eswap32(value) (value) +#endif + +#define readaddress8(base, offset) eswap8( address8( base, offset)) +#define readaddress16(base, offset) eswap16(address16(base, offset)) +#define readaddress32(base, offset) eswap32(address32(base, offset)) + +#define read_ioreg(regnum) (eswap16(io_registers[(regnum)])) +#define write_ioreg(regnum, val) io_registers[(regnum)] = eswap16(val) + #include <unistd.h> #include <time.h> #include <stdlib.h> @@ -721,8 +721,8 @@ u32 high_frequency_branch_targets = 0; // probably not worth optimizing for. #define check_for_interrupts() \ - if((io_registers[REG_IE] & io_registers[REG_IF]) && \ - io_registers[REG_IME] && ((reg[REG_CPSR] & 0x80) == 0)) \ + if((read_ioreg(REG_IE) & read_ioreg(REG_IF)) && \ + read_ioreg(REG_IME) && ((reg[REG_CPSR] & 0x80) == 0)) \ { \ reg_mode[MODE_IRQ][6] = reg[REG_PC] + 4; \ spsr[MODE_IRQ] = reg[REG_CPSR]; \ @@ -945,10 +945,10 @@ const u32 psr_masks[16] = #define aligned_address_mask16 0xF0000001 #define aligned_address_mask32 0xF0000003 -#define fast_read_memory(size, type, address, dest) \ +#define fast_read_memory(size, type, addr, dest) \ { \ u8 *map; \ - u32 _address = address; \ + u32 _address = addr; \ \ if(_address < 0x10000000) \ { \ @@ -964,7 +964,7 @@ const u32 psr_masks[16] = if(((_address & aligned_address_mask##size) == 0) && \ (map = memory_map_read[_address >> 15])) \ { \ - dest = *((type *)((u8 *)map + (_address & 0x7FFF))); \ + dest = (type)readaddress##size(map, (_address & 0x7FFF)); \ } \ else \ { \ @@ -984,7 +984,7 @@ const u32 psr_masks[16] = if(((_address & aligned_address_mask16) == 0) && \ (map = memory_map_read[_address >> 15])) \ { \ - dest = *((s16 *)((u8 *)map + (_address & 0x7FFF))); \ + dest = (s16)readaddress16(map, (_address & 0x7FFF)); \ } \ else \ { \ @@ -1018,7 +1018,7 @@ const u32 psr_masks[16] = } \ if(_address < 0x10000000 && map) \ { \ - dest = address32(map, _address & 0x7FFF); \ + dest = readaddress32(map, _address & 0x7FFF); \ } \ else \ { \ @@ -1123,10 +1123,10 @@ const u32 psr_masks[16] = #define arm_block_writeback_no(access_type) \ #define load_block_memory(address, dest) \ - dest = address32(address_region, (address + offset) & 0x7FFF) \ + dest = readaddress32(address_region, (address + offset) & 0x7FFF) \ #define store_block_memory(address, dest) \ - address32(address_region, (address + offset) & 0x7FFF) = dest \ + address32(address_region, (address + offset) & 0x7FFF) = eswap32(dest) \ #define arm_block_memory_offset_down_a() \ (base - (word_bit_count(reg_list) * 4) + 4) \ @@ -1601,9 +1601,9 @@ void raise_interrupt(irq_type irq_raised) { // The specific IRQ must be enabled in IE, master IRQ enable must be on, // and it must be on in the flags. - io_registers[REG_IF] |= irq_raised; + write_ioreg(REG_IF, read_ioreg(REG_IF) | irq_raised); - if((io_registers[REG_IE] & irq_raised) && io_registers[REG_IME] && + if((read_ioreg(REG_IE) & irq_raised) && read_ioreg(REG_IME) && ((reg[REG_CPSR] & 0x80) == 0)) { bios_read_protect = 0xe55ec002; @@ -1681,7 +1681,7 @@ arm_loop: using_instruction(arm); check_pc_region(); pc &= ~0x03; - opcode = address32(pc_address_block, (pc & 0x7FFF)); + opcode = readaddress32(pc_address_block, (pc & 0x7FFF)); condition = opcode >> 28; switch(condition) @@ -3256,7 +3256,7 @@ thumb_loop: using_instruction(thumb); check_pc_region(); pc &= ~0x01; - opcode = address16(pc_address_block, (pc & 0x7FFF)); + opcode = readaddress16(pc_address_block, (pc & 0x7FFF)); switch((opcode >> 8) & 0xFF) { diff --git a/gba_memory.c b/gba_memory.c index af94585..4376cf8 100644 --- a/gba_memory.c +++ b/gba_memory.c @@ -35,7 +35,7 @@ gbc_sound_channel[channel].envelope_status = (envelope_ticks != 0); \ gbc_sound_channel[channel].envelope_volume = initial_volume; \ gbc_sound_update = 1; \ - address16(io_registers, address) = value; \ + address16(io_registers, address) = eswap16(value); \ } \ #define gbc_sound_tone_control_high(channel, address) \ @@ -56,7 +56,7 @@ } \ \ gbc_sound_update = 1; \ - address16(io_registers, address) = value; \ + address16(io_registers, address) = eswap16(value); \ } \ #define gbc_sound_tone_control_sweep() \ @@ -68,7 +68,7 @@ gbc_sound_channel[0].sweep_ticks = sweep_ticks; \ gbc_sound_channel[0].sweep_initial_ticks = sweep_ticks; \ gbc_sound_update = 1; \ - address16(io_registers, 0x60) = value; \ + write_ioreg(REG_SOUND1CNT_L, value); \ } \ #define gbc_sound_wave_control() \ @@ -80,7 +80,7 @@ gbc_sound_channel[2].master_enable = 1; \ \ gbc_sound_update = 1; \ - address16(io_registers, 0x70) = value; \ + write_ioreg(REG_SOUND3CNT_L, value); \ } \ static u32 gbc_sound_wave_volume[4] = { 0, 16384, 8192, 4096 }; @@ -94,7 +94,7 @@ static u32 gbc_sound_wave_volume[4] = { 0, 16384, 8192, 4096 }; gbc_sound_channel[2].wave_volume = \ gbc_sound_wave_volume[(value >> 13) & 0x03]; \ gbc_sound_update = 1; \ - address16(io_registers, 0x72) = value; \ + write_ioreg(REG_SOUND3CNT_H, value); \ } \ #define gbc_sound_tone_control_high_wave() \ @@ -110,7 +110,7 @@ static u32 gbc_sound_wave_volume[4] = { 0, 16384, 8192, 4096 }; gbc_sound_channel[2].active_flag = 1; \ } \ gbc_sound_update = 1; \ - address16(io_registers, 0x74) = value; \ + write_ioreg(REG_SOUND3CNT_X, value); \ } \ #define gbc_sound_noise_control() \ @@ -141,7 +141,7 @@ static u32 gbc_sound_wave_volume[4] = { 0, 16384, 8192, 4096 }; gbc_sound_channel[3].envelope_initial_volume; \ } \ gbc_sound_update = 1; \ - address16(io_registers, 0x7C) = value; \ + write_ioreg(REG_SOUND4CNT_H, value); \ } \ static void gbc_trigger_sound(u32 value) @@ -156,7 +156,7 @@ static void gbc_trigger_sound(u32 value) gbc_sound_channel[channel].status = ((value >> (channel + 8)) & 0x01) | ((value >> (channel + 11)) & 0x03); } - address16(io_registers, 0x80) = value; + write_ioreg(REG_SOUNDCNT_L, value); } #define trigger_sound() \ @@ -175,7 +175,7 @@ static void gbc_trigger_sound(u32 value) sound_reset_fifo(0); \ if((value >> 15) & 0x01) \ sound_reset_fifo(1); \ - address16(io_registers, 0x82) = value; \ + write_ioreg(REG_SOUNDCNT_H, value); \ } \ static void sound_control_x(u32 value) @@ -193,8 +193,8 @@ static void sound_control_x(u32 value) sound_on = 0; } - address16(io_registers, 0x84) = - (address16(io_registers, 0x84) & 0x000F) | (value & 0xFFF0); + address16(io_registers, 0x84) = eswap16( + (readaddress16(io_registers, 0x84) & 0x000F) | (value & 0xFFF0)); } #define sound_update_frequency_step(timer_number) \ @@ -238,7 +238,7 @@ static void trigger_timer(u32 timer_number, u32 value) timer[timer_number].prescale = prescale; timer[timer_number].irq = (value >> 6) & 0x01; - address16(io_registers, 0x100 + (timer_number * 4)) = -timer_reload; + write_ioreg(REG_TM0D + (timer_number * 2), (u32)(-timer_reload)); timer_reload <<= prescale; timer[timer_number].count = timer_reload; @@ -266,7 +266,7 @@ static void trigger_timer(u32 timer_number, u32 value) timer[timer_number].stop_cpu_ticks = cpu_ticks; } } - address16(io_registers, 0x102 + (timer_number * 4)) = value; + write_ioreg(REG_TM0CNT + (timer_number * 2), value); } // This table is configured for sequential access on system defaults @@ -458,7 +458,7 @@ void function_cc write_eeprom(u32 unused_address, u32 value) if(eeprom_size == EEPROM_512_BYTE) { eeprom_address = - (address16(eeprom_buffer, 0) >> 2) * 8; + (readaddress16(eeprom_buffer, 0) >> 2) * 8; } else { @@ -508,10 +508,10 @@ void function_cc write_eeprom(u32 unused_address, u32 value) u32 gamepak_index = address >> 15; \ u8 *map = memory_map_read[gamepak_index]; \ \ - if(!map) \ + if(!map) \ map = load_gamepak_page(gamepak_index & 0x3FF); \ \ - value = address##type(map, address & 0x7FFF) \ + value = readaddress##type(map, address & 0x7FFF) \ #define read_open8() \ if(!(reg[REG_CPSR] & 0x20)) \ @@ -580,29 +580,29 @@ u32 function_cc read_eeprom(void) case 0x00: \ /* BIOS */ \ if(reg[REG_PC] >= 0x4000) \ - value = address##type(&bios_read_protect, address & 0x03); \ + value = readaddress##type(&bios_read_protect, address & 0x03); \ else \ - value = address##type(bios_rom, address & 0x3FFF); \ + value = readaddress##type(bios_rom, address & 0x3FFF); \ break; \ \ case 0x02: \ /* external work RAM */ \ - value = address##type(ewram, (address & 0x3FFFF)); \ + value = readaddress##type(ewram, (address & 0x3FFFF)); \ break; \ \ case 0x03: \ /* internal work RAM */ \ - value = address##type(iwram, (address & 0x7FFF) + 0x8000); \ + value = readaddress##type(iwram, (address & 0x7FFF) + 0x8000); \ break; \ \ case 0x04: \ /* I/O registers */ \ - value = address##type(io_registers, address & 0x3FF); \ + value = readaddress##type(io_registers, address & 0x3FF); \ break; \ \ case 0x05: \ /* palette RAM */ \ - value = address##type(palette_ram, address & 0x3FF); \ + value = readaddress##type(palette_ram, address & 0x3FF); \ break; \ \ case 0x06: \ @@ -611,12 +611,12 @@ u32 function_cc read_eeprom(void) if(address > 0x18000) \ address -= 0x8000; \ \ - value = address##type(vram, address); \ + value = readaddress##type(vram, address); \ break; \ \ case 0x07: \ /* OAM RAM */ \ - value = address##type(oam_ram, address & 0x3FF); \ + value = readaddress##type(oam_ram, address & 0x3FF); \ break; \ \ case 0x08: \ @@ -660,12 +660,12 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value) if(dma[dma_number].start_type == DMA_INACTIVE) { u32 start_type = (value >> 12) & 0x03; - u32 dest_address = address32(io_registers, (dma_number * 12) + 0xB4) & + u32 dest_address = readaddress32(io_registers, (dma_number * 12) + 0xB4) & 0xFFFFFFF; dma[dma_number].dma_channel = dma_number; dma[dma_number].source_address = - address32(io_registers, (dma_number * 12) + 0xB0) & 0xFFFFFFF; + readaddress32(io_registers, (dma_number * 12) + 0xB0) & 0xFFFFFFF; dma[dma_number].dest_address = dest_address; dma[dma_number].source_direction = (value >> 7) & 0x03; dma[dma_number].repeat_type = (value >> 9) & 0x01; @@ -686,7 +686,7 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value) } else { - u32 length = address16(io_registers, (dma_number * 12) + 0xB8); + u32 length = read_ioreg(REG_DMA0CNT_L + (dma_number * 6)); if((dma_number == 3) && ((dest_address >> 24) == 0x0D) && ((length & 0x1F) == 17)) @@ -708,7 +708,7 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value) dma[dma_number].dest_direction = (value >> 5) & 0x03; } - address16(io_registers, (dma_number * 12) + 0xBA) = value; + write_ioreg(REG_DMA0CNT_H + (dma_number * 6), value); if(start_type == DMA_START_IMMEDIATELY) return dma_transfer(dma + dma_number); } @@ -717,7 +717,7 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value) { dma[dma_number].start_type = DMA_INACTIVE; dma[dma_number].direct_sound_channel = DMA_NO_DIRECT_SOUND; - address16(io_registers, (dma_number * 12) + 0xBA) = value; + write_ioreg(REG_DMA0CNT_H + (dma_number * 6), value); } return CPU_ALERT_NONE; @@ -731,10 +731,10 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value) value = ((address8(io_registers, address + 1)) << 8) | value \ #define access_register16_high(address) \ - value = (value << 16) | (address16(io_registers, address)) \ + value = (value << 16) | (readaddress16(io_registers, address)) \ #define access_register16_low(address) \ - value = ((address16(io_registers, address + 2)) << 16) | value \ + value = ((readaddress16(io_registers, address + 2)) << 16) | value \ cpu_alert_type function_cc write_io_register8(u32 address, u32 value) { @@ -743,7 +743,7 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value) { case 0x00: { - u32 dispcnt = io_registers[REG_DISPCNT]; + u32 dispcnt = read_ioreg(REG_DISPCNT); if((value & 0x07) != (dispcnt & 0x07)) reg[OAM_UPDATED] = 1; @@ -768,28 +768,28 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value) access_register8_low(0x28); access_register16_low(0x28); affine_reference_x[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x28) = value; + address32(io_registers, 0x28) = eswap32(value); break; case 0x29: access_register8_high(0x28); access_register16_low(0x28); affine_reference_x[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x28) = value; + address32(io_registers, 0x28) = eswap32(value); break; case 0x2A: access_register8_low(0x2A); access_register16_high(0x28); affine_reference_x[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x28) = value; + address32(io_registers, 0x28) = eswap32(value); break; case 0x2B: access_register8_high(0x2A); access_register16_high(0x28); affine_reference_x[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x28) = value; + address32(io_registers, 0x28) = eswap32(value); break; // BG2 reference Y @@ -797,28 +797,28 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value) access_register8_low(0x2C); access_register16_low(0x2C); affine_reference_y[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x2C) = value; + address32(io_registers, 0x2C) = eswap32(value); break; case 0x2D: access_register8_high(0x2C); access_register16_low(0x2C); affine_reference_y[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x2C) = value; + address32(io_registers, 0x2C) = eswap32(value); break; case 0x2E: access_register8_low(0x2E); access_register16_high(0x2C); affine_reference_y[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x2C) = value; + address32(io_registers, 0x2C) = eswap32(value); break; case 0x2F: access_register8_high(0x2E); access_register16_high(0x2C); affine_reference_y[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x2C) = value; + address32(io_registers, 0x2C) = eswap32(value); break; // BG3 reference X @@ -826,28 +826,28 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value) access_register8_low(0x38); access_register16_low(0x38); affine_reference_x[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x38) = value; + address32(io_registers, 0x38) = eswap32(value); break; case 0x39: access_register8_high(0x38); access_register16_low(0x38); affine_reference_x[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x38) = value; + address32(io_registers, 0x38) = eswap32(value); break; case 0x3A: access_register8_low(0x3A); access_register16_high(0x38); affine_reference_x[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x38) = value; + address32(io_registers, 0x38) = eswap32(value); break; case 0x3B: access_register8_high(0x3A); access_register16_high(0x38); affine_reference_x[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x38) = value; + address32(io_registers, 0x38) = eswap32(value); break; // BG3 reference Y @@ -855,28 +855,28 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value) access_register8_low(0x3C); access_register16_low(0x3C); affine_reference_y[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x3C) = value; + address32(io_registers, 0x3C) = eswap32(value); break; case 0x3D: access_register8_high(0x3C); access_register16_low(0x3C); affine_reference_y[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x3C) = value; + address32(io_registers, 0x3C) = eswap32(value); break; case 0x3E: access_register8_low(0x3E); access_register16_high(0x3C); affine_reference_y[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x3C) = value; + address32(io_registers, 0x3C) = eswap32(value); break; case 0x3F: access_register8_high(0x3E); access_register16_high(0x3C); affine_reference_y[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x3C) = value; + address32(io_registers, 0x3C) = eswap32(value); break; // Sound 1 control sweep @@ -1160,18 +1160,17 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value) { case 0x00: { - u32 dispcnt = io_registers[REG_DISPCNT]; + u32 dispcnt = read_ioreg(REG_DISPCNT); if((value & 0x07) != (dispcnt & 0x07)) reg[OAM_UPDATED] = 1; - address16(io_registers, 0x00) = value; + write_ioreg(REG_DISPCNT, value); break; } // DISPSTAT case 0x04: - address16(io_registers, 0x04) = - (address16(io_registers, 0x04) & 0x07) | (value & ~0x07); + write_ioreg(REG_DISPSTAT, (read_ioreg(REG_DISPSTAT) & 0x07) | (value & ~0x07)); break; // VCOUNT @@ -1182,26 +1181,26 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value) case 0x28: access_register16_low(0x28); affine_reference_x[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x28) = value; + address32(io_registers, 0x28) = eswap32(value); break; case 0x2A: access_register16_high(0x28); affine_reference_x[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x28) = value; + address32(io_registers, 0x28) = eswap32(value); break; // BG2 reference Y case 0x2C: access_register16_low(0x2C); affine_reference_y[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x2C) = value; + address32(io_registers, 0x2C) = eswap32(value); break; case 0x2E: access_register16_high(0x2C); affine_reference_y[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x2C) = value; + address32(io_registers, 0x2C) = eswap32(value); break; // BG3 reference X @@ -1209,26 +1208,26 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value) case 0x38: access_register16_low(0x38); affine_reference_x[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x38) = value; + address32(io_registers, 0x38) = eswap32(value); break; case 0x3A: access_register16_high(0x38); affine_reference_x[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x38) = value; + address32(io_registers, 0x38) = eswap32(value); break; // BG3 reference Y case 0x3C: access_register16_low(0x3C); affine_reference_y[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x3C) = value; + address32(io_registers, 0x3C) = eswap32(value); break; case 0x3E: access_register16_high(0x3C); affine_reference_y[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x3C) = value; + address32(io_registers, 0x3C) = eswap32(value); break; // Sound 1 control sweep @@ -1313,7 +1312,7 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value) case 0x9D: case 0x9E: gbc_sound_wave_update = 1; - address16(io_registers, address) = value; + address16(io_registers, address) = eswap16(value); break; // Sound FIFO A @@ -1382,7 +1381,7 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value) // Interrupt flag case 0x202: - address16(io_registers, 0x202) &= ~value; + write_ioreg(REG_IF, read_ioreg(REG_IF) & (~value)); break; // WAITCNT @@ -1399,7 +1398,7 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value) return CPU_ALERT_HALT; default: - address16(io_registers, address) = value; + address16(io_registers, address) = eswap16(value); break; } @@ -1414,25 +1413,25 @@ cpu_alert_type function_cc write_io_register32(u32 address, u32 value) // BG2 reference X case 0x28: affine_reference_x[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x28) = value; + address32(io_registers, 0x28) = eswap32(value); break; // BG2 reference Y case 0x2C: affine_reference_y[0] = (s32)(value << 4) >> 4; - address32(io_registers, 0x2C) = value; + address32(io_registers, 0x2C) = eswap32(value); break; // BG3 reference X case 0x38: affine_reference_x[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x38) = value; + address32(io_registers, 0x38) = eswap32(value); break; // BG3 reference Y case 0x3C: affine_reference_y[1] = (s32)(value << 4) >> 4; - address32(io_registers, 0x3C) = value; + address32(io_registers, 0x3C) = eswap32(value); break; // Sound FIFO A @@ -1468,7 +1467,7 @@ cpu_alert_type function_cc write_io_register32(u32 address, u32 value) #define write_palette16(address, value) \ { \ u32 palette_address = address; \ - address16(palette_ram, palette_address) = value; \ + address16(palette_ram, palette_address) = eswap16(value); \ convert_palette(value); \ address16(palette_ram_converted, palette_address) = value; \ } \ @@ -1478,11 +1477,11 @@ cpu_alert_type function_cc write_io_register32(u32 address, u32 value) u32 palette_address = address; \ u32 value_high = value >> 16; \ u32 value_low = value & 0xFFFF; \ - address32(palette_ram, palette_address) = value; \ + address32(palette_ram, palette_address) = eswap32(value); \ convert_palette(value_high); \ + address16(palette_ram_converted, palette_address + 2) = value_high; \ convert_palette(value_low); \ - value = (value_high << 16) | value_low; \ - address32(palette_ram_converted, palette_address) = value; \ + address16(palette_ram_converted, palette_address) = value_low; \ } \ @@ -1616,13 +1615,13 @@ void function_cc write_backup(u32 address, u32 value) #define write_vram8() \ address &= ~0x01; \ - address16(vram, address) = ((value << 8) | value) \ + address16(vram, address) = eswap16((value << 8) | value) \ #define write_vram16() \ - address16(vram, address) = value \ + address16(vram, address) = eswap16(value) \ #define write_vram32() \ - address32(vram, address) = value \ + address32(vram, address) = eswap32(value) \ // RTC code derived from VBA's (due to lack of any real publically available // documentation...) @@ -1682,7 +1681,7 @@ static u32 encode_bcd(u8 value) if(!map) \ map = load_gamepak_page(rtc_page_index & 0x3FF); \ \ - address16(map, update_address & 0x7FFF) = _value \ + address16(map, update_address & 0x7FFF) = eswap16(_value) \ void function_cc write_rtc(u32 address, u32 value) { @@ -1897,12 +1896,12 @@ void function_cc write_rtc(u32 address, u32 value) { \ case 0x02: \ /* external work RAM */ \ - address##type(ewram, (address & 0x3FFFF)) = value; \ + address##type(ewram, (address & 0x3FFFF)) = eswap##type(value); \ break; \ \ case 0x03: \ /* internal work RAM */ \ - address##type(iwram, (address & 0x7FFF) + 0x8000) = value; \ + address##type(iwram, (address & 0x7FFF) + 0x8000) = eswap##type(value); \ break; \ \ case 0x04: \ @@ -1926,7 +1925,7 @@ void function_cc write_rtc(u32 address, u32 value) case 0x07: \ /* OAM RAM */ \ reg[OAM_UPDATED] = 1; \ - address##type(oam_ram, address & 0x3FF) = value; \ + address##type(oam_ram, address & 0x3FF) = eswap##type(value); \ break; \ \ case 0x08: \ @@ -2544,26 +2543,26 @@ dma_region_type dma_region_map[16] = } \ #define dma_read_iwram(type, transfer_size) \ - read_value = address##transfer_size(iwram + 0x8000, type##_ptr & 0x7FFF) \ + read_value = readaddress##transfer_size(iwram + 0x8000, type##_ptr & 0x7FFF)\ #define dma_read_vram(type, transfer_size) \ - read_value = address##transfer_size(vram, type##_ptr & 0x1FFFF) \ + read_value = readaddress##transfer_size(vram, type##_ptr & 0x1FFFF) \ #define dma_read_io(type, transfer_size) \ - read_value = address##transfer_size(io_registers, type##_ptr & 0x7FFF) \ + read_value = readaddress##transfer_size(io_registers, type##_ptr & 0x7FFF) \ #define dma_read_oam_ram(type, transfer_size) \ - read_value = address##transfer_size(oam_ram, type##_ptr & 0x3FF) \ + read_value = readaddress##transfer_size(oam_ram, type##_ptr & 0x3FF) \ #define dma_read_palette_ram(type, transfer_size) \ - read_value = address##transfer_size(palette_ram, type##_ptr & 0x3FF) \ + read_value = readaddress##transfer_size(palette_ram, type##_ptr & 0x3FF) \ #define dma_read_ewram(type, transfer_size) \ - read_value = address##transfer_size(ewram, type##_ptr & 0x3FFFF) \ + read_value = readaddress##transfer_size(ewram, type##_ptr & 0x3FFFF) \ #define dma_read_gamepak(type, transfer_size) \ dma_gamepak_check_region(type); \ - read_value = address##transfer_size(type##_address_block, \ + read_value = readaddress##transfer_size(type##_address_block, \ type##_ptr & 0x7FFF) \ // DMAing from the BIOS is funny, just returns 0.. @@ -2575,17 +2574,20 @@ dma_region_type dma_region_map[16] = read_value = read_memory##transfer_size(type##_ptr) \ #define dma_write_iwram(type, transfer_size) \ - address##transfer_size(iwram + 0x8000, type##_ptr & 0x7FFF) = read_value; \ + address##transfer_size(iwram + 0x8000, type##_ptr & 0x7FFF) = \ + eswap##transfer_size(read_value); \ smc_trigger |= address##transfer_size(iwram, type##_ptr & 0x7FFF) \ #define dma_write_vram(type, transfer_size) \ - address##transfer_size(vram, type##_ptr & 0x1FFFF) = read_value \ + address##transfer_size(vram, type##_ptr & 0x1FFFF) = \ + eswap##transfer_size(read_value) \ #define dma_write_io(type, transfer_size) \ write_io_register##transfer_size(type##_ptr & 0x3FF, read_value) \ #define dma_write_oam_ram(type, transfer_size) \ - address##transfer_size(oam_ram, type##_ptr & 0x3FF) = read_value \ + address##transfer_size(oam_ram, type##_ptr & 0x3FF) = \ + eswap##transfer_size(read_value) \ #define dma_write_palette_ram(type, transfer_size) \ write_palette##transfer_size(type##_ptr & 0x3FF, read_value) \ @@ -2594,7 +2596,8 @@ dma_region_type dma_region_map[16] = write_memory##transfer_size(type##_ptr, read_value) \ #define dma_write_ewram(type, transfer_size) \ - address##transfer_size(ewram, type##_ptr & 0x3FFFF) = read_value; \ + address##transfer_size(ewram, type##_ptr & 0x3FFFF) = \ + eswap##transfer_size(read_value); \ smc_trigger |= address##transfer_size(ewram, \ (type##_ptr & 0x3FFFF) + 0x40000) \ @@ -3034,8 +3037,8 @@ cpu_alert_type dma_transfer(dma_transfer_type *dma) (dma->start_type == DMA_START_IMMEDIATELY)) { dma->start_type = DMA_INACTIVE; - address16(io_registers, (dma->dma_channel * 12) + 0xBA) &= - (~0x8000); + address16(io_registers, (dma->dma_channel * 12) + 0xBA) = + readaddress16(io_registers, (dma->dma_channel * 12) + 0xBA) & (~0x8000); } if(dma->irq) @@ -3208,13 +3211,13 @@ void init_memory(void) memset(ewram, 0, sizeof(ewram)); memset(vram, 0, sizeof(vram)); - io_registers[REG_DISPCNT] = 0x80; - io_registers[REG_P1] = 0x3FF; - io_registers[REG_BG2PA] = 0x100; - io_registers[REG_BG2PD] = 0x100; - io_registers[REG_BG3PA] = 0x100; - io_registers[REG_BG3PD] = 0x100; - io_registers[REG_RCNT] = 0x8000; + write_ioreg(REG_DISPCNT, 0x80); + write_ioreg(REG_P1, 0x3FF); + write_ioreg(REG_BG2PA, 0x100); + write_ioreg(REG_BG2PD, 0x100); + write_ioreg(REG_BG3PA, 0x100); + write_ioreg(REG_BG3PD, 0x100); + write_ioreg(REG_RCNT, 0x8000); backup_type = BACKUP_NONE; diff --git a/gba_memory.h b/gba_memory.h index 5319a30..0f9dc3a 100644 --- a/gba_memory.h +++ b/gba_memory.h @@ -122,6 +122,19 @@ typedef enum REG_BLDCNT = 0x28, REG_BLDALPHA = 0x29, REG_BLDY = 0x2A, + REG_SOUND1CNT_L = 0x30, + REG_SOUND1CNT_H = 0x31, + REG_SOUND3CNT_L = 0x38, + REG_SOUND3CNT_H = 0x39, + REG_SOUND3CNT_X = 0x3A, + REG_SOUND4CNT_H = 0x3E, + REG_SOUNDCNT_L = 0x40, + REG_SOUNDCNT_H = 0x41, + REG_SOUNDCNT_X = 0x42, + REG_DMA0SAD = 0x58, + REG_DMA0DAD = 0x5A, + REG_DMA0CNT_L = 0x5C, + REG_DMA0CNT_H = 0x5D, REG_TM0D = 0x80, REG_TM0CNT = 0x81, REG_TM1D = 0x82, @@ -38,7 +38,7 @@ extern void set_fastforward_override(bool fastforward); static void trigger_key(u32 key) { - u32 p1_cnt = io_registers[REG_P1CNT]; + u32 p1_cnt = read_ioreg(REG_P1CNT); if((p1_cnt >> 14) & 0x01) { @@ -121,7 +121,7 @@ u32 update_input(void) trigger_key(new_key); old_key = new_key; - io_registers[REG_P1] = (~old_key) & 0x3FF; + write_ioreg(REG_P1, (~old_key) & 0x3FF); /* Handle fast forward button */ if (libretro_ff_enabled != libretro_ff_enabled_prev) @@ -63,7 +63,7 @@ static void update_timers(irq_type *irq_raised) { timer[i].count -= execute_cycles; /* io_registers accessors range: REG_TM0D, REG_TM1D, REG_TM2D, REG_TM3D */ - io_registers[128 + (i * 2)] = -(timer[i].count > timer[i].prescale); + write_ioreg(REG_TM0D + (i * 2), -(timer[i].count > timer[i].prescale)); } if(timer[i].count > 0) @@ -76,7 +76,7 @@ static void update_timers(irq_type *irq_raised) if((i != 3) && (timer[i + 1].status == TIMER_CASCADE)) { timer[i + 1].count--; - io_registers[REG_TM0D + (i + 1) * 2] = -(timer[i + 1].count); + write_ioreg(REG_TM0D + (i + 1) * 2, -timer[i+1].count); } if(i < 2) @@ -146,8 +146,8 @@ u32 update_gba(void) if(video_count <= 0) { - u32 vcount = io_registers[REG_VCOUNT]; - u32 dispstat = io_registers[REG_DISPSTAT]; + u32 vcount = read_ioreg(REG_VCOUNT); + u32 dispstat = read_ioreg(REG_DISPSTAT); if((dispstat & 0x02) == 0) { @@ -162,7 +162,7 @@ u32 update_gba(void) oam_update_count++; if(no_alpha) - io_registers[REG_BLDCNT] = 0; + write_ioreg(REG_BLDCNT, 0); update_scanline(); // If in visible area also fire HDMA @@ -196,13 +196,13 @@ u32 update_gba(void) } affine_reference_x[0] = - (s32)(address32(io_registers, 0x28) << 4) >> 4; + (s32)(readaddress32(io_registers, 0x28) << 4) >> 4; affine_reference_y[0] = - (s32)(address32(io_registers, 0x2C) << 4) >> 4; + (s32)(readaddress32(io_registers, 0x2C) << 4) >> 4; affine_reference_x[1] = - (s32)(address32(io_registers, 0x38) << 4) >> 4; + (s32)(readaddress32(io_registers, 0x38) << 4) >> 4; affine_reference_y[1] = - (s32)(address32(io_registers, 0x3C) << 4) >> 4; + (s32)(readaddress32(io_registers, 0x3C) << 4) >> 4; for(i = 0; i < 4; i++) { @@ -251,9 +251,9 @@ u32 update_gba(void) else dispstat &= ~0x04; - io_registers[REG_VCOUNT] = vcount; + write_ioreg(REG_VCOUNT, vcount); } - io_registers[REG_DISPSTAT] = dispstat; + write_ioreg(REG_DISPSTAT, dispstat); } if(irq_raised) @@ -437,7 +437,7 @@ void update_gbc_sound(u32 cpu_ticks) s32 volume_left, volume_right; u32 envelope_volume; s32 current_sample; - u32 sound_status = address16(io_registers, 0x84) & 0xFFF0; + u16 sound_status = read_ioreg(REG_SOUNDCNT_X) & 0xFFF0; s8 *sample_data; s8 *wave_bank; u8 *wave_ram = ((u8 *)io_registers) + 0x90; @@ -521,7 +521,7 @@ void update_gbc_sound(u32 cpu_ticks) } } - address16(io_registers, 0x84) = sound_status; + write_ioreg(REG_SOUNDCNT_X, sound_status); gbc_sound_last_cpu_ticks = cpu_ticks; gbc_sound_buffer_index = @@ -31,22 +31,8 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline u32 enable_flags, u32 dispcnt, u32 bldcnt, const bitmap_layer_render_struct *layer_renderers); -#define no_op \ - -// This old version is not necessary if the palette is either being converted -// transparently or the ABGR 1555 format is being used natively. The direct -// version (without conversion) is much faster. - -#define tile_lookup_palette_full(palette, source) \ - current_pixel = palette[source]; \ - convert_palette(current_pixel) \ - -#define tile_lookup_palette(palette, source) \ - current_pixel = palette[source]; \ - - #define tile_expand_base_normal(index) \ - tile_lookup_palette(palette, current_pixel); \ + current_pixel = palette[current_pixel]; \ dest_ptr[index] = current_pixel \ #define tile_expand_transparent_normal(index) \ @@ -68,14 +54,14 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define color_combine_mask_a(layer) \ - ((io_registers[REG_BLDCNT] >> layer) & 0x01) \ + ((read_ioreg(REG_BLDCNT) >> layer) & 0x01) \ // For color blending operations, will create a mask that has in bit // 10 if the layer is target B, and bit 9 if the layer is target A. #define color_combine_mask(layer) \ (color_combine_mask_a(layer) | \ - ((io_registers[REG_BLDCNT] >> (layer + 7)) & 0x02)) << 9 \ + ((read_ioreg(REG_BLDCNT) >> (layer + 7)) & 0x02)) << 9 \ // For alpha blending renderers, draw the palette index (9bpp) and // layer bits rather than the raw RGB. For the base this should write to @@ -183,7 +169,7 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline // Get the current tile from the map in 8bpp mode #define get_tile_8bpp() \ - current_tile = *map_ptr; \ + current_tile = eswap16(*map_ptr); \ tile_ptr = tile_base + ((current_tile & 0x3FF) * 64) \ @@ -243,16 +229,16 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define partial_tile_right_noflip_8bpp(combine_op, alpha_op) \ if(partial_tile_offset >= 4) \ { \ - current_pixels = *((u32 *)(tile_ptr + 4)) >> \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))) >> \ ((partial_tile_offset - 4) * 8); \ partial_tile_8bpp(combine_op, alpha_op); \ } \ else \ { \ partial_tile_run -= 4; \ - current_pixels = *((u32 *)tile_ptr) >> (partial_tile_offset * 8); \ + current_pixels = eswap32(*((u32 *)tile_ptr)) >> (partial_tile_offset * 8);\ partial_tile_8bpp(combine_op, alpha_op); \ - current_pixels = *((u32 *)(tile_ptr + 4)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))); \ tile_8bpp_draw_four_##combine_op(0, alpha_op, noflip); \ advance_dest_ptr_##combine_op(4); \ } \ @@ -264,19 +250,19 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define partial_tile_mid_noflip_8bpp(combine_op, alpha_op) \ if(partial_tile_offset >= 4) \ { \ - current_pixels = *((u32 *)(tile_ptr + 4)) >> \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))) >> \ ((partial_tile_offset - 4) * 8); \ } \ else \ { \ - current_pixels = *((u32 *)tile_ptr) >> (partial_tile_offset * 8); \ + current_pixels = eswap32(*((u32 *)tile_ptr)) >> (partial_tile_offset * 8);\ if((partial_tile_offset + partial_tile_run) > 4) \ { \ u32 old_run = partial_tile_run; \ partial_tile_run = 4 - partial_tile_offset; \ partial_tile_8bpp(combine_op, alpha_op); \ partial_tile_run = old_run - partial_tile_run; \ - current_pixels = *((u32 *)(tile_ptr + 4)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))); \ } \ } \ partial_tile_8bpp(combine_op, alpha_op); \ @@ -288,23 +274,23 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define partial_tile_left_noflip_8bpp(combine_op, alpha_op) \ if(partial_tile_run >= 4) \ { \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ tile_8bpp_draw_four_##combine_op(0, alpha_op, noflip); \ advance_dest_ptr_##combine_op(4); \ tile_ptr += 4; \ partial_tile_run -= 4; \ } \ \ - current_pixels = *((u32 *)(tile_ptr)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr))); \ partial_tile_8bpp(combine_op, alpha_op) \ // Draws a non-clipped (complete) 8bpp tile. #define tile_noflip_8bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ tile_8bpp_draw_four_##combine_op(0, alpha_op, noflip); \ - current_pixels = *((u32 *)(tile_ptr + 4)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))); \ tile_8bpp_draw_four_##combine_op(4, alpha_op, noflip) \ @@ -321,26 +307,28 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define partial_tile_right_flip_8bpp(combine_op, alpha_op) \ if(partial_tile_offset >= 4) \ { \ - current_pixels = *((u32 *)tile_ptr) << ((partial_tile_offset - 4) * 8); \ + current_pixels = eswap32(*((u32 *)tile_ptr)) << \ + ((partial_tile_offset - 4) * 8); \ partial_tile_flip_8bpp(combine_op, alpha_op); \ } \ else \ { \ partial_tile_run -= 4; \ - current_pixels = *((u32 *)(tile_ptr + 4)) << \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))) << \ ((partial_tile_offset - 4) * 8); \ partial_tile_flip_8bpp(combine_op, alpha_op); \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ tile_8bpp_draw_four_##combine_op(0, alpha_op, flip); \ advance_dest_ptr_##combine_op(4); \ } \ #define partial_tile_mid_flip_8bpp(combine_op, alpha_op) \ if(partial_tile_offset >= 4) \ - current_pixels = *((u32 *)tile_ptr) << ((partial_tile_offset - 4) * 8); \ + current_pixels = eswap32(*((u32 *)tile_ptr)) << \ + ((partial_tile_offset - 4) * 8); \ else \ { \ - current_pixels = *((u32 *)(tile_ptr + 4)) << \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))) << \ ((partial_tile_offset - 4) * 8); \ \ if((partial_tile_offset + partial_tile_run) > 4) \ @@ -349,7 +337,7 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline partial_tile_run = 4 - partial_tile_offset; \ partial_tile_flip_8bpp(combine_op, alpha_op); \ partial_tile_run = old_run - partial_tile_run; \ - current_pixels = *((u32 *)(tile_ptr)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr))); \ } \ } \ partial_tile_flip_8bpp(combine_op, alpha_op); \ @@ -357,20 +345,20 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define partial_tile_left_flip_8bpp(combine_op, alpha_op) \ if(partial_tile_run >= 4) \ { \ - current_pixels = *((u32 *)(tile_ptr + 4)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))); \ tile_8bpp_draw_four_##combine_op(0, alpha_op, flip); \ advance_dest_ptr_##combine_op(4); \ tile_ptr -= 4; \ partial_tile_run -= 4; \ } \ \ - current_pixels = *((u32 *)(tile_ptr + 4)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))); \ partial_tile_flip_8bpp(combine_op, alpha_op) \ #define tile_flip_8bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)(tile_ptr + 4)); \ + current_pixels = eswap32(*((u32 *)(tile_ptr + 4))); \ tile_8bpp_draw_four_##combine_op(0, alpha_op, flip); \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ tile_8bpp_draw_four_##combine_op(4, alpha_op, flip) \ @@ -536,7 +524,7 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline // the pixel block. #define get_tile_4bpp() \ - current_tile = *map_ptr; \ + current_tile = eswap16(*map_ptr); \ current_palette = (current_tile >> 12) << 4; \ tile_ptr = tile_base + ((current_tile & 0x3FF) * 32); \ @@ -557,7 +545,7 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline // how many to draw. #define partial_tile_right_noflip_4bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)tile_ptr) >> (partial_tile_offset * 4); \ + current_pixels = eswap32(*((u32 *)tile_ptr)) >> (partial_tile_offset * 4); \ partial_tile_4bpp(combine_op, alpha_op) \ @@ -571,13 +559,13 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline // partial_tile_offset is how many to draw. #define partial_tile_left_noflip_4bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ partial_tile_4bpp(combine_op, alpha_op) \ // Draws a complete 4bpp tile row (not clipped) #define tile_noflip_4bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ tile_4bpp_draw_eight_##combine_op(alpha_op, noflip) \ @@ -592,18 +580,18 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline } \ #define partial_tile_right_flip_4bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)tile_ptr) << (partial_tile_offset * 4); \ + current_pixels = eswap32(*((u32 *)tile_ptr)) << (partial_tile_offset * 4); \ partial_tile_flip_4bpp(combine_op, alpha_op) \ #define partial_tile_mid_flip_4bpp(combine_op, alpha_op) \ partial_tile_right_flip_4bpp(combine_op, alpha_op) \ #define partial_tile_left_flip_4bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ partial_tile_flip_4bpp(combine_op, alpha_op) \ #define tile_flip_4bpp(combine_op, alpha_op) \ - current_pixels = *((u32 *)tile_ptr); \ + current_pixels = eswap32(*((u32 *)tile_ptr)); \ tile_4bpp_draw_eight_##combine_op(alpha_op, flip) \ @@ -868,13 +856,13 @@ static void render_scanline_text_base_normal(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_base_normal(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -1055,13 +1043,13 @@ static void render_scanline_text_transparent_normal(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_transparent_normal(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -1241,13 +1229,13 @@ static void render_scanline_text_base_color16(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_base_color16(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -1426,13 +1414,13 @@ static void render_scanline_text_transparent_color16(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_transparent_color16(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -1611,13 +1599,13 @@ static void render_scanline_text_base_color32(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_base_color32(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -1796,13 +1784,13 @@ static void render_scanline_text_transparent_color32(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_transparent_color32(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -1983,13 +1971,13 @@ static void render_scanline_text_base_alpha(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_base_alpha(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -2166,13 +2154,13 @@ static void render_scanline_text_transparent_alpha(u32 layer, u32 start, u32 end, void *scanline) { render_scanline_extra_variables_transparent_alpha(text); - u32 bg_control = io_registers[REG_BG0CNT + layer]; + u32 bg_control = read_ioreg(REG_BG0CNT + layer); u32 map_size = (bg_control >> 14) & 0x03; u32 map_width = map_widths[map_size]; u32 horizontal_offset = - (io_registers[REG_BG0HOFS + (layer * 2)] + start) % 512; - u32 vertical_offset = (io_registers[REG_VCOUNT] + - io_registers[REG_BG0VOFS + (layer * 2)]) % 512; + (read_ioreg(REG_BG0HOFS + (layer * 2)) + start) % 512; + u32 vertical_offset = (read_ioreg(REG_VCOUNT) + + read_ioreg(REG_BG0VOFS + (layer * 2))) % 512; u32 current_pixel; u32 current_pixels; u32 partial_tile_run = 0; @@ -2522,7 +2510,7 @@ void render_scanline_affine_##combine_op##_##alpha_op(u32 layer, \ u32 start, u32 end, void *scanline) \ { \ render_scanline_extra_variables_##combine_op##_##alpha_op(affine); \ - u32 bg_control = io_registers[REG_BG0CNT + layer]; \ + u32 bg_control = read_ioreg(REG_BG0CNT + layer); \ u32 current_pixel; \ s32 source_x, source_y; \ u32 pixel_x, pixel_y; \ @@ -2539,8 +2527,8 @@ void render_scanline_affine_##combine_op##_##alpha_op(u32 layer, \ render_scanline_dest_##alpha_op *dest_ptr = \ ((render_scanline_dest_##alpha_op *)scanline) + start; \ \ - dx = (s16)io_registers[REG_BG2PA + layer_offset]; \ - dy = (s16)io_registers[REG_BG2PC + layer_offset]; \ + dx = (s16)read_ioreg(REG_BG2PA + layer_offset); \ + dy = (s16)read_ioreg(REG_BG2PC + layer_offset); \ source_x = affine_reference_x[layer - 2] + (start * dx); \ source_y = affine_reference_y[layer - 2] + (start * dy); \ \ @@ -2609,7 +2597,7 @@ render_scanline_affine_builder(transparent, alpha); \ for(i = 0; (s32)i < (s32)end; i++) \ { \ - current_pixel = *src_ptr; \ + current_pixel = srcread_##type(*src_ptr); \ bitmap_render_pixel_##type(alpha_op); \ src_ptr++; \ dest_ptr++; \ @@ -2637,7 +2625,7 @@ render_scanline_affine_builder(transparent, alpha); if((u32)pixel_x >= (u32)width) \ break; \ \ - current_pixel = src_ptr[pixel_x]; \ + current_pixel = srcread_##type(src_ptr[pixel_x]); \ bitmap_render_pixel_##type(alpha_op); \ \ source_x += dx; \ @@ -2669,7 +2657,7 @@ render_scanline_affine_builder(transparent, alpha); if(((u32)pixel_x >= (u32)width) || ((u32)pixel_y >= (u32)height)) \ break; \ \ - current_pixel = src_ptr[pixel_x + (pixel_y * width)]; \ + current_pixel = srcread_##type(src_ptr[pixel_x + (pixel_y * width)]); \ bitmap_render_pixel_##type(alpha_op); \ \ source_x += dx; \ @@ -2683,16 +2671,19 @@ render_scanline_affine_builder(transparent, alpha); #define render_scanline_vram_setup_mode5() \ u16 *src_ptr = (u16 *)vram; \ - if(io_registers[REG_DISPCNT] & 0x10) \ + if(read_ioreg(REG_DISPCNT) & 0x10) \ src_ptr = (u16 *)(vram + 0xA000); \ #define render_scanline_vram_setup_mode4() \ u16 *palette = palette_ram_converted; \ u8 *src_ptr = vram; \ - if(io_registers[REG_DISPCNT] & 0x10) \ + if(read_ioreg(REG_DISPCNT) & 0x10) \ src_ptr = vram + 0xA000; \ +#define srcread_mode3(v) eswap16(v) +#define srcread_mode5(v) eswap16(v) +#define srcread_mode4(v) (v) // Build bitmap scanline rendering functions. @@ -2705,8 +2696,8 @@ static void render_scanline_bitmap_##type##_##alpha_op(u32 start, u32 end, \ s32 source_x, source_y; \ s32 pixel_x, pixel_y; \ \ - s32 dx = (s16)io_registers[REG_BG2PA]; \ - s32 dy = (s16)io_registers[REG_BG2PC]; \ + s32 dx = (s16)read_ioreg(REG_BG2PA); \ + s32 dy = (s16)read_ioreg(REG_BG2PC); \ \ u32 i; \ \ @@ -3058,11 +3049,11 @@ static const bitmap_layer_render_struct bitmap_mode_renderers[3] = #define obj_render_affine(combine_op, color_depth, alpha_op, map_space) \ { \ - s16 *params = (s16 *)oam_ram + (((obj_attribute_1 >> 9) & 0x1F) * 16); \ - s32 dx = params[3]; \ - s32 dmx = params[7]; \ - s32 dy = params[11]; \ - s32 dmy = params[15]; \ + u16 *params = (u16 *)oam_ram + (((obj_attribute_1 >> 9) & 0x1F) * 16); \ + s32 dx = (s16)eswap16(params[3]); \ + s32 dmx = (s16)eswap16(params[7]); \ + s32 dy = (s16)eswap16(params[11]); \ + s32 dmy = (s16)eswap16(params[15]); \ s32 source_x, source_y; \ s32 tile_x, tile_y; \ u32 tile_map_offset; \ @@ -3163,9 +3154,9 @@ static u32 obj_alpha_count[160]; u32 dest \ #define render_scanline_obj_extra_variables_copy(type) \ - u32 bldcnt = io_registers[REG_BLDCNT]; \ - u32 dispcnt = io_registers[REG_DISPCNT]; \ - u32 obj_enable = io_registers[REG_WINOUT] >> 8; \ + u32 bldcnt = read_ioreg(REG_BLDCNT); \ + u32 dispcnt = read_ioreg(REG_DISPCNT); \ + u32 obj_enable = read_ioreg(REG_WINOUT) >> 8; \ render_scanline_layer_functions_##type(); \ u32 copy_start, copy_end; \ u16 copy_buffer[240]; \ @@ -3278,7 +3269,7 @@ static void render_scanline_obj_##alpha_op##_##map_space(u32 priority, \ s32 obj_size; \ s32 obj_width, obj_height; \ u32 obj_attribute_0, obj_attribute_1, obj_attribute_2; \ - s32 vcount = io_registers[REG_VCOUNT]; \ + s32 vcount = read_ioreg(REG_VCOUNT); \ u32 tile_run; \ u32 current_pixels; \ u32 current_pixel; \ @@ -3296,9 +3287,9 @@ static void render_scanline_obj_##alpha_op##_##map_space(u32 priority, \ for(obj_num = 0; obj_num < obj_count; obj_num++) \ { \ oam_ptr = oam_ram + (obj_list[obj_num] * 4); \ - obj_attribute_0 = oam_ptr[0]; \ - obj_attribute_1 = oam_ptr[1]; \ - obj_attribute_2 = oam_ptr[2]; \ + obj_attribute_0 = eswap16(oam_ptr[0]); \ + obj_attribute_1 = eswap16(oam_ptr[1]); \ + obj_attribute_2 = eswap16(oam_ptr[2]); \ obj_size = ((obj_attribute_0 >> 12) & 0x0C) | (obj_attribute_1 >> 14); \ \ obj_x = (s32)(obj_attribute_1 << 23) >> 23; \ @@ -3355,8 +3346,8 @@ static void order_obj(u32 video_mode) for(obj_num = 127; obj_num >= 0; obj_num--, oam_ptr -= 4) { - obj_attribute_0 = oam_ptr[0]; - obj_attribute_2 = oam_ptr[2]; + obj_attribute_0 = eswap16(oam_ptr[0]); + obj_attribute_2 = eswap16(oam_ptr[2]); obj_size = obj_attribute_0 & 0xC000; obj_priority = (obj_attribute_2 >> 10) & 0x03; obj_mode = (obj_attribute_0 >> 10) & 0x03; @@ -3369,7 +3360,7 @@ static void order_obj(u32 video_mode) if(obj_y > 160) obj_y -= 256; - obj_attribute_1 = oam_ptr[1]; + obj_attribute_1 = eswap16(oam_ptr[1]); obj_size = ((obj_size >> 12) & 0x0C) | (obj_attribute_1 >> 14); obj_height = obj_height_table[obj_size]; obj_width = obj_width_table[obj_size]; @@ -3436,14 +3427,14 @@ static void order_layers(u32 layer_flags) for(layer_number = 3; layer_number >= 0; layer_number--) { if(((layer_flags >> layer_number) & 1) && - ((io_registers[REG_BG0CNT + layer_number] & 0x03) == priority)) + ((read_ioreg(REG_BG0CNT + layer_number) & 0x03) == priority)) { layer_order[layer_count] = layer_number; layer_count++; } } - if((obj_priority_count[priority][io_registers[REG_VCOUNT]] > 0) + if((obj_priority_count[priority][read_ioreg(REG_VCOUNT)] > 0) && (layer_flags & 0x10)) { layer_order[layer_count] = priority | 0x04; @@ -3614,7 +3605,7 @@ void expand_blend(u32 *screen_src_ptr, u16 *screen_dest_ptr, { u32 pixel_pair; u32 pixel_top, pixel_bottom; - u32 bldalpha = io_registers[REG_BLDALPHA]; + u32 bldalpha = read_ioreg(REG_BLDALPHA); u32 blend_a = bldalpha & 0x1F; u32 blend_b = (bldalpha >> 8) & 0x1F; u32 i; @@ -3645,7 +3636,7 @@ static void expand_darken(u16 *screen_src_ptr, u16 *screen_dest_ptr, u32 start, u32 end) { u32 pixel_top; - s32 blend = 16 - (io_registers[REG_BLDY] & 0x1F); + s32 blend = 16 - (read_ioreg(REG_BLDY) & 0x1F); u32 i; if(blend < 0) @@ -3661,7 +3652,7 @@ static void expand_brighten(u16 *screen_src_ptr, u16 *screen_dest_ptr, u32 start, u32 end) { u32 pixel_top; - u32 blend = io_registers[REG_BLDY] & 0x1F; + u32 blend = read_ioreg(REG_BLDY) & 0x1F; u32 upper; u32 i; @@ -3682,10 +3673,10 @@ static void expand_brighten(u16 *screen_src_ptr, u16 *screen_dest_ptr, static void expand_darken_partial_alpha(u32 *screen_src_ptr, u16 *screen_dest_ptr, u32 start, u32 end) { - s32 blend = 16 - (io_registers[REG_BLDY] & 0x1F); + s32 blend = 16 - (read_ioreg(REG_BLDY) & 0x1F); u32 pixel_pair; u32 pixel_top, pixel_bottom; - u32 bldalpha = io_registers[REG_BLDALPHA]; + u32 bldalpha = read_ioreg(REG_BLDALPHA); u32 blend_a = bldalpha & 0x1F; u32 blend_b = (bldalpha >> 8) & 0x1F; u32 i; @@ -3706,10 +3697,10 @@ static void expand_darken_partial_alpha(u32 *screen_src_ptr, u16 *screen_dest_pt static void expand_brighten_partial_alpha(u32 *screen_src_ptr, u16 *screen_dest_ptr, u32 start, u32 end) { - s32 blend = io_registers[REG_BLDY] & 0x1F; + s32 blend = read_ioreg(REG_BLDY) & 0x1F; u32 pixel_pair; u32 pixel_top, pixel_bottom; - u32 bldalpha = io_registers[REG_BLDALPHA]; + u32 bldalpha = read_ioreg(REG_BLDALPHA); u32 blend_a = bldalpha & 0x1F; u32 blend_b = (bldalpha >> 8) & 0x1F; u32 upper; @@ -3784,20 +3775,20 @@ static void expand_brighten_partial_alpha(u32 *screen_src_ptr, u16 *screen_dest_ } \ #define render_condition_alpha \ - (((io_registers[REG_BLDALPHA] & 0x1F1F) != 0x001F) && \ - ((io_registers[REG_BLDCNT] & 0x3F) != 0) && \ - ((io_registers[REG_BLDCNT] & 0x3F00) != 0)) \ + (((read_ioreg(REG_BLDALPHA) & 0x1F1F) != 0x001F) && \ + ((read_ioreg(REG_BLDCNT) & 0x3F) != 0) && \ + ((read_ioreg(REG_BLDCNT) & 0x3F00) != 0)) \ #define render_condition_fade \ - (((io_registers[REG_BLDY] & 0x1F) != 0) && \ - ((io_registers[REG_BLDCNT] & 0x3F) != 0)) \ + (((read_ioreg(REG_BLDY) & 0x1F) != 0) && \ + ((read_ioreg(REG_BLDCNT) & 0x3F) != 0)) \ #define render_layers_color_effect(renderer, layer_condition, \ alpha_condition, fade_condition, _start, _end) \ { \ if(layer_condition) \ { \ - if(obj_alpha_count[io_registers[REG_VCOUNT]] > 0) \ + if(obj_alpha_count[read_ioreg(REG_VCOUNT)] > 0) \ { \ /* Render based on special effects mode. */ \ u32 screen_buffer[240]; \ @@ -3902,7 +3893,7 @@ static void expand_brighten_partial_alpha(u32 *screen_src_ptr, u16 *screen_dest_ { \ if(color_combine_mask_a(5)) \ { \ - u32 blend = io_registers[REG_BLDY] & 0x1F; \ + u32 blend = read_ioreg(REG_BLDY) & 0x1F; \ u32 upper; \ \ if(blend > 16) \ @@ -3921,7 +3912,7 @@ static void expand_brighten_partial_alpha(u32 *screen_src_ptr, u16 *screen_dest_ { \ if(color_combine_mask_a(5)) \ { \ - s32 blend = 16 - (io_registers[REG_BLDY] & 0x1F); \ + s32 blend = 16 - (read_ioreg(REG_BLDY) & 0x1F); \ \ if(blend < 0) \ blend = 0; \ @@ -3942,7 +3933,7 @@ static void render_scanline_tile(u16 *scanline, u32 dispcnt) { u32 current_layer; u32 layer_order_pos; - u32 bldcnt = io_registers[REG_BLDCNT]; + u32 bldcnt = read_ioreg(REG_BLDCNT); render_scanline_layer_functions_tile(); render_layers_color_effect(render_layers, layer_count, @@ -4116,9 +4107,9 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define window_x_coords(window_number) \ window_##window_number##_x1 = \ - io_registers[REG_WIN##window_number##H] >> 8; \ + read_ioreg(REG_WIN##window_number##H) >> 8; \ window_##window_number##_x2 = \ - io_registers[REG_WIN##window_number##H] & 0xFF; \ + read_ioreg(REG_WIN##window_number##H) & 0xFF; \ window_##window_number##_enable = \ (winin >> (window_number * 8)) & 0x3F; \ \ @@ -4133,9 +4124,9 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline u32 window_##window_number##_y1, window_##window_number##_y2; \ u32 window_##window_number##_enable = 0; \ window_##window_number##_y1 = \ - io_registers[REG_WIN##window_number##V] >> 8; \ + read_ioreg(REG_WIN##window_number##V) >> 8; \ window_##window_number##_y2 = \ - io_registers[REG_WIN##window_number##V] & 0xFF; \ + read_ioreg(REG_WIN##window_number##V) & 0xFF; \ \ if(window_##window_number##_y1 > window_##window_number##_y2) \ { \ @@ -4306,7 +4297,7 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define render_window_single(type, window_number) \ - u32 winin = io_registers[REG_WININ]; \ + u32 winin = read_ioreg(REG_WININ); \ window_coords(window_number); \ if(window_##window_number##_x1 > window_##window_number##_x2) \ { \ @@ -4344,9 +4335,9 @@ static void render_scanline_conditional_bitmap(u32 start, u32 end, u16 *scanline #define render_scanline_window_builder(type) \ static void render_scanline_window_##type(u16 *scanline, u32 dispcnt) \ { \ - u32 vcount = io_registers[REG_VCOUNT]; \ - u32 winout = io_registers[REG_WINOUT]; \ - u32 bldcnt = io_registers[REG_BLDCNT]; \ + u32 vcount = read_ioreg(REG_VCOUNT); \ + u32 winout = read_ioreg(REG_WINOUT); \ + u32 bldcnt = read_ioreg(REG_BLDCNT); \ u32 window_out_enable = winout & 0x3F; \ \ render_scanline_layer_functions_##type(); \ @@ -4370,7 +4361,7 @@ static void render_scanline_window_##type(u16 *scanline, u32 dispcnt) \ /* Windows 1 and 2 */ \ case 0x03: \ { \ - u32 winin = io_registers[REG_WININ]; \ + u32 winin = read_ioreg(REG_WININ); \ window_coords(0); \ window_coords(1); \ render_window_multi(type, 0, 1); \ @@ -4387,7 +4378,7 @@ static void render_scanline_window_##type(u16 *scanline, u32 dispcnt) \ /* Window 0 and OBJ window */ \ case 0x05: \ { \ - u32 winin = io_registers[REG_WININ]; \ + u32 winin = read_ioreg(REG_WININ); \ window_coords(0); \ render_window_multi(type, 0, obj); \ break; \ @@ -4396,7 +4387,7 @@ static void render_scanline_window_##type(u16 *scanline, u32 dispcnt) \ /* Window 1 and OBJ window */ \ case 0x06: \ { \ - u32 winin = io_registers[REG_WININ]; \ + u32 winin = read_ioreg(REG_WININ); \ window_coords(1); \ render_window_multi(type, 1, obj); \ break; \ @@ -4405,7 +4396,7 @@ static void render_scanline_window_##type(u16 *scanline, u32 dispcnt) \ /* Window 0, 1, and OBJ window */ \ case 0x07: \ { \ - u32 winin = io_registers[REG_WININ]; \ + u32 winin = read_ioreg(REG_WININ); \ window_coords(0); \ window_coords(1); \ render_window_multi(type, 0, 1_obj); \ @@ -4422,8 +4413,8 @@ static const u32 active_layers[6] = { 0x1F, 0x17, 0x1C, 0x14, 0x14, 0x14 }; void update_scanline(void) { u32 pitch = get_screen_pitch(); - u32 dispcnt = io_registers[REG_DISPCNT]; - u32 vcount = io_registers[REG_VCOUNT]; + u32 dispcnt = read_ioreg(REG_DISPCNT); + u32 vcount = read_ioreg(REG_VCOUNT); u16 *screen_offset = get_screen_pixels() + (vcount * pitch); u32 video_mode = dispcnt & 0x07; @@ -4467,10 +4458,10 @@ void update_scanline(void) } } - affine_reference_x[0] += (s16)io_registers[REG_BG2PB]; - affine_reference_y[0] += (s16)io_registers[REG_BG2PD]; - affine_reference_x[1] += (s16)io_registers[REG_BG3PB]; - affine_reference_y[1] += (s16)io_registers[REG_BG3PD]; + affine_reference_x[0] += (s16)read_ioreg(REG_BG2PB); + affine_reference_y[0] += (s16)read_ioreg(REG_BG2PD); + affine_reference_x[1] += (s16)read_ioreg(REG_BG3PB); + affine_reference_y[1] += (s16)read_ioreg(REG_BG3PD); } #define video_savestate_builder(type) \ |