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Gated MIPS_HAS_R2_INSTS not used at the moment. Tested with qemu.
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Enable big-endian devices: gc/wii
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This patch adds big-endian compatibility in gpsp (in general but only
for the interpreter). There's no performance hit for little-endian
platforms (should be a no-op) and only add a small overhead in memory
accesses for big-endian platforms.
Most memory accesses are wrapped with a byteswap instruction and I/O reg
accesses are also rewired for proper access (using macros). Video
rendering has been fixed to also do byteswaps but there's a couple of
games and rendering modes that still seem broken (but they amount to
less than 20 games in my tests with 1K ROMs).
This also adds build rules and CI for NGC/WII/WIIU (untested)
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Remove macros in dma code
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This reduces code size more than 20% (which is 200-300KB!).
DMA handling accounts for less than 0.5% the average emulation runtime
which doesn't justify the crazy optimization level that the code has. In
fact it's more than likely that the new code runs faster due to less
I-cache trashing.
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Fix CI for OD beta
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Some MIPS fixes
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Seems that ABI mandates that we allocate space for arg0..4 even if we do
pass them as registers. For some reason write_io_register<> functions
write in that stack area (1 word) corrupting the s0 saved register.
This seems to be a new gcc behaviour?
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This only needs some support to save/load state with 64 bit registers.
Since pointers remain 32 bit, no extra changes are needed in the
dynarec. Verified with qemu (qemu-mipsn32el) and miniretro.
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This is required in PS2 but could also make older dingux devices run
gpsp on retroarch
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Add turbo A/B buttons
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This should correct some minor issues in some games.
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This might make a handful games slightly slower (but on the upper side
they work now instead of crashing or restarting).
Also while at it, fix some minor stuff in arm stubs for speed.
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Add dedicated RetroPad fast-forward button
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Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.
Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
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An address check was missing to read aligned 32 (stm/ldm) data from
high mem areas (0xX0000000). This fixes SM4 EU that for some reason has
some weird memory access (perhaps a bug?)
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Some minor formating too
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This works on both interpreter and dynarec.
Tested in MIPS, ARM and x86, still needs some more testing, some edge
cases can be buggy.
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This reverts commit fb7ca09b019248b9a0aba481ea55386f71053d73.
It seems that commit broke rolling in Minish Cap when using the ARM dynarec.
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Using an invalid SP makes Vita crash (for an unkown reason) and makes
things like C signal handlers crash (luckily Retroarch doesn't use
them). It is also a violation of the ABI and not a great idea.
Recycled some little used registers to free SP. Perf should be roughly
the same.
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This checks for USB hotplugging every 60 times audio is written. This
can be adjusted to favor performance vs reacting to hotplugs more quickly.
There are some errors that appear when unplugging the headset because
it tries to write audio to a device that has disappeared.
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Was not writing to the right address (but decoded memory was working).
Most game worked well except those that depend on modifying the existing
palette bits (instead of copying from ROM/RAM). Fixes several games.
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No need for it (faster) and avoid mis-aligning it across calls
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Thanks to drowsnug for the original implementation of a subpixel
scaler. This scaler uses the core of that one, but smooths the
transition in the new pixels added during scaling.
If you think of the scaler as 4x integer scaling of the GBA screen,
and assigning each of those pixels to a subpixel, each subpixel takes
the value of 50% the pixel assigned, 25% of the pixel to its left, and
25% of the pixel to its right.
With the pixels:
BGRBGRBGRBGR
AAAABBBBCCCC
^--- this subpixel will be 1/4 A[G] + 1/2 B[G] + 1/4 B[G]
The first and last pixels in each batch are not blended with the
previous / next batch to keep them sharp.
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If an official BIOS exists in the right place, it will be
used. Otherwise, the built-in BIOS will be used.
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Handle already translated blocks in the ARM asm to speed up indirect
branches (affect some games more than others)
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