Age | Commit message (Collapse) | Author |
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Add options to select whether to boot from BIOS (default is no, as it is
now) and whether to use the original bios or the builtin one (default is
auto, which tries to use the official but falls back to the builtin if
not found).
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Enable runtime dynarec enable/disable
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asm fixes for clang
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Added a more thorough cache cleanup for reset/mode-change too.
Fixed the mmap initialization that ends up leaking memory.
Minor x86 asm fixes for Android.
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Remove BIOS reserved translation area
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This is not really necessary since it can share area with ROM.
Performance impact should be very minimal (haven't noticed it myself)
and could be compensated (even by a positive offset) if we bump the ROM
cache area size.
Tested with several dynarecs.
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Rewrite the MIPS stub backend to add OpenDingux
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Also rewrite a bit memory handlers for smaller functions.
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Uses a different cache primitive and a differend madd(u) encoding.
Also added a flag for BGR vs RGB color output (since PSP is assuming to
be BGR for speed).
Aside from that the ABI required some special function calls for PIC.
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This allows us to emit the handlers directly in a more efficient manner.
At the same time it allows for an easy fix to emit PIC code, which is
necessary for libretro. This also enables more platform specific
optimizations and variations, perhaps even run-time multiplatform
support.
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Ensure post processing configuration is correctly reset in retro_deinit()
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Move a few more registers to context
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This gets rid of some more absolute addrs in the MIPS dynarec.
Tested on several platforms, we should be good.
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Move palettes around to simplify MIPS dynarec
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Will move also OAM structures to gain a few cycles per load/store.
Loads can also be optimized for an extra instruction per access.
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Fix typo
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Improve and simplify dynarec JIT area.
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Also fix a regression on VITA.
Use gcc/OS cache flushing routines for MIPS32 instead of synci
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Improve cache flush magic
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Remove PSP-specific stuff from MIPS backend
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Make it better and more generic. Add support for MIPS32 and fix the
messy PSP code.
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This is unnecessary since newlib supports all file I/O.
This is needed for other mips ports
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Remove libco
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While we are at it, use ARM mode for better performance.
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This removes libco and all the usages of it (+pthreads).
Rewired all dynarecs and interpreter to return after every frame so that
libretro can process events. This required to make dynarec re-entrant.
Dynarecs were updated to check for new frame on every update (IRQ, cycle
exhaustion, I/O write, etc). The performance impact of doing so should
be minimal (and definitely outweight the libco gains). While at it,
fixed small issues to get a bit more perf: arm dynarec was not idling
correctly, mips was using stack when not needed, etc.
Tested on PSP (mips), OGA (armv7), Linux (x86 and interpreter). Not
tested on Android though.
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Fix a ghost bug with some games
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Affects at least SM Adv 4 on PSP, which doesn't load at all.
I think the MIPS pipeline does not like invalidating the Icache and
using it immediately after (seems to read an old value sometimes?).
Rewired it to not do that and instead jump to the handler directly.
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Fix x86 dynarec, broken by d10c4afe
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The dynarec expects function args to be located in registers instead of
the stack, which is not the default calling convetion in GCC/clang.
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ARM dynarec: Do not use the stack at all
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Fix a C func call while at it. This is a prerequisite to make the
dynarec re-entrant and get rid of libco
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Minor ARM cleanup
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Turns out this was not even used! No need to fix it then!
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Turns out most of that file ends up in JIT section, which is RWX and not
a very nice way to run code really (security issues aside).
This also makes possible to build that file with -ggdb otherwise it
complains about stuff.
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Minor improvements in ARM stubs
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This gets rid of stack usage (except for callback invocations) in the
dynarec execution code. A requirement to make the dynarec re-entrant.
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Remove more dead code
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Small fixes to division by zero
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This causes crashes in PSP quite often in many games. Other CPUs might
(depending on the processor state) silently return zero or some
undefined value.
The fix is borrowed from ReGBA's codebase
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More cleanups (mostly whitespace and unused stuff)
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Minor cleanup in ARM and MIPS
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