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author | Autechre | 2021-02-13 02:01:10 +0100 |
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committer | GitHub | 2021-02-13 02:01:10 +0100 |
commit | fa7405450831876b410c1445310456d9b4953165 (patch) | |
tree | 05e699df604ea5aa6d654df03bb942415934c50b | |
parent | 6254bbb1d2f48dae2fca9697990e54756534e162 (diff) | |
parent | 8d52e613c7e4fd2d2dbac751888c20b7983f5e2c (diff) | |
download | picogpsp-fa7405450831876b410c1445310456d9b4953165.tar.gz picogpsp-fa7405450831876b410c1445310456d9b4953165.tar.bz2 picogpsp-fa7405450831876b410c1445310456d9b4953165.zip |
Merge pull request #92 from davidgfnet/master
Minor cleanup in ARM and MIPS
-rw-r--r-- | arm/arm_emit.h | 14 | ||||
-rw-r--r-- | arm/arm_stub.S | 25 | ||||
-rw-r--r-- | psp/mips_emit.h | 58 | ||||
-rw-r--r-- | psp/mips_stub.S | 282 |
4 files changed, 8 insertions, 371 deletions
diff --git a/arm/arm_emit.h b/arm/arm_emit.h index 51987a3..7e90b06 100644 --- a/arm/arm_emit.h +++ b/arm/arm_emit.h @@ -115,7 +115,7 @@ void execute_store_u32_safe(u32 address, u32 source); #define reg_x4 ARMREG_R7 #define reg_x5 ARMREG_R8 -#define mem_reg -1 +#define mem_reg (~0U) /* @@ -157,7 +157,7 @@ r15: 0.091287% (-- 100.000000%) */ -s32 arm_register_allocation[] = +u32 arm_register_allocation[] = { reg_x0, /* GBA r0 */ reg_x1, /* GBA r1 */ @@ -194,7 +194,7 @@ s32 arm_register_allocation[] = mem_reg, }; -s32 thumb_register_allocation[] = +u32 thumb_register_allocation[] = { reg_x0, /* GBA r0 */ reg_x1, /* GBA r1 */ @@ -552,7 +552,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations) \ void generate_load_reg(u32 ireg, u32 reg_index) \ { \ - s32 load_src = arm_register_allocation[reg_index]; \ + u32 load_src = arm_register_allocation[reg_index]; \ if(load_src != mem_reg) \ { \ ARM_MOV_REG_REG(0, ireg, load_src); \ @@ -565,7 +565,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations) \ void generate_store_reg(u32 ireg, u32 reg_index) \ { \ - s32 store_dest = arm_register_allocation[reg_index]; \ + u32 store_dest = arm_register_allocation[reg_index]; \ if(store_dest != mem_reg) \ { \ ARM_MOV_REG_REG(0, store_dest, ireg); \ @@ -621,7 +621,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations) \ void generate_load_reg(u32 ireg, u32 reg_index) \ { \ - s32 load_src = thumb_register_allocation[reg_index]; \ + u32 load_src = thumb_register_allocation[reg_index]; \ if(load_src != mem_reg) \ { \ ARM_MOV_REG_REG(0, ireg, load_src); \ @@ -634,7 +634,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations) \ void generate_store_reg(u32 ireg, u32 reg_index) \ { \ - s32 store_dest = thumb_register_allocation[reg_index]; \ + u32 store_dest = thumb_register_allocation[reg_index]; \ if(store_dest != mem_reg) \ { \ ARM_MOV_REG_REG(0, store_dest, ireg); \ diff --git a/arm/arm_stub.S b/arm/arm_stub.S index 95b6d73..5a1f6b2 100644 --- a/arm/arm_stub.S +++ b/arm/arm_stub.S @@ -939,31 +939,6 @@ _execute_patch_bios_protect: str r0, [r1, #-REG_BASE_OFFSET] bx lr - -#define save_reg_scratch(reg) ;\ - ldr r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4))] ;\ - str r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4) + 128)] ;\ - -#define restore_reg_scratch(reg) ;\ - ldr r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4) + 128)] ;\ - str r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4))] ;\ - -#define scratch_regs_thumb(type) ;\ - type##_reg_scratch(0) ;\ - type##_reg_scratch(1) ;\ - type##_reg_scratch(2) ;\ - type##_reg_scratch(3) ;\ - type##_reg_scratch(4) ;\ - type##_reg_scratch(5) ;\ - -#define scratch_regs_arm(type) ;\ - type##_reg_scratch(0) ;\ - type##_reg_scratch(1) ;\ - type##_reg_scratch(6) ;\ - type##_reg_scratch(9) ;\ - type##_reg_scratch(12) ;\ - type##_reg_scratch(14) ;\ - .pool .comm memory_map_read 0x8000 diff --git a/psp/mips_emit.h b/psp/mips_emit.h index 9510156..f01fbe7 100644 --- a/psp/mips_emit.h +++ b/psp/mips_emit.h @@ -1974,64 +1974,6 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address) generate_indirect_branch_arm(); \ } \ -#define old_arm_block_memory(access_type, pre_op, post_op, wb, s_bit) \ -{ \ - arm_decode_block_trans(); \ - u32 i; \ - u32 offset = 0; \ - u32 base_reg = arm_to_mips_reg[rn]; \ - \ - arm_block_address_preadjust_##pre_op(wb); \ - arm_block_address_postadjust_##post_op(); \ - \ - sprint_##s_bit(access_type, pre_op, post_op, wb); \ - \ - if((rn == REG_SP) && iwram_stack_optimize) \ - { \ - mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \ - generate_load_imm(reg_a0, ((u32)(iwram + 0x8000))); \ - mips_emit_addu(reg_a1, reg_a1, reg_a0); \ - \ - for(i = 0; i < 16; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - arm_block_memory_sp_##access_type(); \ - offset += 4; \ - } \ - } \ - \ - arm_block_memory_sp_adjust_pc_##access_type(); \ - } \ - else \ - { \ - mips_emit_ins(reg_a2, reg_zero, 0, 2); \ - \ - for(i = 0; i < 16; i++) \ - { \ - if((reg_list >> i) & 0x01) \ - { \ - cycle_count++; \ - mips_emit_addiu(reg_a0, reg_a2, offset); \ - if(reg_list & ~((2 << i) - 1)) \ - { \ - arm_block_memory_##access_type(); \ - offset += 4; \ - } \ - else \ - { \ - arm_block_memory_final_##access_type(); \ - break; \ - } \ - } \ - } \ - \ - arm_block_memory_adjust_pc_##access_type(); \ - } \ -} - - // This isn't really a correct implementation, may have to fix later. diff --git a/psp/mips_stub.S b/psp/mips_stub.S index dd91ea8..d3324c1 100644 --- a/psp/mips_stub.S +++ b/psp/mips_stub.S @@ -1319,7 +1319,6 @@ execute_load_open_u16u: ror $2, $2, 8 # rotate value by 8bits load_u16_ftable: -# .long execute_load_full_u16 .long execute_load_bios_u16 # 0x00 BIOS .long execute_load_open_u16 # 0x01 open address .long execute_load_ewram_u16 # 0x02 EWRAM @@ -1333,7 +1332,6 @@ load_u16_ftable: .long execute_load_gamepakA_u16 # 0x0A gamepak .long execute_load_gamepakB_u16 # 0x0B gamepak .long execute_load_gamepakC_u16 # 0x0C gamepak - .long execute_load_eeprom_u16 # 0x0D gamepak/eeprom .long execute_load_backup_u16 # 0x0E Flash ROM/SRAM .long execute_load_open_u16 # 0x0F open @@ -1355,42 +1353,6 @@ load_u16_ftable: .long execute_load_backup_u16u # 0x0E Flash ROM/SRAM unaligned .long execute_load_open_u16u # 0x0F open unaligned - - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - .long execute_load_full_u16 - - - patch_load_u16: patch_handler_align load_u16_ftable, 1 @@ -1921,7 +1883,6 @@ load_u32_ftable: .long execute_load_gamepakA_u32 # 0x0A gamepak .long execute_load_gamepakB_u32 # 0x0B gamepak .long execute_load_gamepakC_u32 # 0x0C gamepak - .long execute_load_eeprom_u32 # 0x0D gamepak/eeprom .long execute_load_backup_u32 # 0x0E Flash ROM/SRAM .long execute_load_open_u32 # 0x0F open @@ -2001,7 +1962,7 @@ execute_load_bios_u32a: load_u32 bios_read_protect 2: - open_load32_a + open_load32_core nop execute_load_ewram_u32a: @@ -2510,163 +2471,6 @@ patch_store_u32a: patch_handler store_u32a_ftable, 0x0F - -#execute_load_u8: -execute_load_full_u8: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_load_u8 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_u8 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lbu $2, ($1) # read the value - -ext_load_u8: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory8 # read the value - nop - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_s8: -execute_load_full_s8: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_load_s8 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_s8 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lb $2, ($1) # read the value - -ext_load_s8: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory8 # read the value - nop - restore_registers - seb $2, $2 # sign extend the read value - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_u16: -execute_load_full_u16: - srl $1, $4, 28 # check if the address is out of range - ins $1, $4, 4, 1 # or unaligned (bottom bit) - bne $1, $0, ext_load_u16 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_u16 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lhu $2, ($1) # read the value - -ext_load_u16: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory16 # read the value - nop - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_s16: -execute_load_full_s16: - srl $1, $4, 28 # check if the address is out of range - ins $1, $4, 4, 1 # or unaligned (bottom bit) - bne $1, $0, ext_load_s16 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_s16 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lh $2, ($1) # read the value - -ext_load_s16: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory16_signed # read the value - nop - restore_registers - seh $2, $2 # sign extend the return value - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_load_u32: -execute_load_full_u32: - srl $1, $4, 28 # check if the address is out of range - ins $1, $4, 4, 2 # or unaligned (bottom two bits) - bne $1, $0, ext_load_u32 # if it is, perform an extended read - srl $2, $4, 15 # $1 = page number of address - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($2) - beq $1, $0, ext_load_u32 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lw $2, ($1) # read the value - -ext_load_u32: - addiu $sp, $sp, -4 # make room on the stack for $ra - sw $ra, ($sp) # store return address - save_registers - jal read_memory32 # read the value - nop - restore_registers - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 4 # fix stack (delay slot) - -#execute_aligned_load32: - srl $2, $4, 28 # check if the address is out of range - bne $2, $0, ext_aligned_load32 # if it is, perform an extended load - srl $1, $4, 15 # $1 = page number of address - sll $1, $1, 2 # adjust to word index - addu $1, $1, $16 # $1 = memory_map_read[address >> 15] - lw $1, -32768($1) - beq $1, $0, ext_aligned_load32 # if it's NULL perform an extended read - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - jr $ra # return - lw $2, ($1) # read the value - -ext_aligned_load32: - addiu $sp, $sp, -8 # make room on the stack for $ra - sw $6, 4($sp) - sw $ra, ($sp) # store return address - save_registers - jal read_memory32 # read the value - nop - restore_registers - lw $6, 4($sp) - lw $ra, ($sp) # restore return address - jr $ra # return - addiu $sp, $sp, 8 # fix stack (delay slot) - # General ext memory routines ext_store_ignore: @@ -2804,39 +2608,6 @@ ext_store_u8_jtable: .long ext_store_ignore # 0x0F invalid - -ext_store_u8: - srl $1, $4, 24 # $1 = address >> 24 - sltu $2, $1, 16 # check if the value is out of range - beq $2, $0, ext_store_ignore - sll $1, $1, 2 # make address word indexed (delay) - lui $2, %hi(ext_store_u8_jtable) - addu $2, $2, $1 - # $2 = ext_store_u8_jtable[address >> 24] - lw $2, %lo(ext_store_u8_jtable)($2) - jr $2 # jump to table location - nop - -# $4: address to write to -# $5: value to write -# $6: current PC - -#execute_store_u8: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_store_u8 # if it is, perform an extended write - srl $2, $4, 15 # $1 = page number of address (delay slot) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 - lw $1, 256($2) # $1 = memory_map_write[address >> 15] - beq $1, $0, ext_store_u8 # if it's NULL perform an extended write - andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - lb $2, -32768($1) # load the SMC status - bne $2, $0, smc_write # is there code there? - sb $5, ($1) # store the value (delay slot) - jr $ra # return - nop - # 16bit ext memory routines ext_store_io16: @@ -2919,39 +2690,6 @@ ext_store_u16_jtable: .long ext_store_eeprom # 0x0D EEPROM (possibly) .long ext_store_ignore # 0x0E Flash ROM/SRAM -ext_store_u16: - srl $1, $4, 24 # $1 = address >> 24 - sltu $2, $1, 16 # check if the value is out of range - beq $2, $0, ext_store_ignore - sll $1, $1, 2 # make address word indexed (delay) - lui $2, %hi(ext_store_u16_jtable) - addu $2, $2, $1 - # $2 = ext_store_u16_jtable[address >> 24] - lw $2, %lo(ext_store_u16_jtable)($2) - jr $2 # jump to table location - nop - - -#execute_store_u16: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_store_u16 # if it is, perform an extended write - srl $2, $4, 15 # $1 = page number of address (delay slot) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 - lw $1, 256($2) # $1 = memory_map_write[address >> 15] - beq $1, $0, ext_store_u16 # if it's NULL perform an extended write - andi $2, $4, 0x7FFE # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - lh $2, -32768($1) # load the SMC status - bne $2, $0, smc_write # is there code there? - sh $5, ($1) # store the value (delay slot) - jr $ra # return - nop - - - - - @@ -3030,24 +2768,6 @@ ext_store_u32: jr $2 # jump to table location nop -#execute_store_u32: -execute_store_full_u32: - srl $1, $4, 28 # check if the address is out of range - bne $1, $0, ext_store_u32 # if it is, perform an extended write - srl $2, $4, 15 # $1 = page number of address (delay slot) - sll $2, $2, 2 # adjust to word index - addu $2, $2, $16 - lw $1, 256($2) # $1 = memory_map_write[address >> 15] - beq $1, $0, ext_store_u32 # if it's NULL perform an extended write - andi $2, $4, 0x7FFC # $2 = low 15bits of address (delay slot) - addu $1, $1, $2 # add the memory map offset - lw $2, -32768($1) # load the SMC status - bne $2, $0, smc_write # is there code there? - sw $5, ($1) # store the value (delay slot) - jr $ra # return - nop - - # 32bit ext aligned, non a2 destroying routines ext_store_io32a: |