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author | D G Turner | 2019-11-17 08:20:01 +0000 |
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committer | D G Turner | 2019-11-17 08:20:01 +0000 |
commit | 28287d70b6879ab140b90150d9bc747fbc17510d (patch) | |
tree | 4f833cfda95a2935693d0644e3c6024e0df2f8c6 /audio/softsynth/opl/dbopl.cpp | |
parent | 3d112e1622f416223e24e631af38960bb1c0e514 (diff) | |
download | scummvm-rg350-28287d70b6879ab140b90150d9bc747fbc17510d.tar.gz scummvm-rg350-28287d70b6879ab140b90150d9bc747fbc17510d.tar.bz2 scummvm-rg350-28287d70b6879ab140b90150d9bc747fbc17510d.zip |
AUDIO: Fix Missing Default Switch Cases
These are flagged by GCC if -Wswitch-default is enabled.
Diffstat (limited to 'audio/softsynth/opl/dbopl.cpp')
-rw-r--r-- | audio/softsynth/opl/dbopl.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/audio/softsynth/opl/dbopl.cpp b/audio/softsynth/opl/dbopl.cpp index 19be94cf69..275a1caa00 100644 --- a/audio/softsynth/opl/dbopl.cpp +++ b/audio/softsynth/opl/dbopl.cpp @@ -422,6 +422,8 @@ Bits Operator::TemplateVolume( ) { return ENV_MAX; } break; + default: + break; } volume = vol; return vol; @@ -753,6 +755,8 @@ void Channel::WriteC0( const Chip* chip, Bit8u val ) { case 3: chan0->synthHandler = &Channel::BlockTemplate< sm3AMAM >; break; + default: + break; } //Disable updating percussion channels } else if ((fourMask & 0x40) && ( chip->regBD & 0x20) ) { @@ -900,6 +904,8 @@ Channel* Channel::BlockTemplate( Chip* chip, Bit32u samples, Bit32s* output ) { // thus we leave this blank. // TODO: Consider checking this. break; + default: + break; } //Init the operators with the the current vibrato and tremolo values Op( 0 )->Prepare( chip ); @@ -985,6 +991,8 @@ Channel* Channel::BlockTemplate( Chip* chip, Bit32u samples, Bit32s* output ) { // thus we leave this blank. // TODO: Consider checking this. break; + default: + break; } } switch( mode ) { @@ -1011,6 +1019,8 @@ Channel* Channel::BlockTemplate( Chip* chip, Bit32u samples, Bit32s* output ) { // thus we leave this blank. // TODO: Consider checking this. break; + default: + break; } return 0; } @@ -1203,6 +1213,8 @@ void Chip::WriteReg( Bit32u reg, Bit8u val ) { case 0xf0 >> 4: REGOP( WriteE0 ); break; + default: + break; } } @@ -1216,6 +1228,9 @@ Bit32u Chip::WriteAddr( Bit32u port, Bit8u val ) { return 0x100 | val; else return val; + break; + default: + break; } return 0; } |