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author | Willem Jan Palenstijn | 2013-04-18 23:55:01 +0200 |
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committer | Willem Jan Palenstijn | 2013-05-08 20:47:44 +0200 |
commit | 102299630901d08a44ef3aec367fcbcae065b9fe (patch) | |
tree | 98db4bbe0c54176c0a43e2f5076f8b3d63b8065c /audio/softsynth/opl/dosbox.cpp | |
parent | 583f9abaf98f64895546b75573e9442ca47426e3 (diff) | |
parent | 78ba3210a57094086d44b25d5a8507c33ce9bef3 (diff) | |
download | scummvm-rg350-102299630901d08a44ef3aec367fcbcae065b9fe.tar.gz scummvm-rg350-102299630901d08a44ef3aec367fcbcae065b9fe.tar.bz2 scummvm-rg350-102299630901d08a44ef3aec367fcbcae065b9fe.zip |
Merge branch 'master'
Diffstat (limited to 'audio/softsynth/opl/dosbox.cpp')
-rw-r--r-- | audio/softsynth/opl/dosbox.cpp | 27 |
1 files changed, 21 insertions, 6 deletions
diff --git a/audio/softsynth/opl/dosbox.cpp b/audio/softsynth/opl/dosbox.cpp index e039845b8f..a1a736f9de 100644 --- a/audio/softsynth/opl/dosbox.cpp +++ b/audio/softsynth/opl/dosbox.cpp @@ -247,7 +247,7 @@ byte OPL::read(int port) { } void OPL::writeReg(int r, int v) { - byte tempReg = 0; + int tempReg = 0; switch (_type) { case Config::kOpl2: case Config::kDualOpl2: @@ -257,12 +257,27 @@ void OPL::writeReg(int r, int v) { // Backup old setup register tempReg = _reg.normal; - // We need to set the register we want to write to via port 0x388 - write(0x388, r); - // Do the real writing to the register - write(0x389, v); + // We directly allow writing to secondary OPL3 registers by using + // register values >= 0x100. + if (_type == Config::kOpl3 && r >= 0x100) { + // We need to set the register we want to write to via port 0x222, + // since we want to write to the secondary register set. + write(0x222, r); + // Do the real writing to the register + write(0x223, v); + } else { + // We need to set the register we want to write to via port 0x388 + write(0x388, r); + // Do the real writing to the register + write(0x389, v); + } + // Restore the old register - write(0x388, tempReg); + if (_type == Config::kOpl3 && tempReg >= 0x100) { + write(0x222, tempReg & ~0x100); + } else { + write(0x388, tempReg); + } break; }; } |