AUDIO: Rename clock() -> updateClock() in SID emulator

2 files changed, 20 insertions, 20 deletions

diff --git a/audio/softsynth/sid.cpp b/audio/softsynth/sid.cpp
index de8f0eeac5..40dc50e972 100644
--- a/audio/softsynth/sid.cpp
+++ b/audio/softsynth/sid.cpp
@@ -109,7 +109,7 @@ void WaveformGenerator::reset() {
 	msb_rising = false;
 }
 
-RESID_INLINE void WaveformGenerator::clock(cycle_count delta_t) {
+RESID_INLINE void WaveformGenerator::updateClock(cycle_count delta_t) {
 	// No operation if test bit is set.
 	if (test) {
 		return;
@@ -164,10 +164,10 @@ RESID_INLINE void WaveformGenerator::clock(cycle_count delta_t) {
 
 /**
  * Synchronize oscillators.
- * This must be done after all the oscillators have been clock()'ed since the
+ * This must be done after all the oscillators have been updateClock()'ed since the
  * oscillators operate in parallel.
  * Note that the oscillators must be clocked exactly on the cycle when the
- * MSB is set high for hard sync to operate correctly. See SID::clock().
+ * MSB is set high for hard sync to operate correctly. See SID::updateClock().
  */
 RESID_INLINE void WaveformGenerator::synchronize() {
 	// A special case occurs when a sync source is synced itself on the same
@@ -591,7 +591,7 @@ void Filter::set_Q() {
 	_1024_div_Q = static_cast<sound_sample>(1024.0/(0.707 + 1.0*res/0x0f));
 }
 
-RESID_INLINE void Filter::clock(cycle_count delta_t,
+RESID_INLINE void Filter::updateClock(cycle_count delta_t,
 				   sound_sample voice1,
 				   sound_sample voice2,
 				   sound_sample voice3)
@@ -887,7 +887,7 @@ reg8 EnvelopeGenerator::readENV() {
 	return output();
 }
 
-RESID_INLINE void EnvelopeGenerator::clock(cycle_count delta_t) {
+RESID_INLINE void EnvelopeGenerator::updateClock(cycle_count delta_t) {
 	// Check for ADSR delay bug.
 	// If the rate counter comparison value is set below the current value of the
 	// rate counter, the counter will continue counting up until it wraps around
@@ -1026,7 +1026,7 @@ void ExternalFilter::reset() {
 	Vo = 0;
 }
 
-RESID_INLINE void ExternalFilter::clock(cycle_count delta_t, sound_sample Vi) {
+RESID_INLINE void ExternalFilter::updateClock(cycle_count delta_t, sound_sample Vi) {
 	// This is handy for testing.
 	if (!enabled) {
 		// Remove maximum DC level since there is no filter to do it.
@@ -1316,7 +1316,7 @@ bool SID::set_sampling_parameters(double clock_freq,
 	return true;
 }
 
-void SID::clock(cycle_count delta_t) {
+void SID::updateClock(cycle_count delta_t) {
 	int i;
 
 	if (delta_t <= 0) {
@@ -1332,7 +1332,7 @@ void SID::clock(cycle_count delta_t) {
 
 	// Clock amplitude modulators.
 	for (i = 0; i < 3; i++) {
-		voice[i].envelope.clock(delta_t);
+		voice[i].envelope.updateClock(delta_t);
 	}
 
 	// Clock and synchronize oscillators.
@@ -1372,7 +1372,7 @@ void SID::clock(cycle_count delta_t) {
 
 		// Clock oscillators.
 		for (i = 0; i < 3; i++) {
-			voice[i].wave.clock(delta_t_min);
+			voice[i].wave.updateClock(delta_t_min);
 		}
 
 		// Synchronize oscillators.
@@ -1384,11 +1384,11 @@ void SID::clock(cycle_count delta_t) {
 	}
 
 	// Clock filter.
-	filter.clock(delta_t,
+	filter.updateClock(delta_t,
 		voice[0].output(), voice[1].output(), voice[2].output());
 
 	// Clock external filter.
-	extfilt.clock(delta_t, filter.output());
+	extfilt.updateClock(delta_t, filter.output());
 }
 
 
@@ -1396,7 +1396,7 @@ void SID::clock(cycle_count delta_t) {
  * SID clocking with audio sampling.
  * Fixpoint arithmetics is used.
  */
-int SID::clock(cycle_count& delta_t, short* buf, int n, int interleave) {
+int SID::updateClock(cycle_count& delta_t, short* buf, int n, int interleave) {
 	int s = 0;
 
 	for (;;) {
@@ -1408,13 +1408,13 @@ int SID::clock(cycle_count& delta_t, short* buf, int n, int interleave) {
 		if (s >= n) {
 			return s;
 		}
-		clock(delta_t_sample);
+		updateClock(delta_t_sample);
 		delta_t -= delta_t_sample;
 		sample_offset = (next_sample_offset & FIXP_MASK) - (1 << (FIXP_SHIFT - 1));
 		buf[s++*interleave] = output();
 	}
 
-	clock(delta_t);
+	updateClock(delta_t);
 	sample_offset -= delta_t << FIXP_SHIFT;
 	delta_t = 0;
 	return s;
diff --git a/audio/softsynth/sid.h b/audio/softsynth/sid.h
index c78f538441..d6e402dc3b 100644
--- a/audio/softsynth/sid.h
+++ b/audio/softsynth/sid.h
@@ -60,7 +60,7 @@ public:
 
 	void set_sync_source(WaveformGenerator*);
 
-	void clock(cycle_count delta_t);
+	void updateClock(cycle_count delta_t);
 	void synchronize();
 	void reset();
 
@@ -133,7 +133,7 @@ public:
 
 	void enable_filter(bool enable);
 
-	void clock(cycle_count delta_t,
+	void updateClock(cycle_count delta_t,
 		sound_sample voice1, sound_sample voice2, sound_sample voice3);
 	void reset();
 
@@ -201,7 +201,7 @@ public:
 
 	enum State { ATTACK, DECAY_SUSTAIN, RELEASE };
 
-	void clock(cycle_count delta_t);
+	void updateClock(cycle_count delta_t);
 	void reset();
 
 	void writeCONTROL_REG(reg8);
@@ -246,7 +246,7 @@ public:
 	void enable_filter(bool enable);
 	void set_sampling_parameter(double pass_freq);
 
-	void clock(cycle_count delta_t, sound_sample Vi);
+	void updateClock(cycle_count delta_t, sound_sample Vi);
 	void reset();
 
 	// Audio output (20 bits).
@@ -312,8 +312,8 @@ public:
 		double sample_freq, double pass_freq = -1,
 		double filter_scale = 0.97);
 
-	void clock(cycle_count delta_t);
-	int clock(cycle_count& delta_t, short* buf, int n, int interleave = 1);
+	void updateClock(cycle_count delta_t);
+	int updateClock(cycle_count& delta_t, short* buf, int n, int interleave = 1);
 	void reset();
 
 	// Read/write registers.