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authorAlyssa Milburn2011-06-08 19:30:22 +0200
committerAlyssa Milburn2011-06-08 19:30:22 +0200
commit15292870822ce469963077db32528a1a03cd6bff (patch)
tree89d7d09d6f3e002e35830be826f98d98f5364d2a /graphics/scaler
parent799ac4040f7f1bb657b6d61af3eedc58a1bf6c3b (diff)
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GRAPHICS: Move comment to the right function.
Diffstat (limited to 'graphics/scaler')
-rw-r--r--graphics/scaler/aspect.cpp25
1 files changed, 12 insertions, 13 deletions
diff --git a/graphics/scaler/aspect.cpp b/graphics/scaler/aspect.cpp
index 64a1cd1534..943395aff3 100644
--- a/graphics/scaler/aspect.cpp
+++ b/graphics/scaler/aspect.cpp
@@ -57,19 +57,6 @@ static inline void interpolate5Line(uint16 *dst, const uint16 *srcA, const uint1
template<typename ColorMask, int scale>
static inline void interpolate5Line(uint16 *dst, const uint16 *srcA, const uint16 *srcB, int width) {
- // For efficiency reasons we blit two pixels at a time, so it is important
- // that makeRectStretchable() guarantees that the width is even and that
- // the rect starts on a well-aligned address. (Even where unaligned memory
- // access is allowed there may be a speed penalty for it.)
-
- // These asserts are disabled for maximal speed; but I leave them in here
- // in case other people want to test if the memory alignment (to an
- // address divisible by 4) is really working properly.
- //assert(((int)dst & 3) == 0);
- //assert(((int)srcA & 3) == 0);
- //assert(((int)srcB & 3) == 0);
- //assert((width & 1) == 0);
-
if (scale == 1) {
while (width--) {
*dst++ = interpolate16_7_1<ColorMask>(*srcB++, *srcA++);
@@ -86,6 +73,18 @@ static inline void interpolate5Line(uint16 *dst, const uint16 *srcA, const uint1
template<typename ColorMask, int scale>
static inline void interpolate5Line(uint16 *dst, const uint16 *srcA, const uint16 *srcB, int width) {
+ // For efficiency reasons we blit two pixels at a time, so it is important
+ // that makeRectStretchable() guarantees that the width is even and that
+ // the rect starts on a well-aligned address. (Even where unaligned memory
+ // access is allowed there may be a speed penalty for it.)
+
+ // These asserts are disabled for maximal speed; but I leave them in here
+ // in case other people want to test if the memory alignment (to an
+ // address divisible by 4) is really working properly.
+ //assert(((int)dst & 3) == 0);
+ //assert(((int)srcA & 3) == 0);
+ //assert(((int)srcB & 3) == 0);
+ //assert((width & 1) == 0);
width /= 2;
const uint32 *sA = (const uint32 *)srcA;