diff options
author | neonloop | 2022-08-16 23:47:42 +0000 |
---|---|---|
committer | neonloop | 2022-08-16 23:47:42 +0000 |
commit | bf61547f8ce8967c73c0568c05bfaa3d71c07f53 (patch) | |
tree | 1bc122b198865cc3311dee690d9387917fb0a5ee /source/arm_dynarec/opgen.h | |
parent | 479872a8d30b092671ed49868748e48830bc36da (diff) | |
parent | ce34e879e348cecd4e21329be5974cc4162fa6c4 (diff) | |
download | snes9x2005-bf61547f8ce8967c73c0568c05bfaa3d71c07f53.tar.gz snes9x2005-bf61547f8ce8967c73c0568c05bfaa3d71c07f53.tar.bz2 snes9x2005-bf61547f8ce8967c73c0568c05bfaa3d71c07f53.zip |
Merge branch 'dynarec' into performanceperformance
Diffstat (limited to 'source/arm_dynarec/opgen.h')
-rw-r--r-- | source/arm_dynarec/opgen.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/source/arm_dynarec/opgen.h b/source/arm_dynarec/opgen.h new file mode 100644 index 0000000..aaa5556 --- /dev/null +++ b/source/arm_dynarec/opgen.h @@ -0,0 +1,26 @@ +/* Macros turn opcode tables into code */ + +#define F8(F) F##8 +#define F16(F) F##16 +#define EF(F) 0, F16(F), F16(F) +#define NF(F) 0, F, F +#define NF8(F) 0, F8(F), F8(F) +#define NF16(F) 0, F16(F), F16(F) +#define MF(F) (CheckEmulation() || CheckMemory()), F8(F), F16(F) +#define XF(F) (CheckEmulation() || CheckIndex()), F8(F), F16(F) + +#define C (Carry) +#define Z (Zero) +#define V (Overflow) +#define NZ (Negative | Zero) +#define NZC (Negative | Zero | Carry) +#define NZV (Negative | Zero | Overflow) +#define NZCV (Negative | Zero | Carry | Overflow) + +switch(opcode = *pc++) { + +#include "opdef.h" + +default: \ + printf("Invalid opcode : 0x%X\n", opcode); \ +} |