aboutsummaryrefslogtreecommitdiff
path: root/source/cpuexec.c
diff options
context:
space:
mode:
authorTwinaphex2017-06-18 18:41:06 +0200
committerGitHub2017-06-18 18:41:06 +0200
commit1aecedc999445e9a27e04f665fd562b576775d08 (patch)
treec526c7d332be548a42364eea9113b6d33345b840 /source/cpuexec.c
parentdc596c886e0ec2728dc353dd7862cdf1e5a5ff44 (diff)
parentbcaf44c511efaad9d803dde9b0fdbb046498c66f (diff)
downloadsnes9x2005-1aecedc999445e9a27e04f665fd562b576775d08.tar.gz
snes9x2005-1aecedc999445e9a27e04f665fd562b576775d08.tar.bz2
snes9x2005-1aecedc999445e9a27e04f665fd562b576775d08.zip
Merge pull request #36 from jamsilva/master
Compatibility fixes.
Diffstat (limited to 'source/cpuexec.c')
-rw-r--r--source/cpuexec.c88
1 files changed, 19 insertions, 69 deletions
diff --git a/source/cpuexec.c b/source/cpuexec.c
index d7151be..98e321f 100644
--- a/source/cpuexec.c
+++ b/source/cpuexec.c
@@ -6,17 +6,16 @@
#include "ppu.h"
#include "cpuexec.h"
#include "gfx.h"
-#include "missing.h"
#include "apu.h"
#include "dma.h"
#include "fxemu.h"
#include "sa1.h"
#include "spc7110.h"
-void S9xMainLoop_SA1_SFX();
-void S9xMainLoop_SA1_NoSFX();
-void S9xMainLoop_NoSA1_SFX();
-void S9xMainLoop_NoSA1_NoSFX();
+void S9xMainLoop_SA1_SFX(void);
+void S9xMainLoop_SA1_NoSFX(void);
+void S9xMainLoop_NoSA1_SFX(void);
+void S9xMainLoop_NoSA1_NoSFX(void);
/*
* This is a CATSFC modification inspired by a Snes9x-Euphoria modification.
@@ -31,13 +30,17 @@ void S9xMainLoop()
{
if (Settings.SA1)
{
- if (Settings.SuperFX) S9xMainLoop_SA1_SFX();
- else S9xMainLoop_SA1_NoSFX();
+ if (Settings.SuperFX)
+ S9xMainLoop_SA1_SFX();
+ else
+ S9xMainLoop_SA1_NoSFX();
}
else
{
- if (Settings.SuperFX) S9xMainLoop_NoSA1_SFX();
- else S9xMainLoop_NoSA1_NoSFX();
+ if (Settings.SuperFX)
+ S9xMainLoop_NoSA1_SFX();
+ else
+ S9xMainLoop_NoSA1_NoSFX();
}
}
@@ -86,9 +89,7 @@ void S9xMainLoop_SA1_SFX()
break;
}
-#ifdef CPU_SHUTDOWN
CPU.PCAtOpcodeStart = CPU.PC;
-#endif
CPU.Cycles += CPU.MemSpeed;
(*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
@@ -103,8 +104,7 @@ void S9xMainLoop_SA1_SFX()
IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
S9xAPUPackStatus();
#endif
- if (CPU.Flags & SCAN_KEYS_FLAG)
- CPU.Flags &= ~SCAN_KEYS_FLAG;
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xMainLoop_SA1_NoSFX()
@@ -152,9 +152,7 @@ void S9xMainLoop_SA1_NoSFX()
break;
}
-#ifdef CPU_SHUTDOWN
CPU.PCAtOpcodeStart = CPU.PC;
-#endif
CPU.Cycles += CPU.MemSpeed;
(*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
@@ -169,8 +167,7 @@ void S9xMainLoop_SA1_NoSFX()
IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
S9xAPUPackStatus();
#endif
- if (CPU.Flags & SCAN_KEYS_FLAG)
- CPU.Flags &= ~SCAN_KEYS_FLAG;
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xMainLoop_NoSA1_SFX()
@@ -218,9 +215,7 @@ void S9xMainLoop_NoSA1_SFX()
break;
}
-#ifdef CPU_SHUTDOWN
CPU.PCAtOpcodeStart = CPU.PC;
-#endif
CPU.Cycles += CPU.MemSpeed;
(*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
DO_HBLANK_CHECK_SFX();
@@ -232,8 +227,7 @@ void S9xMainLoop_NoSA1_SFX()
IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
S9xAPUPackStatus();
#endif
- if (CPU.Flags & SCAN_KEYS_FLAG)
- CPU.Flags &= ~SCAN_KEYS_FLAG;
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xMainLoop_NoSA1_NoSFX()
@@ -281,9 +275,7 @@ void S9xMainLoop_NoSA1_NoSFX()
break;
}
-#ifdef CPU_SHUTDOWN
CPU.PCAtOpcodeStart = CPU.PC;
-#endif
CPU.Cycles += CPU.MemSpeed;
(*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
DO_HBLANK_CHECK_NoSFX();
@@ -295,8 +287,7 @@ void S9xMainLoop_NoSA1_NoSFX()
IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
S9xAPUPackStatus();
#endif
- if (CPU.Flags & SCAN_KEYS_FLAG)
- CPU.Flags &= ~SCAN_KEYS_FLAG;
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xSetIRQ(uint32_t source)
@@ -329,19 +320,15 @@ void S9xClearIRQ(uint32_t source)
*/
void S9xDoHBlankProcessing_SFX()
{
-#ifdef CPU_SHUTDOWN
CPU.WaitCounter++;
-#endif
switch (CPU.WhichEvent)
{
case HBLANK_START_EVENT:
if (IPPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight)
IPPU.HDMA = S9xDoHDMA(IPPU.HDMA);
break;
-
case HBLANK_END_EVENT:
S9xSuperFXExec();
-
#ifndef USE_BLARGG_APU
CPU.Cycles -= Settings.H_Max;
if (IAPU.APUExecuting)
@@ -354,7 +341,6 @@ void S9xDoHBlankProcessing_SFX()
S9xAPUSetReferenceTime(CPU.Cycles);
#endif
CPU.NextEvent = -1;
- ICPU.Scanline++;
if (++CPU.V_Counter >= (Settings.PAL ? SNES_MAX_PAL_VCOUNTER : SNES_MAX_NTSC_VCOUNTER))
{
@@ -363,7 +349,6 @@ void S9xDoHBlankProcessing_SFX()
PPU.RangeTimeOver = 0;
CPU.NMIActive = false;
ICPU.Frame++;
- PPU.HVBeamCounterLatched = 0;
CPU.Flags |= SCAN_KEYS_FLAG;
S9xStartHDMA();
}
@@ -377,8 +362,6 @@ void S9xDoHBlankProcessing_SFX()
S9xEndScreenRefresh();
IPPU.HDMA = 0;
// Bits 7 and 6 of $4212 are computed when read in S9xGetPPU.
- missing.dma_this_frame = 0;
- IPPU.MaxBrightness = PPU.Brightness;
PPU.ForcedBlanking = (Memory.FillRAM [0x2100] >> 7) & 1;
if (!PPU.ForcedBlanking)
@@ -418,13 +401,7 @@ void S9xDoHBlankProcessing_SFX()
if (CPU.V_Counter >= FIRST_VISIBLE_LINE &&
CPU.V_Counter < PPU.ScreenHeight + FIRST_VISIBLE_LINE)
RenderLine(CPU.V_Counter - FIRST_VISIBLE_LINE);
-
#ifndef USE_BLARGG_APU
- // Use TimerErrorCounter to skip update of SPC700 timers once
- // every 128 updates. Needed because this section of code is called
- // once every emulated 63.5 microseconds, which coresponds to
- // 15.750KHz, but the SPC700 timers need to be updated at multiples
- // of 8KHz, hence the error correction.
{
if (APU.TimerEnabled [2])
{
@@ -433,10 +410,8 @@ void S9xDoHBlankProcessing_SFX()
{
IAPU.RAM [0xff] = (IAPU.RAM [0xff] + 1) & 0xf;
APU.Timer [2] -= APU.TimerTarget [2];
-#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
IAPU.APUExecuting = true;
-#endif
}
}
if (CPU.V_Counter & 1)
@@ -448,10 +423,8 @@ void S9xDoHBlankProcessing_SFX()
{
IAPU.RAM [0xfd] = (IAPU.RAM [0xfd] + 1) & 0xf;
APU.Timer [0] = 0;
-#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
IAPU.APUExecuting = true;
-#endif
}
}
if (APU.TimerEnabled [1])
@@ -461,41 +434,34 @@ void S9xDoHBlankProcessing_SFX()
{
IAPU.RAM [0xfe] = (IAPU.RAM [0xfe] + 1) & 0xf;
APU.Timer [1] = 0;
-#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
IAPU.APUExecuting = true;
-#endif
}
}
}
}
-#endif // #ifndef USE_BLARGG_APU
+#endif
break;
-
case HTIMER_BEFORE_EVENT:
case HTIMER_AFTER_EVENT:
- if (PPU.HTimerEnabled && (!PPU.VTimerEnabled
- || CPU.V_Counter == PPU.IRQVBeamPos))
+ if (PPU.HTimerEnabled && (!PPU.VTimerEnabled || CPU.V_Counter == PPU.IRQVBeamPos))
S9xSetIRQ(PPU_H_BEAM_IRQ_SOURCE);
break;
}
S9xReschedule();
}
+
void S9xDoHBlankProcessing_NoSFX()
{
-#ifdef CPU_SHUTDOWN
CPU.WaitCounter++;
-#endif
switch (CPU.WhichEvent)
{
case HBLANK_START_EVENT:
if (IPPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight)
IPPU.HDMA = S9xDoHDMA(IPPU.HDMA);
break;
-
case HBLANK_END_EVENT:
-
#ifndef USE_BLARGG_APU
CPU.Cycles -= Settings.H_Max;
if (IAPU.APUExecuting)
@@ -507,9 +473,7 @@ void S9xDoHBlankProcessing_NoSFX()
CPU.Cycles -= Settings.H_Max;
S9xAPUSetReferenceTime(CPU.Cycles);
#endif
-
CPU.NextEvent = -1;
- ICPU.Scanline++;
if (++CPU.V_Counter >= (Settings.PAL ? SNES_MAX_PAL_VCOUNTER : SNES_MAX_NTSC_VCOUNTER))
{
@@ -518,7 +482,6 @@ void S9xDoHBlankProcessing_NoSFX()
PPU.RangeTimeOver = 0;
CPU.NMIActive = false;
ICPU.Frame++;
- PPU.HVBeamCounterLatched = 0;
CPU.Flags |= SCAN_KEYS_FLAG;
S9xStartHDMA();
}
@@ -532,8 +495,6 @@ void S9xDoHBlankProcessing_NoSFX()
S9xEndScreenRefresh();
IPPU.HDMA = 0;
// Bits 7 and 6 of $4212 are computed when read in S9xGetPPU.
- missing.dma_this_frame = 0;
- IPPU.MaxBrightness = PPU.Brightness;
PPU.ForcedBlanking = (Memory.FillRAM [0x2100] >> 7) & 1;
if (!PPU.ForcedBlanking)
@@ -573,11 +534,6 @@ void S9xDoHBlankProcessing_NoSFX()
if (CPU.V_Counter >= FIRST_VISIBLE_LINE &&
CPU.V_Counter < PPU.ScreenHeight + FIRST_VISIBLE_LINE)
RenderLine(CPU.V_Counter - FIRST_VISIBLE_LINE);
- // Use TimerErrorCounter to skip update of SPC700 timers once
- // every 128 updates. Needed because this section of code is called
- // once every emulated 63.5 microseconds, which coresponds to
- // 15.750KHz, but the SPC700 timers need to be updated at multiples
- // of 8KHz, hence the error correction.
#ifndef USE_BLARGG_APU
{
if (APU.TimerEnabled [2])
@@ -587,10 +543,8 @@ void S9xDoHBlankProcessing_NoSFX()
{
IAPU.RAM [0xff] = (IAPU.RAM [0xff] + 1) & 0xf;
APU.Timer [2] -= APU.TimerTarget [2];
-#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
IAPU.APUExecuting = true;
-#endif
}
}
if (CPU.V_Counter & 1)
@@ -602,10 +556,8 @@ void S9xDoHBlankProcessing_NoSFX()
{
IAPU.RAM [0xfd] = (IAPU.RAM [0xfd] + 1) & 0xf;
APU.Timer [0] = 0;
-#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
IAPU.APUExecuting = true;
-#endif
}
}
if (APU.TimerEnabled [1])
@@ -615,10 +567,8 @@ void S9xDoHBlankProcessing_NoSFX()
{
IAPU.RAM [0xfe] = (IAPU.RAM [0xfe] + 1) & 0xf;
APU.Timer [1] = 0;
-#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
IAPU.APUExecuting = true;
-#endif
}
}
}