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authorTwinaphex2017-02-12 16:02:47 +0100
committerGitHub2017-02-12 16:02:47 +0100
commit474a67ccdccb89d369c706347085ca4619f0cbef (patch)
treecb331b665bc5d53ad180d5500bf37e2dfbf683d8 /source/getset.h
parentb6006bc542f89ad1b7086268f851f0ba880ad6cd (diff)
parentfb2517282da2fdfc26e58207bbb8e0a8bca35be2 (diff)
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Merge pull request #31 from jamsilva/master
Improvements to both accuracy and performance.
Diffstat (limited to 'source/getset.h')
-rw-r--r--source/getset.h97
1 files changed, 28 insertions, 69 deletions
diff --git a/source/getset.h b/source/getset.h
index b0abba5..7d28a04 100644
--- a/source/getset.h
+++ b/source/getset.h
@@ -37,9 +37,6 @@ INLINE uint8_t S9xGetByte(uint32_t Address)
case MAP_CPU:
return (S9xGetCPU(Address & 0xffff));
case MAP_DSP:
-#ifdef DSP_DUMMY_LOOPS
- printf("Get DSP Byte @ %06X\n", Address);
-#endif
return (S9xGetDSP(Address & 0xffff));
case MAP_SA1RAM:
case MAP_LOROM_SRAM:
@@ -54,7 +51,7 @@ INLINE uint8_t S9xGetByte(uint32_t Address)
case MAP_BWRAM:
return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)));
case MAP_C4:
- return (S9xGetC4(Address & 0xffff));
+ return S9xGetC4(Address & 0xffff);
case MAP_SPC7110_ROM:
return S9xGetSPC7110Byte(Address);
case MAP_SPC7110_DRAM:
@@ -65,7 +62,6 @@ INLINE uint8_t S9xGetByte(uint32_t Address)
return S9xGetSetaDSP(Address);
case MAP_SETA_RISC:
return S9xGetST018(Address);
- case MAP_DEBUG:
default:
return OpenBus;
}
@@ -79,13 +75,11 @@ INLINE uint16_t S9xGetWord(uint32_t Address)
return (OpenBus | (S9xGetByte(Address + 1) << 8));
}
int32_t block;
- uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) &
- MEMMAP_MASK];
+ uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
if (!CPU.InDMA)
CPU.Cycles += (Memory.MemorySpeed [block] << 1);
-
if (GetAddress >= (uint8_t*) MAP_LAST)
{
#ifdef CPU_SHUTDOWN
@@ -95,25 +89,18 @@ INLINE uint16_t S9xGetWord(uint32_t Address)
#ifdef FAST_LSB_WORD_ACCESS
return (*(uint16_t*)(GetAddress + (Address & 0xffff)));
#else
- return (*(GetAddress + (Address & 0xffff)) |
- (*(GetAddress + (Address & 0xffff) + 1) << 8));
+ return (*(GetAddress + (Address & 0xffff)) | (*(GetAddress + (Address & 0xffff) + 1) << 8));
#endif
}
switch ((intptr_t) GetAddress)
{
case MAP_PPU:
- return (S9xGetPPU(Address & 0xffff) |
- (S9xGetPPU((Address + 1) & 0xffff) << 8));
+ return (S9xGetPPU(Address & 0xffff) | (S9xGetPPU((Address + 1) & 0xffff) << 8));
case MAP_CPU:
- return (S9xGetCPU(Address & 0xffff) |
- (S9xGetCPU((Address + 1) & 0xffff) << 8));
+ return (S9xGetCPU(Address & 0xffff) | (S9xGetCPU((Address + 1) & 0xffff) << 8));
case MAP_DSP:
-#ifdef DSP_DUMMY_LOOPS
- printf("Get DSP Word @ %06X\n", Address);
-#endif
- return (S9xGetDSP(Address & 0xffff) |
- (S9xGetDSP((Address + 1) & 0xffff) << 8));
+ return (S9xGetDSP(Address & 0xffff) | (S9xGetDSP((Address + 1) & 0xffff) << 8));
case MAP_SA1RAM:
case MAP_LOROM_SRAM:
//Address &0x7FFF -offset into bank
@@ -123,10 +110,8 @@ INLINE uint16_t S9xGetWord(uint32_t Address)
/* BJ: no FAST_LSB_WORD_ACCESS here, since if Memory.SRAMMask=0x7ff
* then the high byte doesn't follow the low byte. */
return
- (*(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | (Address & 0x7FFF))
- &Memory.SRAMMask))) |
- ((*(Memory.SRAM + (((((Address + 1) & 0xFF0000) >> 1) | ((
- Address + 1) & 0x7FFF)) &Memory.SRAMMask))) << 8);
+ (*(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | (Address & 0x7FFF)) & Memory.SRAMMask))) |
+ ((*(Memory.SRAM + (((((Address + 1) & 0xFF0000) >> 1) | ((Address + 1) & 0x7FFF)) & Memory.SRAMMask))) << 8);
case MAP_RONLY_SRAM:
case MAP_HIROM_SRAM:
/* BJ: no FAST_LSB_WORD_ACCESS here, since if Memory.SRAMMask=0x7ff
@@ -141,18 +126,14 @@ INLINE uint16_t S9xGetWord(uint32_t Address)
#ifdef FAST_LSB_WORD_ACCESS
return (*(uint16_t*)(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)));
#else
- return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) |
- (*(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) << 8));
+ return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) | (*(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) << 8));
#endif
case MAP_C4:
- return (S9xGetC4(Address & 0xffff) |
- (S9xGetC4((Address + 1) & 0xffff) << 8));
+ return (S9xGetC4(Address & 0xffff) | (S9xGetC4((Address + 1) & 0xffff) << 8));
case MAP_SPC7110_ROM:
- return (S9xGetSPC7110Byte(Address) |
- (S9xGetSPC7110Byte(Address + 1)) << 8);
+ return (S9xGetSPC7110Byte(Address) | (S9xGetSPC7110Byte(Address + 1)) << 8);
case MAP_SPC7110_DRAM:
- return (S9xGetSPC7110(0x4800) |
- (S9xGetSPC7110(0x4800) << 8));
+ return (S9xGetSPC7110(0x4800) | (S9xGetSPC7110(0x4800) << 8));
case MAP_OBC_RAM:
return GetOBC1(Address & 0xFFFF) | (GetOBC1((Address + 1) & 0xFFFF) << 8);
case MAP_SETA_DSP:
@@ -170,8 +151,7 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address)
CPU.WaitAddress = NULL;
#endif
int32_t block;
- uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) &
- MEMMAP_MASK)];
+ uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)];
if (!CPU.InDMA)
CPU.Cycles += Memory.MemorySpeed [block];
@@ -203,24 +183,19 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address)
S9xSetCPU(Byte, Address & 0xffff);
return;
case MAP_DSP:
-#ifdef DSP_DUMMY_LOOPS
- printf("DSP Byte: %02X to %06X\n", Byte, Address);
-#endif
S9xSetDSP(Byte, Address & 0xffff);
return;
case MAP_LOROM_SRAM:
if (Memory.SRAMMask)
{
- *(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | (Address & 0x7FFF))&
- Memory.SRAMMask)) = Byte;
+ *(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | (Address & 0x7FFF)) & Memory.SRAMMask)) = Byte;
CPU.SRAMModified = true;
}
return;
case MAP_HIROM_SRAM:
if (Memory.SRAMMask)
{
- *(Memory.SRAM + (((Address & 0x7fff) - 0x6000 +
- ((Address & 0xf0000) >> 3)) & Memory.SRAMMask)) = Byte;
+ *(Memory.SRAM + (((Address & 0x7fff) - 0x6000 + ((Address & 0xf0000) >> 3)) & Memory.SRAMMask)) = Byte;
CPU.SRAMModified = true;
}
return;
@@ -228,7 +203,6 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address)
*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = Byte;
CPU.SRAMModified = true;
return;
- case MAP_DEBUG:
case MAP_SA1RAM:
*(Memory.SRAM + (Address & 0xffff)) = Byte;
SA1.Executing = !SA1.Waiting;
@@ -266,8 +240,7 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address)
CPU.WaitAddress = NULL;
#endif
int32_t block;
- uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) &
- MEMMAP_MASK)];
+ uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)];
if (!CPU.InDMA)
CPU.Cycles += Memory.MemorySpeed [block] << 1;
@@ -284,7 +257,7 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address)
SA1.WaitCounter = 0;
}
#ifdef FAST_LSB_WORD_ACCESS
- *(uint16_t*) SetAddress = Word;
+ *(uint16_t*)SetAddress = Word;
#else
*SetAddress = (uint8_t) Word;
*(SetAddress + 1) = Word >> 8;
@@ -307,14 +280,11 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address)
S9xSetPPU(Word >> 8, (Address & 0xffff) + 1);
return;
case MAP_CPU:
- S9xSetCPU((uint8_t) Word, (Address & 0xffff));
+ S9xSetCPU((uint8_t) Word, Address & 0xffff);
S9xSetCPU(Word >> 8, (Address & 0xffff) + 1);
return;
case MAP_DSP:
-#ifdef DSP_DUMMY_LOOPS
- printf("DSP Word: %04X to %06X\n", Word, Address);
-#endif
- S9xSetDSP((uint8_t) Word, (Address & 0xffff));
+ S9xSetDSP((uint8_t) Word, Address & 0xffff);
S9xSetDSP(Word >> 8, (Address & 0xffff) + 1);
return;
case MAP_LOROM_SRAM:
@@ -322,11 +292,8 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address)
{
/* BJ: no FAST_LSB_WORD_ACCESS here, since if Memory.SRAMMask=0x7ff
* then the high byte doesn't follow the low byte. */
- *(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | (Address & 0x7FFF))&
- Memory.SRAMMask)) = (uint8_t) Word;
- *(Memory.SRAM + (((((Address + 1) & 0xFF0000) >> 1) | ((
- Address + 1) & 0x7FFF))& Memory.SRAMMask)) = Word >> 8;
-
+ *(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | (Address & 0x7FFF)) & Memory.SRAMMask)) = (uint8_t) Word;
+ *(Memory.SRAM + (((((Address + 1) & 0xFF0000) >> 1) | ((Address + 1) & 0x7FFF))& Memory.SRAMMask)) = Word >> 8;
CPU.SRAMModified = true;
}
return;
@@ -349,11 +316,10 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address)
*(uint16_t*)(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = Word;
#else
*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = (uint8_t) Word;
- *(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) = (uint8_t)(Word >> 8);
+ *(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) = (uint8_t) (Word >> 8);
#endif
CPU.SRAMModified = true;
return;
- case MAP_DEBUG:
case MAP_SPC7110_DRAM:
s7r.bank50[(Address & 0xffff)] = (uint8_t) Word;
s7r.bank50[((Address + 1) & 0xffff)] = (uint8_t) Word;
@@ -400,22 +366,21 @@ INLINE uint8_t* GetBasePointer(uint32_t Address)
case MAP_PPU: //just a guess, but it looks like this should match the CPU as a source.
case MAP_CPU: //fixes Ogre Battle's green lines
case MAP_OBC_RAM:
- return (Memory.FillRAM);
+ return Memory.FillRAM;
case MAP_DSP:
return (Memory.FillRAM - 0x6000);
case MAP_SA1RAM:
case MAP_LOROM_SRAM:
- return (Memory.SRAM);
+ case MAP_SETA_DSP:
+ return Memory.SRAM;
case MAP_BWRAM:
return (Memory.BWRAM - 0x6000);
case MAP_HIROM_SRAM:
return (Memory.SRAM - 0x6000);
case MAP_C4:
return (Memory.C4RAM - 0x6000);
- case MAP_SETA_DSP:
- return Memory.SRAM;
default:
- return (0);
+ return NULL;
}
}
@@ -431,7 +396,7 @@ INLINE uint8_t* S9xGetMemPointer(uint32_t Address)
switch ((intptr_t) GetAddress)
{
case MAP_SPC7110_DRAM:
- return &s7r.bank50[Address & 0x0000FFFF];
+ return &s7r.bank50[Address & 0xffff];
case MAP_PPU:
return (Memory.FillRAM + (Address & 0xffff));
case MAP_CPU:
@@ -452,7 +417,7 @@ INLINE uint8_t* S9xGetMemPointer(uint32_t Address)
case MAP_SETA_DSP:
return Memory.SRAM + ((Address & 0xffff) & Memory.SRAMMask);
default:
- return (0);
+ return NULL;
}
}
@@ -470,18 +435,12 @@ INLINE void S9xSetPCBase(uint32_t Address)
switch ((intptr_t) GetAddress)
{
case MAP_PPU:
- CPU.PCBase = Memory.FillRAM;
- break;
case MAP_CPU:
CPU.PCBase = Memory.FillRAM;
break;
case MAP_DSP:
CPU.PCBase = Memory.FillRAM - 0x6000;
break;
- case MAP_SA1RAM:
- case MAP_LOROM_SRAM:
- CPU.PCBase = Memory.SRAM;
- break;
case MAP_BWRAM:
CPU.PCBase = Memory.BWRAM - 0x6000;
break;