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| author | João Silva | 2017-08-26 00:26:09 +0100 |
|---|---|---|
| committer | João Silva | 2017-08-26 00:26:09 +0100 |
| commit | 7becd31bfe9ba0cd77ed9dc034563e0ab513a8c9 (patch) | |
| tree | 33e4229f9175a51e5fc309d05b5f83f3de19251f /source/spc700.c | |
| parent | 3013ee57130a36b8bd4c314c659c100c3885cd80 (diff) | |
| download | snes9x2005-7becd31bfe9ba0cd77ed9dc034563e0ab513a8c9.tar.gz snes9x2005-7becd31bfe9ba0cd77ed9dc034563e0ab513a8c9.tar.bz2 snes9x2005-7becd31bfe9ba0cd77ed9dc034563e0ab513a8c9.zip | |
Still cleaning things up...
Diffstat (limited to 'source/spc700.c')
| -rw-r--r-- | source/spc700.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/source/spc700.c b/source/spc700.c index c5ea4ef..f16ba5b 100644 --- a/source/spc700.c +++ b/source/spc700.c @@ -111,14 +111,14 @@ uint32_t Work32 = 0; #define Pop(b) \ IAPU.Registers.S++; \ - (b) = *(IAPU.RAM + 0x100 + IAPU.Registers.S) + (b) = IAPU.RAM[0x100 + IAPU.Registers.S] #ifdef FAST_LSB_WORD_ACCESS #define PushW(w) \ if (IAPU.Registers.S == 0) \ {\ - *(IAPU.RAM + 0x1ff) = (w); \ - *(IAPU.RAM + 0x100) = ((w) >> 8); \ + IAPU.RAM[0x1ff] = (w); \ + IAPU.RAM[0x100] = ((w) >> 8); \ } \ else \ *(uint16_t *) (IAPU.RAM + 0xff + IAPU.Registers.S) = w; \ @@ -127,21 +127,21 @@ uint32_t Work32 = 0; #define PopW(w) \ IAPU.Registers.S += 2; \ if (IAPU.Registers.S == 0) \ - (w) = *(IAPU.RAM + 0x1ff) | (*(IAPU.RAM + 0x100) << 8); \ + (w) = IAPU.RAM[0x1ff] | (IAPU.RAM[0x100] << 8); \ else \ (w) = *(uint16_t *) (IAPU.RAM + 0xff + IAPU.Registers.S) #else #define PushW(w) \ - *(IAPU.RAM + 0xff + IAPU.Registers.S) = w; \ - *(IAPU.RAM + 0x100 + IAPU.Registers.S) = ((w) >> 8); \ + IAPU.RAM[0xff + IAPU.Registers.S] = w; \ + IAPU.RAM[0x100 + IAPU.Registers.S] = ((w) >> 8); \ IAPU.Registers.S -= 2 #define PopW(w) \ IAPU.Registers.S += 2; \ if(IAPU.Registers.S == 0) \ - (w) = *(IAPU.RAM + 0x1ff) | (*(IAPU.RAM + 0x100) << 8); \ + (w) = IAPU.RAM[0x1ff] | (IAPU.RAM[0x100] << 8); \ else \ - (w) = *(IAPU.RAM + 0xff + IAPU.Registers.S) + (*(IAPU.RAM + 0x100 + IAPU.Registers.S) << 8) + (w) = IAPU.RAM[0xff + IAPU.Registers.S] + (IAPU.RAM[0x100 + IAPU.Registers.S] << 8) #endif #define Relative() \ @@ -174,8 +174,8 @@ uint32_t Work32 = 0; IAPU.Address = *(uint16_t *) (IAPU.DirectPage + OP1) + IAPU.Registers.YA.B.Y; #else #define IndexedXIndirect() \ - IAPU.Address = *(IAPU.DirectPage + ((OP1 + IAPU.Registers.X) & 0xff)) + \ - (*(IAPU.DirectPage + ((OP1 + IAPU.Registers.X + 1) & 0xff)) << 8); + IAPU.Address = IAPU.DirectPage[(OP1 + IAPU.Registers.X) & 0xff] + \ + (IAPU.DirectPage[(OP1 + IAPU.Registers.X + 1) & 0xff] << 8); #define Absolute() \ IAPU.Address = OP1 + (OP2 << 8); @@ -192,8 +192,8 @@ uint32_t Work32 = 0; IAPU.Address &= 0x1fff; #define IndirectIndexedY() \ - IAPU.Address = *(IAPU.DirectPage + OP1) + \ - (*(IAPU.DirectPage + OP1 + 1) << 8) + \ + IAPU.Address = IAPU.DirectPage[OP1] + \ + (IAPU.DirectPage[OP1 + 1] << 8) + \ IAPU.Registers.YA.B.Y; #endif |