aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--source/cpuaddr.h10
-rw-r--r--source/port.h5
2 files changed, 15 insertions, 0 deletions
diff --git a/source/cpuaddr.h b/source/cpuaddr.h
index 34fb41b..91a0347 100644
--- a/source/cpuaddr.h
+++ b/source/cpuaddr.h
@@ -256,6 +256,11 @@ static void AbsoluteLong (AccessMode a, InternalOp op)
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
Addr = (*(uint32 *) CPU.PC) & 0xffffff;
+#elif defined FAST_ALIGNED_LSB_WORD_ACCESS
+ if (((int) CPU.PC & 1) == 0)
+ Addr = (*(uint16 *) CPU.PC) + (*(CPU.PC + 2) << 16);
+ else
+ Addr = *CPU.PC + ((*(uint16 *) (CPU.PC + 1)) << 8);
#else
Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16);
#endif
@@ -434,6 +439,11 @@ static void AbsoluteLongIndexedX (AccessMode a, InternalOp op)
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
Addr = (*(uint32 *) CPU.PC + ICPU.Registers.X.W) & 0xffffff;
+#elif defined FAST_ALIGNED_LSB_WORD_ACCESS
+ if (((int) CPU.PC & 1) == 0)
+ Addr = ((*(uint16 *) CPU.PC) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xFFFFFF;
+ else
+ Addr = (*CPU.PC + ((*(uint16 *) (CPU.PC + 1)) << 8) + ICPU.Registers.X.W) & 0xFFFFFF;
#else
Addr = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xffffff;
#endif
diff --git a/source/port.h b/source/port.h
index 5b94d06..1e34410 100644
--- a/source/port.h
+++ b/source/port.h
@@ -274,6 +274,11 @@ EXTERN_C void MixSound(void);
defined(__WIN32__) || defined(__alpha__)
#define LSB_FIRST
#define FAST_LSB_WORD_ACCESS
+#elif defined(__MIPSEL__)
+#define LSB_FIRST
+// On little-endian MIPS, a 16-bit word can be read directly from an address
+// only if it's aligned.
+#define FAST_ALIGNED_LSB_WORD_ACCESS
#else
//#define MSB_FIRST
#define LSB_FIRST