diff options
Diffstat (limited to 'source')
52 files changed, 2553 insertions, 3295 deletions
diff --git a/source/65c816.h b/source/65c816.h index 1d8eb60..91a165b 100644 --- a/source/65c816.h +++ b/source/65c816.h @@ -20,11 +20,11 @@ #define Zero 2 #define IRQ 4 #define Decimal 8 -#define IndexFlag 16 -#define MemoryFlag 32 -#define Overflow 64 -#define Negative 128 -#define Emulation 256 +#define IndexFlag 16 +#define MemoryFlag 32 +#define Overflow 64 +#define Negative 128 +#define Emulation 256 #define SetCarry() (ICPU._Carry = 1) #define ClearCarry() (ICPU._Carry = 0) diff --git a/source/apu.c b/source/apu.c index dbbe8e0..9d18242 100644 --- a/source/apu.c +++ b/source/apu.c @@ -66,11 +66,9 @@ void S9xResetAPU() S9xAPUUnpackStatus(); IAPU.Registers.PC = 0; IAPU.APUExecuting = Settings.APUEnabled; -#ifdef SPC700_SHUTDOWN IAPU.WaitAddress1 = NULL; IAPU.WaitAddress2 = NULL; IAPU.WaitCounter = 0; -#endif APU.ShowROM = true; IAPU.RAM [0xf1] = 0x80; diff --git a/source/apu.h b/source/apu.h index 57ff79d..3e034c1 100644 --- a/source/apu.h +++ b/source/apu.h @@ -23,8 +23,8 @@ typedef struct uint8_t _Carry; uint8_t _Zero; uint8_t _Overflow; - uint32_t TimerErrorCounter; - uint32_t Scanline; + uint32_t UNUSED1; + uint32_t UNUSED2; int32_t OneCycle; int32_t TwoCycles; } SIAPU; @@ -33,75 +33,80 @@ typedef struct { int32_t Cycles; bool ShowROM; - uint8_t Flags; + uint8_t UNUSED1; uint8_t KeyedChannels; - uint8_t OutPorts [4]; - uint8_t DSP [0x80]; - uint8_t ExtraRAM [64]; - uint16_t Timer [3]; - uint16_t TimerTarget [3]; + uint8_t OutPorts [4]; + uint8_t DSP [0x80]; + uint8_t ExtraRAM [64]; + uint16_t Timer [3]; + uint16_t TimerTarget [3]; bool TimerEnabled [3]; - bool TimerValueWritten [3]; + bool UNUSED2 [3]; } SAPU; SAPU APU; SIAPU IAPU; -static inline void S9xAPUUnpackStatus() +static inline void S9xAPUUnpackStatus(void) { - IAPU._Zero = ((IAPU.Registers.P & Zero) == 0) | (IAPU.Registers.P & Negative); - IAPU._Carry = (IAPU.Registers.P & Carry); - IAPU._Overflow = (IAPU.Registers.P & Overflow) >> 6; + IAPU._Zero = ((IAPU.Registers.P & Zero) == 0) | (IAPU.Registers.P & Negative); + IAPU._Carry = (IAPU.Registers.P & Carry); + IAPU._Overflow = IAPU.Registers.P & Overflow; } -static inline void S9xAPUPackStatus() +static inline void S9xAPUPackStatus(void) { IAPU.Registers.P &= ~(Zero | Negative | Carry | Overflow); - IAPU.Registers.P |= IAPU._Carry | ((IAPU._Zero == 0) << 1) | - (IAPU._Zero & 0x80) | (IAPU._Overflow << 6); + if (IAPU._Carry) + IAPU.Registers.P |= Carry; + if (!IAPU._Zero) + IAPU.Registers.P |= Zero; + if (IAPU._Overflow) + IAPU.Registers.P |= Overflow; + if (IAPU._Zero & 0x80) + IAPU.Registers.P |= Negative; } -void S9xResetAPU(); -bool S9xInitAPU(); -void S9xDeinitAPU(); -void S9xDecacheSamples(); +void S9xResetAPU(void); +bool S9xInitAPU(void); +void S9xDeinitAPU(void); +void S9xDecacheSamples(void); void S9xSetAPUControl(uint8_t byte); void S9xSetAPUDSP(uint8_t byte); -uint8_t S9xGetAPUDSP(); -bool S9xInitSound(); -void S9xOpenCloseSoundTracingFile(bool); -void S9xPrintAPUState(); +uint8_t S9xGetAPUDSP(void); +bool S9xInitSound(void); +void S9xPrintAPUState(void); extern uint16_t S9xAPUCycles [256]; // Scaled cycle lengths extern uint16_t S9xAPUCycleLengths [256]; // Raw data. -extern void (*S9xApuOpcodes [256])(); +extern void (*S9xApuOpcodes [256])(void); -#define APU_VOL_LEFT 0x00 +#define APU_VOL_LEFT 0x00 #define APU_VOL_RIGHT 0x01 -#define APU_P_LOW 0x02 -#define APU_P_HIGH 0x03 -#define APU_SRCN 0x04 -#define APU_ADSR1 0x05 -#define APU_ADSR2 0x06 -#define APU_GAIN 0x07 -#define APU_ENVX 0x08 -#define APU_OUTX 0x09 - -#define APU_MVOL_LEFT 0x0c +#define APU_P_LOW 0x02 +#define APU_P_HIGH 0x03 +#define APU_SRCN 0x04 +#define APU_ADSR1 0x05 +#define APU_ADSR2 0x06 +#define APU_GAIN 0x07 +#define APU_ENVX 0x08 +#define APU_OUTX 0x09 + +#define APU_MVOL_LEFT 0x0c #define APU_MVOL_RIGHT 0x1c -#define APU_EVOL_LEFT 0x2c +#define APU_EVOL_LEFT 0x2c #define APU_EVOL_RIGHT 0x3c -#define APU_KON 0x4c -#define APU_KOFF 0x5c -#define APU_FLG 0x6c -#define APU_ENDX 0x7c +#define APU_KON 0x4c +#define APU_KOFF 0x5c +#define APU_FLG 0x6c +#define APU_ENDX 0x7c -#define APU_EFB 0x0d +#define APU_EFB 0x0d #define APU_PMON 0x2d -#define APU_NON 0x3d -#define APU_EON 0x4d -#define APU_DIR 0x5d -#define APU_ESA 0x6d -#define APU_EDL 0x7d +#define APU_NON 0x3d +#define APU_EON 0x4d +#define APU_DIR 0x5d +#define APU_ESA 0x6d +#define APU_EDL 0x7d #define APU_C0 0x0f #define APU_C1 0x1f @@ -112,8 +117,8 @@ extern void (*S9xApuOpcodes [256])(); #define APU_C6 0x6f #define APU_C7 0x7f -#define APU_SOFT_RESET 0x80 -#define APU_MUTE 0x40 +#define APU_SOFT_RESET 0x80 +#define APU_MUTE 0x40 #define APU_ECHO_DISABLED 0x20 #define FREQUENCY_MASK 0x3fff @@ -122,7 +127,7 @@ extern void (*S9xApuOpcodes [256])(); #else #include "apu_blargg.h" #define ONE_APU_CYCLE 21 -#define APU_EXECUTE1() do{}while(0) -#define APU_EXECUTE() do{}while(0) +#define APU_EXECUTE1() do {} while(0) +#define APU_EXECUTE() do {} while(0) #endif diff --git a/source/apu_blargg.c b/source/apu_blargg.c index d0d5879..a89a905 100644 --- a/source/apu_blargg.c +++ b/source/apu_blargg.c @@ -8,12 +8,8 @@ #include <stdlib.h> #include <limits.h> -#ifndef INLINE #ifdef PSP -#define INLINE __attribute((force_inline)) -#else -#define INLINE inline -#endif +#define inline __attribute((force_inline)) #endif #include "blargg_endian.h" @@ -40,32 +36,29 @@ details. You should have received a copy of the GNU Lesser General Public License along with this module; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ -/* if ( io < -32768 ) io = -32768; */ -/* if ( io > 32767 ) io = 32767; */ -#define CLAMP16( io )\ -{\ - if ( (int16_t) io != io )\ - io = (io >> 31) ^ 0x7FFF;\ +#define CLAMP16(io) \ +{ \ + if ((int16_t) io != io) \ + io = (io >> 31) ^ 0x7FFF; \ } /* Access global DSP register */ -#define REG(n) dsp_m.regs [R_##n] +#define REG(n) dsp_m.regs [R_##n] /* Access voice DSP register */ -#define VREG(r,n) r [V_##n] +#define VREG(r,n) r [V_##n] -#define WRITE_SAMPLES( l, r, out ) \ +#define WRITE_SAMPLES(l, r, out) \ {\ - out [0] = l;\ - out [1] = r;\ - out += 2;\ - if ( out >= dsp_m.out_end )\ - {\ - out = dsp_m.extra;\ - dsp_m.out_end = &dsp_m.extra [EXTRA_SIZE];\ - }\ -}\ - + out [0] = l; \ + out [1] = r; \ + out += 2; \ + if ( out >= dsp_m.out_end ) \ + { \ + out = dsp_m.extra; \ + dsp_m.out_end = &dsp_m.extra [EXTRA_SIZE]; \ + } \ +} /* Volume registers and efb are signed! Easy to forget int8_t cast. */ /* Prefixes are to avoid accidental use of locals with same names. */ @@ -74,31 +67,31 @@ Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ static int16_t gauss [512] = { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, - 2, 2, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 5, 5, 5, 5, - 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10, - 11, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15, 16, 16, 17, 17, - 18, 19, 19, 20, 20, 21, 21, 22, 23, 23, 24, 24, 25, 26, 27, 27, - 28, 29, 29, 30, 31, 32, 32, 33, 34, 35, 36, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, - 58, 59, 60, 61, 62, 64, 65, 66, 67, 69, 70, 71, 73, 74, 76, 77, - 78, 80, 81, 83, 84, 86, 87, 89, 90, 92, 94, 95, 97, 99, 100, 102, - 104, 106, 107, 109, 111, 113, 115, 117, 118, 120, 122, 124, 126, 128, 130, 132, - 134, 137, 139, 141, 143, 145, 147, 150, 152, 154, 156, 159, 161, 163, 166, 168, - 171, 173, 175, 178, 180, 183, 186, 188, 191, 193, 196, 199, 201, 204, 207, 210, - 212, 215, 218, 221, 224, 227, 230, 233, 236, 239, 242, 245, 248, 251, 254, 257, - 260, 263, 267, 270, 273, 276, 280, 283, 286, 290, 293, 297, 300, 304, 307, 311, - 314, 318, 321, 325, 328, 332, 336, 339, 343, 347, 351, 354, 358, 362, 366, 370, - 374, 378, 381, 385, 389, 393, 397, 401, 405, 410, 414, 418, 422, 426, 430, 434, - 439, 443, 447, 451, 456, 460, 464, 469, 473, 477, 482, 486, 491, 495, 499, 504, - 508, 513, 517, 522, 527, 531, 536, 540, 545, 550, 554, 559, 563, 568, 573, 577, - 582, 587, 592, 596, 601, 606, 611, 615, 620, 625, 630, 635, 640, 644, 649, 654, - 659, 664, 669, 674, 678, 683, 688, 693, 698, 703, 708, 713, 718, 723, 728, 732, - 737, 742, 747, 752, 757, 762, 767, 772, 777, 782, 787, 792, 797, 802, 806, 811, - 816, 821, 826, 831, 836, 841, 846, 851, 855, 860, 865, 870, 875, 880, 884, 889, - 894, 899, 904, 908, 913, 918, 923, 927, 932, 937, 941, 946, 951, 955, 960, 965, - 969, 974, 978, 983, 988, 992, 997,1001,1005,1010,1014,1019,1023,1027,1032,1036, +0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, +2, 2, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 5, 5, 5, 5, +6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10, +11, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15, 16, 16, 17, 17, +18, 19, 19, 20, 20, 21, 21, 22, 23, 23, 24, 24, 25, 26, 27, 27, +28, 29, 29, 30, 31, 32, 32, 33, 34, 35, 36, 36, 37, 38, 39, 40, +41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, +58, 59, 60, 61, 62, 64, 65, 66, 67, 69, 70, 71, 73, 74, 76, 77, +78, 80, 81, 83, 84, 86, 87, 89, 90, 92, 94, 95, 97, 99, 100, 102, +104, 106, 107, 109, 111, 113, 115, 117, 118, 120, 122, 124, 126, 128, 130, 132, +134, 137, 139, 141, 143, 145, 147, 150, 152, 154, 156, 159, 161, 163, 166, 168, +171, 173, 175, 178, 180, 183, 186, 188, 191, 193, 196, 199, 201, 204, 207, 210, +212, 215, 218, 221, 224, 227, 230, 233, 236, 239, 242, 245, 248, 251, 254, 257, +260, 263, 267, 270, 273, 276, 280, 283, 286, 290, 293, 297, 300, 304, 307, 311, +314, 318, 321, 325, 328, 332, 336, 339, 343, 347, 351, 354, 358, 362, 366, 370, +374, 378, 381, 385, 389, 393, 397, 401, 405, 410, 414, 418, 422, 426, 430, 434, +439, 443, 447, 451, 456, 460, 464, 469, 473, 477, 482, 486, 491, 495, 499, 504, +508, 513, 517, 522, 527, 531, 536, 540, 545, 550, 554, 559, 563, 568, 573, 577, +582, 587, 592, 596, 601, 606, 611, 615, 620, 625, 630, 635, 640, 644, 649, 654, +659, 664, 669, 674, 678, 683, 688, 693, 698, 703, 708, 713, 718, 723, 728, 732, +737, 742, 747, 752, 757, 762, 767, 772, 777, 782, 787, 792, 797, 802, 806, 811, +816, 821, 826, 831, 836, 841, 846, 851, 855, 860, 865, 870, 875, 880, 884, 889, +894, 899, 904, 908, 913, 918, 923, 927, 932, 937, 941, 946, 951, 955, 960, 965, +969, 974, 978, 983, 988, 992, 997, 1001,1005,1010,1014,1019,1023,1027,1032,1036, 1040,1045,1049,1053,1057,1061,1066,1070,1074,1078,1082,1086,1090,1094,1098,1102, 1106,1109,1113,1117,1121,1125,1128,1132,1136,1139,1143,1146,1150,1153,1157,1160, 1164,1167,1170,1174,1177,1180,1183,1186,1190,1193,1196,1199,1202,1205,1207,1210, @@ -110,7 +103,7 @@ static int16_t gauss [512] = /* Gaussian interpolation */ -static INLINE int32_t dsp_interpolate( dsp_voice_t *v ) +static inline int32_t dsp_interpolate( dsp_voice_t *v ) { int32_t offset, out, *in; int16_t *fwd, *rev; @@ -140,7 +133,7 @@ static INLINE int32_t dsp_interpolate( dsp_voice_t *v ) static uint32_t const counter_rates [32] = { SIMPLE_COUNTER_RANGE + 1, /* never fires */ - 2048, 1536, + 2048, 1536, 1280, 1024, 768, 640, 512, 384, 320, 256, 192, @@ -171,14 +164,14 @@ static uint32_t const counter_offsets [32] = }; #define RUN_COUNTERS() \ - if ( --dsp_m.counter < 0 ) \ + if (--dsp_m.counter < 0) \ dsp_m.counter = SIMPLE_COUNTER_RANGE - 1; #define READ_COUNTER(rate) (((uint32_t) dsp_m.counter + counter_offsets [rate]) % counter_rates [rate]) /* Envelope */ -static INLINE void dsp_run_envelope( dsp_voice_t* const v ) +static inline void dsp_run_envelope( dsp_voice_t* const v ) { int32_t env, rate, env_data; @@ -252,7 +245,7 @@ static INLINE void dsp_run_envelope( dsp_voice_t* const v ) /* BRR Decoding */ -static INLINE void dsp_decode_brr( dsp_voice_t* v ) +static inline void dsp_decode_brr( dsp_voice_t* v ) { int32_t nybbles, *pos, *end, header; @@ -327,7 +320,7 @@ static INLINE void dsp_decode_brr( dsp_voice_t* v ) if ( (dsp_m.every_other_sample ^= 1) != 0 ) \ dsp_m.new_kon &= ~dsp_m.kon; /* clears KON 63 clocks after it was last read */ -static INLINE void dsp_misc_30() +static inline void dsp_misc_30() { if ( dsp_m.every_other_sample ) { @@ -347,13 +340,13 @@ static INLINE void dsp_misc_30() /* Voices */ -static INLINE void dsp_voice_V1( dsp_voice_t* const v ) +static inline void dsp_voice_V1( dsp_voice_t* const v ) { dsp_m.t_dir_addr = dsp_m.t_dir * 0x100 + dsp_m.t_srcn * 4; dsp_m.t_srcn = v->regs[V_SRCN]; } -static INLINE void dsp_voice_V2( dsp_voice_t* const v ) +static inline void dsp_voice_V2( dsp_voice_t* const v ) { uint8_t *entry; @@ -369,12 +362,12 @@ static INLINE void dsp_voice_V2( dsp_voice_t* const v ) dsp_m.t_pitch = v->regs [V_PITCHL]; } -static INLINE void dsp_voice_V3a( dsp_voice_t* const v ) +static inline void dsp_voice_V3a( dsp_voice_t* const v ) { dsp_m.t_pitch += (v->regs [V_PITCHH] & 0x3F) << 8; } -static INLINE void dsp_voice_V3b( dsp_voice_t* const v ) +static inline void dsp_voice_V3b( dsp_voice_t* const v ) { dsp_m.t_brr_byte = dsp_m.ram [(v->brr_addr + v->brr_offset) & 0xffff]; dsp_m.t_brr_header = dsp_m.ram [v->brr_addr]; @@ -460,7 +453,7 @@ static void dsp_voice_V3c( dsp_voice_t* const v ) } } -static INLINE void dsp_voice_output( dsp_voice_t const* v, int32_t ch ) +static inline void dsp_voice_output( dsp_voice_t const* v, int32_t ch ) { int32_t amp; @@ -479,7 +472,7 @@ static INLINE void dsp_voice_output( dsp_voice_t const* v, int32_t ch ) } } -static INLINE void dsp_voice_V4( dsp_voice_t* const v ) +static inline void dsp_voice_V4( dsp_voice_t* const v ) { /* Decode BRR */ dsp_m.t_looped = 0; @@ -511,7 +504,7 @@ static INLINE void dsp_voice_V4( dsp_voice_t* const v ) dsp_voice_output( v, 0 ); } -static INLINE void dsp_voice_V5( dsp_voice_t* const v ) +static inline void dsp_voice_V5( dsp_voice_t* const v ) { int32_t endx_buf; /* Output right */ @@ -526,13 +519,13 @@ static INLINE void dsp_voice_V5( dsp_voice_t* const v ) dsp_m.endx_buf = (uint8_t) endx_buf; } -static INLINE void dsp_voice_V6( dsp_voice_t* const v ) +static inline void dsp_voice_V6( dsp_voice_t* const v ) { (void) v; /* avoid compiler warning about unused v */ dsp_m.outx_buf = (uint8_t) (dsp_m.t_output >> 8); } -static INLINE void dsp_voice_V7( dsp_voice_t* const v ) +static inline void dsp_voice_V7( dsp_voice_t* const v ) { /* Update ENDX */ dsp_m.regs[R_ENDX] = dsp_m.endx_buf; @@ -540,20 +533,20 @@ static INLINE void dsp_voice_V7( dsp_voice_t* const v ) dsp_m.envx_buf = v->t_envx_out; } -static INLINE void dsp_voice_V8( dsp_voice_t* const v ) +static inline void dsp_voice_V8( dsp_voice_t* const v ) { /* Update OUTX */ v->regs [V_OUTX] = dsp_m.outx_buf; } -static INLINE void dsp_voice_V9( dsp_voice_t* const v ) +static inline void dsp_voice_V9( dsp_voice_t* const v ) { v->regs [V_ENVX] = dsp_m.envx_buf; } /* Most voices do all these in one clock, so make a handy composite */ -static INLINE void dsp_voice_V3( dsp_voice_t* const v ) +static inline void dsp_voice_V3( dsp_voice_t* const v ) { dsp_voice_V3a( v ); dsp_voice_V3b( v ); @@ -606,7 +599,7 @@ static void dsp_voice_V9_V6_V3( dsp_voice_t* const v ) ECHO_FIR( 0 ) [ch] = ECHO_FIR( 8 ) [ch] = s >> 1; \ } -static INLINE void dsp_echo_22() +static inline void dsp_echo_22() { int32_t l, r; @@ -624,7 +617,7 @@ static INLINE void dsp_echo_22() dsp_m.t_echo_in [1] = r; } -static INLINE void dsp_echo_23() +static inline void dsp_echo_23() { int32_t l, r; @@ -637,7 +630,7 @@ static INLINE void dsp_echo_23() ECHO_READ(1); } -static INLINE void dsp_echo_24() +static inline void dsp_echo_24() { int32_t l, r; @@ -648,7 +641,7 @@ static INLINE void dsp_echo_24() dsp_m.t_echo_in [1] += r; } -static INLINE void dsp_echo_25() +static inline void dsp_echo_25() { int32_t l = dsp_m.t_echo_in [0] + (((dsp_m.echo_hist_pos [6 + 1]) [0] * (int8_t) dsp_m.regs [R_FIR + 6 * 0x10]) >> 6); int32_t r = dsp_m.t_echo_in [1] + (((dsp_m.echo_hist_pos [6 + 1]) [1] * (int8_t) dsp_m.regs [R_FIR + 6 * 0x10]) >> 6); @@ -674,7 +667,7 @@ static INLINE void dsp_echo_25() CLAMP16( var ); \ } -static INLINE void dsp_echo_26() +static inline void dsp_echo_26() { int32_t l, r; @@ -690,7 +683,7 @@ static INLINE void dsp_echo_26() dsp_m.t_echo_out [1] = r & ~1; } -static INLINE void dsp_echo_27() +static inline void dsp_echo_27() { int32_t l, r; int16_t *out; @@ -733,7 +726,7 @@ static INLINE void dsp_echo_27() } \ dsp_m.t_echo_out [ch] = 0; -static INLINE void dsp_echo_29() +static inline void dsp_echo_29() { dsp_m.t_esa = dsp_m.regs [R_ESA]; @@ -1253,7 +1246,7 @@ void spc_enable_rom( int32_t enable ) dsp_run( clock_count ); \ } -static INLINE void spc_dsp_write( int32_t data, int32_t time ) +static inline void spc_dsp_write( int32_t data, int32_t time ) { int32_t addr; @@ -2907,7 +2900,7 @@ static int32_t r_left[4], r_right[4]; #define CLAMP(x, low, high) (((x) > (high)) ? (high) : (((x) < (low)) ? (low) : (x))) #define SHORT_CLAMP(n) ((int16_t) CLAMP((n), -32768, 32767)) -static INLINE int32_t hermite (int32_t mu1, int32_t a, int32_t b, int32_t c, int32_t d) +static inline int32_t hermite (int32_t mu1, int32_t a, int32_t b, int32_t c, int32_t d) { int32_t mu2, mu3, m0, m1, a0, a1, a2, a3; @@ -3013,7 +3006,7 @@ static void resampler_new(int32_t num_samples) resampler_clear(); } -static INLINE bool resampler_push(int16_t *src, int32_t num_samples) +static inline bool resampler_push(int16_t *src, int32_t num_samples) { int32_t bytes, end, first_write_size; uint8_t *src_ring; @@ -3037,7 +3030,7 @@ static INLINE bool resampler_push(int16_t *src, int32_t num_samples) return true; } -static INLINE void resampler_resize (int32_t num_samples) +static inline void resampler_resize (int32_t num_samples) { free(rb_buffer); rb_buffer_size = rb_size; @@ -3439,7 +3432,4 @@ void S9xAPULoadState (const uint8_t *block) spc_remainder = GET_LE32(ptr); } -#undef INLINE -#define INLINE static inline - #endif diff --git a/source/apu_blargg.h b/source/apu_blargg.h index 00d9428..3a07e2c 100644 --- a/source/apu_blargg.h +++ b/source/apu_blargg.h @@ -9,20 +9,20 @@ typedef void (*dsp_copy_func_t)( uint8_t ** io, void* state, size_t ); -#define ECHO_HIST_SIZE 8 -#define ECHO_HIST_SIZE_X2 16 +#define ECHO_HIST_SIZE 8 +#define ECHO_HIST_SIZE_X2 16 /* Sound control */ /* Mutes voices corresponding to non-zero bits in mask (issues repeated KOFF events). Reduces emulation accuracy. */ -#define VOICE_COUNT 8 -#define EXTRA_SIZE 16 -#define EXTRA_SIZE_DIV_2 8 -#define BRR_BUF_SIZE 12 -#define BRR_BUF_SIZE_X2 24 -#define BRR_BLOCK_SIZE 9 +#define VOICE_COUNT 8 +#define EXTRA_SIZE 16 +#define EXTRA_SIZE_DIV_2 8 +#define BRR_BUF_SIZE 12 +#define BRR_BUF_SIZE_X2 24 +#define BRR_BLOCK_SIZE 9 /* DSP register addresses */ @@ -32,176 +32,170 @@ typedef void (*dsp_copy_func_t)( uint8_t ** io, void* state, size_t ); #define R_MVOLR 0x1C #define R_EVOLL 0x2C #define R_EVOLR 0x3C -#define R_KON 0x4C -#define R_KOFF 0x5C -#define R_FLG 0x6C -#define R_ENDX 0x7C -#define R_EFB 0x0D -#define R_EON 0x4D -#define R_PMON 0x2D -#define R_NON 0x3D -#define R_DIR 0x5D -#define R_ESA 0x6D -#define R_EDL 0x7D -#define R_FIR 0x0F /* 8 coefficients at 0x0F, 0x1F ... 0x7F */ +#define R_KON 0x4C +#define R_KOFF 0x5C +#define R_FLG 0x6C +#define R_ENDX 0x7C +#define R_EFB 0x0D +#define R_EON 0x4D +#define R_PMON 0x2D +#define R_NON 0x3D +#define R_DIR 0x5D +#define R_ESA 0x6D +#define R_EDL 0x7D +#define R_FIR 0x0F /* 8 coefficients at 0x0F, 0x1F ... 0x7F */ /* Voice registers */ -#define V_VOLL 0x00 -#define V_VOLR 0x01 -#define V_PITCHL 0x02 -#define V_PITCHH 0x03 -#define V_SRCN 0x04 -#define V_ADSR0 0x05 -#define V_ADSR1 0x06 -#define V_GAIN 0x07 -#define V_ENVX 0x08 -#define V_OUTX 0x09 +#define V_VOLL 0x00 +#define V_VOLR 0x01 +#define V_PITCHL 0x02 +#define V_PITCHH 0x03 +#define V_SRCN 0x04 +#define V_ADSR0 0x05 +#define V_ADSR1 0x06 +#define V_GAIN 0x07 +#define V_ENVX 0x08 +#define V_OUTX 0x09 /* Status flag handling */ /* Hex value in name to clarify code and bit shifting. Flag stored in indicated variable during emulation */ -#define N80 0x80 /* nz */ -#define V40 0x40 /* psw */ -#define P20 0x20 /* dp */ -#define B10 0x10 /* psw */ -#define H08 0x08 /* psw */ -#define I04 0x04 /* psw */ -#define Z02 0x02 /* nz */ -#define C01 0x01 /* c */ +#define N80 0x80 /* nz */ +#define V40 0x40 /* psw */ +#define P20 0x20 /* dp */ +#define B10 0x10 /* psw */ +#define H08 0x08 /* psw */ +#define I04 0x04 /* psw */ +#define Z02 0x02 /* nz */ +#define C01 0x01 /* c */ #define NZ_NEG_MASK 0x880 /* either bit set indicates N flag set */ #define REGISTER_COUNT 128 -#define ENV_RELEASE 0 -#define ENV_ATTACK 1 -#define ENV_DECAY 2 -#define ENV_SUSTAIN 3 +#define ENV_RELEASE 0 +#define ENV_ATTACK 1 +#define ENV_DECAY 2 +#define ENV_SUSTAIN 3 typedef struct { - int32_t buf [BRR_BUF_SIZE_X2]; // decoded samples (twice the size to simplify wrap handling) - int32_t buf_pos; // place in buffer where next samples will be decoded - int32_t interp_pos; // relative fractional position in sample (0x1000 = 1.0) - int32_t brr_addr; // address of current BRR block - int32_t brr_offset; // current decoding offset in BRR block + int32_t buf [BRR_BUF_SIZE_X2]; // decoded samples (twice the size to simplify wrap handling) + int32_t buf_pos; // place in buffer where next samples will be decoded + int32_t interp_pos; // relative fractional position in sample (0x1000 = 1.0) + int32_t brr_addr; // address of current BRR block + int32_t brr_offset; // current decoding offset in BRR block uint8_t* regs; // pointer to voice's DSP registers - int32_t vbit; // bitmask for voice: 0x01 for voice 0, 0x02 for voice 1, etc. - int32_t kon_delay; // KON delay/current setup phase - int32_t env_mode; - int32_t env; // current envelope level - int32_t hidden_env; // used by GAIN mode 7, very obscure quirk + int32_t vbit; // bitmask for voice: 0x01 for voice 0, 0x02 for voice 1, etc. + int32_t kon_delay; // KON delay/current setup phase + int32_t env_mode; + int32_t env; // current envelope level + int32_t hidden_env; // used by GAIN mode 7, very obscure quirk uint8_t t_envx_out; } dsp_voice_t; typedef struct { - uint8_t regs [REGISTER_COUNT]; - - /* Echo history keeps most recent 8 samples (twice the size to simplify wrap handling) */ - - int32_t echo_hist [ECHO_HIST_SIZE_X2] [2]; - - int32_t (*echo_hist_pos) [2]; /* &echo_hist [0 to 7] */ - - int32_t every_other_sample; /* toggles every sample */ - int32_t kon; /* KON value when last checked */ - int32_t noise; - int32_t counter; - int32_t echo_offset; /* offset from ESA in echo buffer */ - int32_t echo_length; /* number of bytes that echo_offset will stop at */ - int32_t phase; /* next clock cycle to run (0-31) */ + uint8_t regs [REGISTER_COUNT]; + int32_t echo_hist [ECHO_HIST_SIZE_X2] [2]; /* Echo history keeps most recent 8 samples (twice the size to simplify wrap handling) */ + int32_t (*echo_hist_pos) [2]; /* &echo_hist [0 to 7] */ + int32_t every_other_sample; /* toggles every sample */ + int32_t kon; /* KON value when last checked */ + int32_t noise; + int32_t counter; + int32_t echo_offset; /* offset from ESA in echo buffer */ + int32_t echo_length; /* number of bytes that echo_offset will stop at */ + int32_t phase; /* next clock cycle to run (0-31) */ /* Hidden registers also written to when main register is written to */ - int32_t new_kon; - uint8_t endx_buf; - uint8_t envx_buf; - uint8_t outx_buf; - - /* Temporary state between clocks */ + int32_t new_kon; + uint8_t endx_buf; + uint8_t envx_buf; + uint8_t outx_buf; /* read once per sample */ - int32_t t_pmon; - int32_t t_non; - int32_t t_eon; - int32_t t_dir; - int32_t t_koff; + int32_t t_pmon; + int32_t t_non; + int32_t t_eon; + int32_t t_dir; + int32_t t_koff; /* read a few clocks ahead then used */ - int32_t t_brr_next_addr; - int32_t t_adsr0; - int32_t t_brr_header; - int32_t t_brr_byte; - int32_t t_srcn; - int32_t t_esa; - int32_t t_echo_enabled; + int32_t t_brr_next_addr; + int32_t t_adsr0; + int32_t t_brr_header; + int32_t t_brr_byte; + int32_t t_srcn; + int32_t t_esa; + int32_t t_echo_enabled; /* internal state that is recalculated every sample */ - int32_t t_dir_addr; - int32_t t_pitch; - int32_t t_output; - int32_t t_looped; - int32_t t_echo_ptr; + int32_t t_dir_addr; + int32_t t_pitch; + int32_t t_output; + int32_t t_looped; + int32_t t_echo_ptr; /* left/right sums */ - int32_t t_main_out [2]; - int32_t t_echo_out [2]; - int32_t t_echo_in [2]; + int32_t t_main_out [2]; + int32_t t_echo_out [2]; + int32_t t_echo_in [2]; - dsp_voice_t voices [VOICE_COUNT]; + dsp_voice_t voices [VOICE_COUNT]; /* non-emulation state */ - uint8_t* ram; /* 64K shared RAM between DSP and SMP */ - int16_t* out; - int16_t* out_end; - int16_t* out_begin; - int16_t extra [EXTRA_SIZE]; - - int32_t rom_enabled; - uint8_t* rom; - uint8_t* hi_ram; + uint8_t* ram; /* 64K shared RAM between DSP and SMP */ + int16_t* out; + int16_t* out_end; + int16_t* out_begin; + int16_t extra [EXTRA_SIZE]; + + int32_t rom_enabled; + uint8_t* rom; + uint8_t* hi_ram; } dsp_state_t; #if !SPC_NO_COPY_STATE_FUNCS -typedef struct { +typedef struct +{ dsp_copy_func_t func; - uint8_t** buf; + uint8_t** buf; } spc_state_copy_t; #define SPC_COPY( type, state ) state = (type) spc_copier_copy_int(&copier, state, sizeof (type) ); #endif -#define REG_COUNT 0x10 -#define PORT_COUNT 4 -#define TEMPO_UNIT 0x100 -#define STATE_SIZE 68 * 1024L /* maximum space needed when saving */ -#define TIMER_COUNT 3 -#define ROM_SIZE 0x40 -#define ROM_ADDR 0xFFC0 +#define REG_COUNT 0x10 +#define PORT_COUNT 4 +#define TEMPO_UNIT 0x100 +#define STATE_SIZE 68 * 1024L /* maximum space needed when saving */ +#define TIMER_COUNT 3 +#define ROM_SIZE 0x40 +#define ROM_ADDR 0xFFC0 /* 1024000 SPC clocks per second, sample pair every 32 clocks */ #define CLOCKS_PER_SAMPLE 32 -#define R_TEST 0x0 -#define R_CONTROL 0x1 -#define R_DSPADDR 0x2 -#define R_DSPDATA 0x3 -#define R_CPUIO0 0x4 -#define R_CPUIO1 0x5 -#define R_CPUIO2 0x6 -#define R_CPUIO3 0x7 -#define R_F8 0x8 -#define R_F9 0x9 -#define R_T0TARGET 0xA -#define R_T1TARGET 0xB -#define R_T2TARGET 0xC -#define R_T0OUT 0xD -#define R_T1OUT 0xE -#define R_T2OUT 0xF +#define R_TEST 0x0 +#define R_CONTROL 0x1 +#define R_DSPADDR 0x2 +#define R_DSPDATA 0x3 +#define R_CPUIO0 0x4 +#define R_CPUIO1 0x5 +#define R_CPUIO2 0x6 +#define R_CPUIO3 0x7 +#define R_F8 0x8 +#define R_F9 0x9 +#define R_T0TARGET 0xA +#define R_T1TARGET 0xB +#define R_T2TARGET 0xC +#define R_T0OUT 0xD +#define R_T1OUT 0xE +#define R_T2OUT 0xF /* Value that padding should be filled with */ #define CPU_PAD_FILL 0xFF @@ -230,9 +224,8 @@ uint8_t* spc_apuram(); typedef struct { - Timer timers [TIMER_COUNT]; - - uint8_t smp_regs [2] [REG_COUNT]; + Timer timers [TIMER_COUNT]; + uint8_t smp_regs [2] [REG_COUNT]; struct { @@ -244,27 +237,24 @@ typedef struct int32_t sp; } cpu_regs; - int32_t dsp_time; - int32_t spc_time; - - int32_t tempo; - + int32_t dsp_time; + int32_t spc_time; + int32_t tempo; int32_t extra_clocks; int16_t* buf_begin; - int16_t* buf_end; + int16_t* buf_end; int16_t* extra_pos; - int16_t extra_buf [EXTRA_SIZE]; - - int32_t rom_enabled; - uint8_t rom [ROM_SIZE]; - uint8_t hi_ram [ROM_SIZE]; - - uint8_t cycle_table [256]; + int16_t extra_buf [EXTRA_SIZE]; + int32_t rom_enabled; + uint8_t rom [ROM_SIZE]; + uint8_t hi_ram [ROM_SIZE]; + uint8_t cycle_table [256]; struct { /* padding to neutralize address overflow */ - union { + union + { uint8_t padding1 [0x100]; uint16_t align; /* makes compiler align data for 16-bit access */ } padding1 [1]; @@ -280,28 +270,27 @@ typedef void (*apu_callback)(); #define SPC_SAVE_STATE_BLOCK_SIZE (STATE_SIZE + 8) -bool S9xInitAPU(); -void S9xDeinitAPU(); -void S9xResetAPU(); -void S9xSoftResetAPU(); +bool S9xInitAPU(); +void S9xDeinitAPU(); +void S9xResetAPU(); +void S9xSoftResetAPU(); uint8_t S9xAPUReadPort(int32_t port); -void S9xAPUWritePort(int32_t port, uint8_t byte); -void S9xAPUExecute(); -void S9xAPUSetReferenceTime(int32_t cpucycles); -void S9xAPUTimingSetSpeedup(int32_t ticks); -void S9xAPUAllowTimeOverflow(bool allow); -void S9xAPULoadState(const uint8_t * block); -void S9xAPUSaveState(uint8_t * block); +void S9xAPUWritePort(int32_t port, uint8_t byte); +void S9xAPUExecute(); +void S9xAPUSetReferenceTime(int32_t cpucycles); +void S9xAPUTimingSetSpeedup(int32_t ticks); +void S9xAPUAllowTimeOverflow(bool allow); +void S9xAPULoadState(const uint8_t * block); +void S9xAPUSaveState(uint8_t * block); -bool S9xInitSound(int32_t buffer_ms, int32_t lag_ms); +bool S9xInitSound(int32_t buffer_ms, int32_t lag_ms); -bool S9xSyncSound(); +bool S9xSyncSound(); int32_t S9xGetSampleCount(); -void S9xFinalizeSamples(); -void S9xClearSamples(); -bool S9xMixSamples(int16_t * buffer, uint32_t sample_count); -void S9xSetSamplesAvailableCallback(apu_callback); +void S9xFinalizeSamples(); +void S9xClearSamples(); +bool S9xMixSamples(int16_t * buffer, uint32_t sample_count); +void S9xSetSamplesAvailableCallback(apu_callback); #endif // APU_BLARGG_H - #endif diff --git a/source/apumem.h b/source/apumem.h index 8a9f09a..c58b808 100644 --- a/source/apumem.h +++ b/source/apumem.h @@ -6,24 +6,20 @@ extern uint8_t W4; extern uint8_t APUROM[64]; -INLINE uint8_t S9xAPUGetByteZ(uint8_t Address) +static inline uint8_t S9xAPUGetByteZ(uint8_t Address) { if (Address >= 0xf0 && IAPU.DirectPage == IAPU.RAM) { if (Address >= 0xf4 && Address <= 0xf7) { -#ifdef SPC700_SHUTDOWN IAPU.WaitAddress2 = IAPU.WaitAddress1; IAPU.WaitAddress1 = IAPU.PC; -#endif return (IAPU.RAM [Address]); } if (Address >= 0xfd) { -#ifdef SPC700_SHUTDOWN IAPU.WaitAddress2 = IAPU.WaitAddress1; IAPU.WaitAddress1 = IAPU.PC; -#endif uint8_t t = IAPU.RAM [Address]; IAPU.RAM [Address] = 0; return (t); @@ -33,11 +29,10 @@ INLINE uint8_t S9xAPUGetByteZ(uint8_t Address) return (IAPU.RAM [Address]); } - else - return (IAPU.DirectPage [Address]); + return (IAPU.DirectPage [Address]); } -INLINE void S9xAPUSetByteZ(uint8_t byte, uint8_t Address) +static inline void S9xAPUSetByteZ(uint8_t byte, uint8_t Address) { if (Address >= 0xf0 && IAPU.DirectPage == IAPU.RAM) { @@ -63,7 +58,7 @@ INLINE void S9xAPUSetByteZ(uint8_t byte, uint8_t Address) IAPU.DirectPage [Address] = byte; } -INLINE uint8_t S9xAPUGetByte(uint32_t Address) +static inline uint8_t S9xAPUGetByte(uint32_t Address) { Address &= 0xffff; @@ -73,13 +68,11 @@ INLINE uint8_t S9xAPUGetByte(uint32_t Address) bool zero = (Address >= 0xfd && Address <= 0xff); uint8_t t = IAPU.RAM [Address]; -#ifdef SPC700_SHUTDOWN if (zero || (Address >= 0xf4 && Address <= 0xf7)) { IAPU.WaitAddress2 = IAPU.WaitAddress1; IAPU.WaitAddress1 = IAPU.PC; } -#endif if(zero) IAPU.RAM [Address] = 0; @@ -87,7 +80,7 @@ INLINE uint8_t S9xAPUGetByte(uint32_t Address) return t; } -INLINE void S9xAPUSetByte(uint8_t byte, uint32_t Address) +static inline void S9xAPUSetByte(uint8_t byte, uint32_t Address) { Address &= 0xffff; diff --git a/source/blargg_endian.h b/source/blargg_endian.h index 3fc7296..53e0e17 100644 --- a/source/blargg_endian.h +++ b/source/blargg_endian.h @@ -69,12 +69,12 @@ #define SET_LE32( addr, data ) (void) (*(uint32_t*) (addr) = (data)) #endif #else -static INLINE uint32_t get_le16( void const* p ) +static inline uint32_t get_le16( void const* p ) { return (uint32_t) ((uint8_t const*) p) [1] << 8 | (uint32_t) ((uint8_t const*) p) [0]; } -static INLINE uint32_t get_le32( void const* p ) +static inline uint32_t get_le32( void const* p ) { return (uint32_t) ((uint8_t const*) p) [3] << 24 | (uint32_t) ((uint8_t const*) p) [2] << 16 | @@ -82,13 +82,13 @@ static INLINE uint32_t get_le32( void const* p ) (uint32_t) ((uint8_t const*) p) [0]; } -static INLINE void set_le16( void* p, uint32_t n ) +static inline void set_le16( void* p, uint32_t n ) { ((uint8_t*) p) [1] = (uint8_t) (n >> 8); ((uint8_t*) p) [0] = (uint8_t) n; } -static INLINE void set_le32( void* p, uint32_t n ) +static inline void set_le32( void* p, uint32_t n ) { ((uint8_t*) p) [0] = (uint8_t) n; ((uint8_t*) p) [1] = (uint8_t) (n >> 8); diff --git a/source/c4.c b/source/c4.c index 9519cc3..251493c 100644 --- a/source/c4.c +++ b/source/c4.c @@ -111,9 +111,9 @@ int16_t _atan2(int16_t x, int16_t y) int32_t absAtan; if (x1 > y1) - absAtan = atantbl[(unsigned char)((y1 << 8) / x1)]; + absAtan = atantbl[(uint8_t)((y1 << 8) / x1)]; else - absAtan = atantbl[(unsigned char)((x1 << 8) / y1)]; + absAtan = atantbl[(uint8_t)((x1 << 8) / y1)]; if ((x >= 0) ^ (y >= 0)) return -absAtan; diff --git a/source/cheats.c b/source/cheats.c index 7ddcbfb..2b03078 100644 --- a/source/cheats.c +++ b/source/cheats.c @@ -1,7 +1,5 @@ #include "../copyright" -#ifdef WANT_CHEATS - #include <stdio.h> #include <ctype.h> #include <string.h> @@ -16,9 +14,9 @@ static bool S9xAllHex(const char* code, int32_t len) if ((code [i] < '0' || code [i] > '9') && (code [i] < 'a' || code [i] > 'f') && (code [i] < 'A' || code [i] > 'F')) - return (false); + return false; - return (true); + return true; } const char* S9xProActionReplayToRaw(const char* code, uint32_t* address, uint8_t* byte) @@ -26,23 +24,23 @@ const char* S9xProActionReplayToRaw(const char* code, uint32_t* address, uint8_t uint32_t data = 0; if (strlen(code) != 8 || !S9xAllHex(code, 8) || sscanf(code, "%x", &data) != 1) - return ("Invalid Pro Action Replay code - should be 8 hex digits in length."); + return "Invalid Pro Action Replay code - should be 8 hex digits in length."; *address = data >> 8; *byte = (uint8_t) data; - return (NULL); + return NULL; } const char* S9xGoldFingerToRaw(const char* code, uint32_t* address, bool* sram, uint8_t* num_bytes, uint8_t bytes[3]) { char tmp [15]; if (strlen(code) != 14) - return ("Invalid Gold Finger code should be 14 hex digits in length."); + return "Invalid Gold Finger code should be 14 hex digits in length."; strncpy(tmp, code, 5); tmp [5] = 0; if (sscanf(tmp, "%x", address) != 1) - return ("Invalid Gold Finger code."); + return "Invalid Gold Finger code."; int32_t i; for (i = 0; i < 3; i++) @@ -56,7 +54,7 @@ const char* S9xGoldFingerToRaw(const char* code, uint32_t* address, bool* sram, } *num_bytes = i; *sram = code [13] == '1'; - return (NULL); + return NULL; } const char* S9xGameGenieToRaw(const char* code, uint32_t* address, uint8_t* byte) @@ -64,7 +62,7 @@ const char* S9xGameGenieToRaw(const char* code, uint32_t* address, uint8_t* byte char new_code [12]; if (strlen(code) != 9 || *(code + 4) != '-' || !S9xAllHex(code, 4) || !S9xAllHex(code + 5, 4)) - return ("Invalid Game Genie(tm) code - should be 'xxxx-xxxx'."); + return "Invalid Game Genie(tm) code - should be 'xxxx-xxxx'."; strcpy(new_code, "0x"); strncpy(new_code + 2, code, 4); @@ -88,7 +86,7 @@ const char* S9xGameGenieToRaw(const char* code, uint32_t* address, uint8_t* byte } } if (j == 16) - return ("Invalid hex-character in Game Genie(tm) code"); + return "Invalid hex-character in Game Genie(tm) code"; } uint32_t data = 0; sscanf(new_code, "%x", &data); @@ -371,5 +369,3 @@ void S9xOutputCheatSearchResults(SCheatData* d) printf("IRAM: %05x: %02x\n", i, d->FillRAM [i + 0x3000]); } } - -#endif diff --git a/source/cheats.h b/source/cheats.h index 6c3c093..42e2b47 100644 --- a/source/cheats.h +++ b/source/cheats.h @@ -3,52 +3,50 @@ #ifndef _CHEATS_H_ #define _CHEATS_H_ -#ifdef WANT_CHEATS - #define MAX_SFCCHEAT_NAME 48 -#define MAX_CHEATS_T 800 +#define MAX_CHEATS 800 typedef struct { - uint32_t address; - uint8_t byte; - uint8_t saved_byte; - bool enabled; - bool saved; - char name[MAX_SFCCHEAT_NAME]; + uint32_t address; + uint8_t byte; + uint8_t saved_byte; + bool enabled; + bool saved; + char name[MAX_SFCCHEAT_NAME]; } SCheat; typedef struct { - SCheat c [MAX_CHEATS_T]; - uint32_t num_cheats; - uint8_t CWRAM [0x20000]; - uint8_t CSRAM [0x10000]; - uint8_t CIRAM [0x2000]; - uint8_t* RAM; - uint8_t* FillRAM; - uint8_t* SRAM; - uint32_t WRAM_BITS [0x20000 >> 3]; - uint32_t SRAM_BITS [0x10000 >> 3]; - uint32_t IRAM_BITS [0x2000 >> 3]; + SCheat c [MAX_CHEATS]; + uint32_t num_cheats; + uint8_t CWRAM [0x20000]; + uint8_t CSRAM [0x10000]; + uint8_t CIRAM [0x2000]; + uint8_t* RAM; + uint8_t* FillRAM; + uint8_t* SRAM; + uint32_t WRAM_BITS [0x20000 >> 3]; + uint32_t SRAM_BITS [0x10000 >> 3]; + uint32_t IRAM_BITS [0x2000 >> 3]; } SCheatData; typedef enum { - S9X_LESS_THAN, S9X_GREATER_THAN, S9X_LESS_THAN_OR_EQUAL, - S9X_GREATER_THAN_OR_EQUAL, S9X_EQUAL, S9X_NOT_EQUAL + S9X_LESS_THAN, S9X_GREATER_THAN, S9X_LESS_THAN_OR_EQUAL, + S9X_GREATER_THAN_OR_EQUAL, S9X_EQUAL, S9X_NOT_EQUAL } S9xCheatComparisonType; typedef enum { - S9X_8_BITS, S9X_16_BITS, S9X_24_BITS, S9X_32_BITS + S9X_8_BITS, S9X_16_BITS, S9X_24_BITS, S9X_32_BITS } S9xCheatDataSize; void S9xInitCheatData(); -const char *S9xGameGenieToRaw(const char *code, uint32_t *address, uint8_t *byte); -const char *S9xProActionReplayToRaw(const char *code, uint32_t *address, uint8_t *byte); -const char *S9xGoldFingerToRaw(const char *code, uint32_t *address, bool *sram, uint8_t *num_bytes, uint8_t bytes[3]); +const char* S9xGameGenieToRaw(const char* code, uint32_t* address, uint8_t* byte); +const char* S9xProActionReplayToRaw(const char* code, uint32_t* address, uint8_t* byte); +const char* S9xGoldFingerToRaw(const char* code, uint32_t* address, bool* sram, uint8_t* num_bytes, uint8_t bytes[3]); void S9xApplyCheats(); void S9xApplyCheat(uint32_t which1); void S9xRemoveCheats(); @@ -59,14 +57,12 @@ void S9xDisableAllCheat(); void S9xAddCheat(bool enable, bool save_current_value, uint32_t address, uint8_t byte); void S9xDeleteCheats(); void S9xDeleteCheat(uint32_t which1); -bool S9xLoadCheatFile(const char *filename); -bool S9xSaveCheatFile(const char *filename); - -void S9xStartCheatSearch(SCheatData *cheats); -void S9xSearchForChange(SCheatData *cheats, S9xCheatComparisonType cmp, S9xCheatDataSize size, bool is_signed, bool update); -void S9xSearchForValue(SCheatData *cheats, S9xCheatComparisonType cmp, S9xCheatDataSize size, uint32_t value, bool is_signed, bool update); -void S9xOutputCheatSearchResults(SCheatData *cheats); +bool S9xLoadCheatFile(const char* filename); +bool S9xSaveCheatFile(const char* filename); -#endif +void S9xStartCheatSearch(SCheatData* cheats); +void S9xSearchForChange(SCheatData* cheats, S9xCheatComparisonType cmp, S9xCheatDataSize size, bool is_signed, bool update); +void S9xSearchForValue(SCheatData* cheats, S9xCheatComparisonType cmp, S9xCheatDataSize size, uint32_t value, bool is_signed, bool update); +void S9xOutputCheatSearchResults(SCheatData* cheats); #endif diff --git a/source/cheats2.c b/source/cheats2.c index dd4033f..977daf6 100644 --- a/source/cheats2.c +++ b/source/cheats2.c @@ -1,7 +1,5 @@ #include "../copyright" -#ifdef WANT_CHEATS - #include <stdio.h> #include <ctype.h> #include <string.h> @@ -18,8 +16,7 @@ void S9xInitCheatData() Cheat.FillRAM = Memory.FillRAM; } -void S9xAddCheat(bool enable, bool save_current_value, - uint32_t address, uint8_t byte) +void S9xAddCheat(bool enable, bool save_current_value, uint32_t address, uint8_t byte) { if (Cheat.num_cheats < sizeof(Cheat.c) / sizeof(Cheat.c [0])) { @@ -45,9 +42,8 @@ void S9xDeleteCheat(uint32_t which1) S9xRemoveCheat(which1); // memmove required: Overlapping addresses [Neb] - memmove(&Cheat.c [which1], &Cheat.c [which1 + 1], - sizeof(Cheat.c [0]) * (Cheat.num_cheats - which1 - 1)); - Cheat.num_cheats--; //MK: This used to set it to 0?? + memmove(&Cheat.c [which1], &Cheat.c [which1 + 1], sizeof(Cheat.c [0]) * (Cheat.num_cheats - which1 - 1)); + Cheat.num_cheats--; } } @@ -204,5 +200,3 @@ bool S9xSaveCheatFile(const char* filename) fclose(fs); return (true); } - -#endif diff --git a/source/clip.c b/source/clip.c index 1a52bea..c579b77 100644 --- a/source/clip.c +++ b/source/clip.c @@ -6,11 +6,11 @@ #include "memmap.h" #include "ppu.h" -struct Band +typedef struct { uint32_t Left; uint32_t Right; -}; +} Band; #define BAND_EMPTY(B) (B.Left >= B.Right) #define BANDS_INTERSECT(A,B) ((A.Left >= B.Left && A.Left < B.Right) || \ @@ -25,25 +25,17 @@ struct Band static int32_t IntCompare(const void* d1, const void* d2) { - if (*(uint32_t*) d1 > *(uint32_t*) d2) - return (1); - else if (*(uint32_t*) d1 < * (uint32_t*) d2) - return (-1); - return (0); + return (*(uint32_t*) d1 - * (uint32_t*) d2); } static int32_t BandCompare(const void* d1, const void* d2) { - if (((struct Band*) d1)->Left > ((struct Band*) d2)->Left) - return (1); - else if (((struct Band*) d1)->Left < ((struct Band*) d2)->Left) - return (-1); - return (0); + return (((Band*) d1)->Left - ((Band*) d2)->Left); } void ComputeClipWindows() { - struct ClipData* pClip = &IPPU.Clip [0]; + ClipData* pClip = &IPPU.Clip [0]; int32_t c, w, i; // Loop around the main screen then the sub-screen. @@ -98,16 +90,15 @@ void ComputeClipWindows() if (w == 5 || pClip->Count [5] || (Memory.FillRAM [0x212c + c] & Memory.FillRAM [0x212e + c] & (1 << w))) { - struct Band Win1[3]; - struct Band Win2[3]; + Band Win1[3]; + Band Win2[3]; uint32_t Window1Enabled = 0; uint32_t Window2Enabled = 0; bool invert = (w == 5 && ((c == 1 && (Memory.FillRAM [0x2130] & 0x30) == 0x10) || - (c == 0 && (Memory.FillRAM [0x2130] & 0xc0) == 0x40))); + (c == 0 && (Memory.FillRAM [0x2130] & 0xc0) == 0x40))); - if (w == 5 || - (Memory.FillRAM [0x212c + c] & Memory.FillRAM [0x212e + c] & (1 << w))) + if (w == 5 || (Memory.FillRAM [0x212c + c] & Memory.FillRAM [0x212e + c] & (1 << w))) { if (PPU.ClipWindow1Enable [w]) { @@ -188,7 +179,7 @@ void ComputeClipWindows() // 1. <no range> (Left > Right. One band) // 2. | ---------------- | (Left >= 0, Right <= 255, Left <= Right. One band) // 3. |------------ ----------| (Left1 == 0, Right1 < Left2; Left2 > Right1, Right2 == 255. Two bands) - struct Band Bands [6]; + Band Bands [6]; int32_t B = 0; switch (PPU.ClipWindowOverlapLogic [w] ^ 1) { @@ -630,16 +621,15 @@ void ComputeClipWindows() { // Intersect the colour window with the bg's // own clip window. - uint32_t i; + uint32_t i, j; for (i = 0; i < pClip->Count [w]; i++) { - uint32_t j; for (j = 0; j < pClip->Count [5]; j++) { - if ((pClip->Left[i][w] >= pClip->Left[j][5] - && pClip->Left[i][w] < pClip->Right[j][5]) - || (pClip->Left[j][5] >= pClip->Left[i][w] - && pClip->Left[j][5] < pClip->Right[i][w])) + if ((pClip->Left[i][w] >= pClip->Left[j][5] && + pClip->Left[i][w] < pClip->Right[j][5]) || + (pClip->Left[j][5] >= pClip->Left[i][w] && + pClip->Left[j][5] < pClip->Right[i][w])) { // Found an intersection! pClip->Left[i][w] = MAX(pClip->Left[i][w], pClip->Left[j][5]); diff --git a/source/cpu.c b/source/cpu.c index 15206c5..1724fd6 100644 --- a/source/cpu.c +++ b/source/cpu.c @@ -15,11 +15,10 @@ #include "spc7110.h" #include "obc1.h" -extern struct FxInit_s SuperFX; +extern FxInit_s SuperFX; void S9xResetSuperFX() { - SuperFX.vFlags = 0; FxReset(&SuperFX); } @@ -57,9 +56,7 @@ void S9xResetCPU() CPU.V_Counter = 0; CPU.MemSpeed = SLOW_ONE_CYCLE; CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2; - CPU.AutoSaveTimer = 0; CPU.SRAMModified = false; - CPU.BRKTriggered = false; CPU.NMICycleCount = 0; CPU.IRQCycleCount = 0; S9xSetPCBase(ICPU.Registers.PC); @@ -94,9 +91,7 @@ static void CommonS9xReset() if (Settings.C4) S9xInitC4(); -#ifdef WANT_CHEATS S9xInitCheatData(); -#endif } void S9xReset() diff --git a/source/cpuaddr.h b/source/cpuaddr.h index 1085921..94cb6f0 100644 --- a/source/cpuaddr.h +++ b/source/cpuaddr.h @@ -195,7 +195,7 @@ static inline void DirectIndexedX(bool read) #endif } -static void DirectIndexedY(bool read) +static inline void DirectIndexedY(bool read) { if (read) OpenBus = *CPU.PC; diff --git a/source/cpuexec.c b/source/cpuexec.c index d7151be..98e321f 100644 --- a/source/cpuexec.c +++ b/source/cpuexec.c @@ -6,17 +6,16 @@ #include "ppu.h" #include "cpuexec.h" #include "gfx.h" -#include "missing.h" #include "apu.h" #include "dma.h" #include "fxemu.h" #include "sa1.h" #include "spc7110.h" -void S9xMainLoop_SA1_SFX(); -void S9xMainLoop_SA1_NoSFX(); -void S9xMainLoop_NoSA1_SFX(); -void S9xMainLoop_NoSA1_NoSFX(); +void S9xMainLoop_SA1_SFX(void); +void S9xMainLoop_SA1_NoSFX(void); +void S9xMainLoop_NoSA1_SFX(void); +void S9xMainLoop_NoSA1_NoSFX(void); /* * This is a CATSFC modification inspired by a Snes9x-Euphoria modification. @@ -31,13 +30,17 @@ void S9xMainLoop() { if (Settings.SA1) { - if (Settings.SuperFX) S9xMainLoop_SA1_SFX(); - else S9xMainLoop_SA1_NoSFX(); + if (Settings.SuperFX) + S9xMainLoop_SA1_SFX(); + else + S9xMainLoop_SA1_NoSFX(); } else { - if (Settings.SuperFX) S9xMainLoop_NoSA1_SFX(); - else S9xMainLoop_NoSA1_NoSFX(); + if (Settings.SuperFX) + S9xMainLoop_NoSA1_SFX(); + else + S9xMainLoop_NoSA1_NoSFX(); } } @@ -86,9 +89,7 @@ void S9xMainLoop_SA1_SFX() break; } -#ifdef CPU_SHUTDOWN CPU.PCAtOpcodeStart = CPU.PC; -#endif CPU.Cycles += CPU.MemSpeed; (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)(); @@ -103,8 +104,7 @@ void S9xMainLoop_SA1_SFX() IAPU.Registers.PC = IAPU.PC - IAPU.RAM; S9xAPUPackStatus(); #endif - if (CPU.Flags & SCAN_KEYS_FLAG) - CPU.Flags &= ~SCAN_KEYS_FLAG; + CPU.Flags &= ~SCAN_KEYS_FLAG; } void S9xMainLoop_SA1_NoSFX() @@ -152,9 +152,7 @@ void S9xMainLoop_SA1_NoSFX() break; } -#ifdef CPU_SHUTDOWN CPU.PCAtOpcodeStart = CPU.PC; -#endif CPU.Cycles += CPU.MemSpeed; (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)(); @@ -169,8 +167,7 @@ void S9xMainLoop_SA1_NoSFX() IAPU.Registers.PC = IAPU.PC - IAPU.RAM; S9xAPUPackStatus(); #endif - if (CPU.Flags & SCAN_KEYS_FLAG) - CPU.Flags &= ~SCAN_KEYS_FLAG; + CPU.Flags &= ~SCAN_KEYS_FLAG; } void S9xMainLoop_NoSA1_SFX() @@ -218,9 +215,7 @@ void S9xMainLoop_NoSA1_SFX() break; } -#ifdef CPU_SHUTDOWN CPU.PCAtOpcodeStart = CPU.PC; -#endif CPU.Cycles += CPU.MemSpeed; (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)(); DO_HBLANK_CHECK_SFX(); @@ -232,8 +227,7 @@ void S9xMainLoop_NoSA1_SFX() IAPU.Registers.PC = IAPU.PC - IAPU.RAM; S9xAPUPackStatus(); #endif - if (CPU.Flags & SCAN_KEYS_FLAG) - CPU.Flags &= ~SCAN_KEYS_FLAG; + CPU.Flags &= ~SCAN_KEYS_FLAG; } void S9xMainLoop_NoSA1_NoSFX() @@ -281,9 +275,7 @@ void S9xMainLoop_NoSA1_NoSFX() break; } -#ifdef CPU_SHUTDOWN CPU.PCAtOpcodeStart = CPU.PC; -#endif CPU.Cycles += CPU.MemSpeed; (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)(); DO_HBLANK_CHECK_NoSFX(); @@ -295,8 +287,7 @@ void S9xMainLoop_NoSA1_NoSFX() IAPU.Registers.PC = IAPU.PC - IAPU.RAM; S9xAPUPackStatus(); #endif - if (CPU.Flags & SCAN_KEYS_FLAG) - CPU.Flags &= ~SCAN_KEYS_FLAG; + CPU.Flags &= ~SCAN_KEYS_FLAG; } void S9xSetIRQ(uint32_t source) @@ -329,19 +320,15 @@ void S9xClearIRQ(uint32_t source) */ void S9xDoHBlankProcessing_SFX() { -#ifdef CPU_SHUTDOWN CPU.WaitCounter++; -#endif switch (CPU.WhichEvent) { case HBLANK_START_EVENT: if (IPPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight) IPPU.HDMA = S9xDoHDMA(IPPU.HDMA); break; - case HBLANK_END_EVENT: S9xSuperFXExec(); - #ifndef USE_BLARGG_APU CPU.Cycles -= Settings.H_Max; if (IAPU.APUExecuting) @@ -354,7 +341,6 @@ void S9xDoHBlankProcessing_SFX() S9xAPUSetReferenceTime(CPU.Cycles); #endif CPU.NextEvent = -1; - ICPU.Scanline++; if (++CPU.V_Counter >= (Settings.PAL ? SNES_MAX_PAL_VCOUNTER : SNES_MAX_NTSC_VCOUNTER)) { @@ -363,7 +349,6 @@ void S9xDoHBlankProcessing_SFX() PPU.RangeTimeOver = 0; CPU.NMIActive = false; ICPU.Frame++; - PPU.HVBeamCounterLatched = 0; CPU.Flags |= SCAN_KEYS_FLAG; S9xStartHDMA(); } @@ -377,8 +362,6 @@ void S9xDoHBlankProcessing_SFX() S9xEndScreenRefresh(); IPPU.HDMA = 0; // Bits 7 and 6 of $4212 are computed when read in S9xGetPPU. - missing.dma_this_frame = 0; - IPPU.MaxBrightness = PPU.Brightness; PPU.ForcedBlanking = (Memory.FillRAM [0x2100] >> 7) & 1; if (!PPU.ForcedBlanking) @@ -418,13 +401,7 @@ void S9xDoHBlankProcessing_SFX() if (CPU.V_Counter >= FIRST_VISIBLE_LINE && CPU.V_Counter < PPU.ScreenHeight + FIRST_VISIBLE_LINE) RenderLine(CPU.V_Counter - FIRST_VISIBLE_LINE); - #ifndef USE_BLARGG_APU - // Use TimerErrorCounter to skip update of SPC700 timers once - // every 128 updates. Needed because this section of code is called - // once every emulated 63.5 microseconds, which coresponds to - // 15.750KHz, but the SPC700 timers need to be updated at multiples - // of 8KHz, hence the error correction. { if (APU.TimerEnabled [2]) { @@ -433,10 +410,8 @@ void S9xDoHBlankProcessing_SFX() { IAPU.RAM [0xff] = (IAPU.RAM [0xff] + 1) & 0xf; APU.Timer [2] -= APU.TimerTarget [2]; -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; IAPU.APUExecuting = true; -#endif } } if (CPU.V_Counter & 1) @@ -448,10 +423,8 @@ void S9xDoHBlankProcessing_SFX() { IAPU.RAM [0xfd] = (IAPU.RAM [0xfd] + 1) & 0xf; APU.Timer [0] = 0; -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; IAPU.APUExecuting = true; -#endif } } if (APU.TimerEnabled [1]) @@ -461,41 +434,34 @@ void S9xDoHBlankProcessing_SFX() { IAPU.RAM [0xfe] = (IAPU.RAM [0xfe] + 1) & 0xf; APU.Timer [1] = 0; -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; IAPU.APUExecuting = true; -#endif } } } } -#endif // #ifndef USE_BLARGG_APU +#endif break; - case HTIMER_BEFORE_EVENT: case HTIMER_AFTER_EVENT: - if (PPU.HTimerEnabled && (!PPU.VTimerEnabled - || CPU.V_Counter == PPU.IRQVBeamPos)) + if (PPU.HTimerEnabled && (!PPU.VTimerEnabled || CPU.V_Counter == PPU.IRQVBeamPos)) S9xSetIRQ(PPU_H_BEAM_IRQ_SOURCE); break; } S9xReschedule(); } + void S9xDoHBlankProcessing_NoSFX() { -#ifdef CPU_SHUTDOWN CPU.WaitCounter++; -#endif switch (CPU.WhichEvent) { case HBLANK_START_EVENT: if (IPPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight) IPPU.HDMA = S9xDoHDMA(IPPU.HDMA); break; - case HBLANK_END_EVENT: - #ifndef USE_BLARGG_APU CPU.Cycles -= Settings.H_Max; if (IAPU.APUExecuting) @@ -507,9 +473,7 @@ void S9xDoHBlankProcessing_NoSFX() CPU.Cycles -= Settings.H_Max; S9xAPUSetReferenceTime(CPU.Cycles); #endif - CPU.NextEvent = -1; - ICPU.Scanline++; if (++CPU.V_Counter >= (Settings.PAL ? SNES_MAX_PAL_VCOUNTER : SNES_MAX_NTSC_VCOUNTER)) { @@ -518,7 +482,6 @@ void S9xDoHBlankProcessing_NoSFX() PPU.RangeTimeOver = 0; CPU.NMIActive = false; ICPU.Frame++; - PPU.HVBeamCounterLatched = 0; CPU.Flags |= SCAN_KEYS_FLAG; S9xStartHDMA(); } @@ -532,8 +495,6 @@ void S9xDoHBlankProcessing_NoSFX() S9xEndScreenRefresh(); IPPU.HDMA = 0; // Bits 7 and 6 of $4212 are computed when read in S9xGetPPU. - missing.dma_this_frame = 0; - IPPU.MaxBrightness = PPU.Brightness; PPU.ForcedBlanking = (Memory.FillRAM [0x2100] >> 7) & 1; if (!PPU.ForcedBlanking) @@ -573,11 +534,6 @@ void S9xDoHBlankProcessing_NoSFX() if (CPU.V_Counter >= FIRST_VISIBLE_LINE && CPU.V_Counter < PPU.ScreenHeight + FIRST_VISIBLE_LINE) RenderLine(CPU.V_Counter - FIRST_VISIBLE_LINE); - // Use TimerErrorCounter to skip update of SPC700 timers once - // every 128 updates. Needed because this section of code is called - // once every emulated 63.5 microseconds, which coresponds to - // 15.750KHz, but the SPC700 timers need to be updated at multiples - // of 8KHz, hence the error correction. #ifndef USE_BLARGG_APU { if (APU.TimerEnabled [2]) @@ -587,10 +543,8 @@ void S9xDoHBlankProcessing_NoSFX() { IAPU.RAM [0xff] = (IAPU.RAM [0xff] + 1) & 0xf; APU.Timer [2] -= APU.TimerTarget [2]; -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; IAPU.APUExecuting = true; -#endif } } if (CPU.V_Counter & 1) @@ -602,10 +556,8 @@ void S9xDoHBlankProcessing_NoSFX() { IAPU.RAM [0xfd] = (IAPU.RAM [0xfd] + 1) & 0xf; APU.Timer [0] = 0; -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; IAPU.APUExecuting = true; -#endif } } if (APU.TimerEnabled [1]) @@ -615,10 +567,8 @@ void S9xDoHBlankProcessing_NoSFX() { IAPU.RAM [0xfe] = (IAPU.RAM [0xfe] + 1) & 0xf; APU.Timer [1] = 0; -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; IAPU.APUExecuting = true; -#endif } } } diff --git a/source/cpuexec.h b/source/cpuexec.h index d6a1db0..7d4008c 100644 --- a/source/cpuexec.h +++ b/source/cpuexec.h @@ -18,15 +18,15 @@ typedef struct #define DO_HBLANK_CHECK_SFX() \ if (CPU.Cycles >= CPU.NextEvent) \ - S9xDoHBlankProcessing_SFX (); + S9xDoHBlankProcessing_SFX (); #define DO_HBLANK_CHECK_NoSFX() \ if (CPU.Cycles >= CPU.NextEvent) \ - S9xDoHBlankProcessing_NoSFX (); + S9xDoHBlankProcessing_NoSFX (); typedef struct { - uint8_t* Speed; + uint8_t* UNUSED1; SOpcodes* S9xOpcodes; SRegisters Registers; uint8_t _Carry; @@ -37,19 +37,19 @@ typedef struct uint32_t ShiftedPB; uint32_t ShiftedDB; uint32_t Frame; - uint32_t Scanline; - uint32_t FrameAdvanceCount; + uint32_t UNUSED2; + uint32_t UNUSED3; } SICPU; -void S9xMainLoop(); -void S9xReset(); -void S9xSoftReset(); -void S9xDoHBlankProcessing_SFX(); -void S9xDoHBlankProcessing_NoSFX(); -void S9xClearIRQ(uint32_t); -void S9xSetIRQ(uint32_t); +void S9xMainLoop(void); +void S9xReset(void); +void S9xSoftReset(void); +void S9xDoHBlankProcessing_SFX(void); +void S9xDoHBlankProcessing_NoSFX(void); +void S9xClearIRQ(uint32_t source); +void S9xSetIRQ(uint32_t source); -extern SOpcodes S9xOpcodesE1 [256]; +extern SOpcodes S9xOpcodesE1 [256]; extern SOpcodes S9xOpcodesM1X1 [256]; extern SOpcodes S9xOpcodesM1X0 [256]; extern SOpcodes S9xOpcodesM0X1 [256]; diff --git a/source/cpumacro.h b/source/cpumacro.h index 5868fed..7712e49 100644 --- a/source/cpumacro.h +++ b/source/cpumacro.h @@ -119,7 +119,6 @@ static inline void ADC16() else { uint32_t Ans32 = ICPU.Registers.A.W + Work16 + CheckCarry(); - ICPU._Carry = Ans32 > 0xffff; if (~(ICPU.Registers.A.W ^ Work16) & (Work16 ^ (uint16_t) Ans32) & 0x8000) @@ -251,9 +250,7 @@ static inline void A_DEC16() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.A.W--; SetZN16(ICPU.Registers.A.W); } @@ -263,9 +260,7 @@ static inline void A_DEC8() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.AL--; SetZN8(ICPU.Registers.AL); } @@ -275,9 +270,7 @@ static inline void DEC16() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif uint16_t Work16 = S9xGetWord(OpAddress) - 1; S9xSetByte(Work16 >> 8, OpAddress + 1); S9xSetByte(Work16 & 0xFF, OpAddress); @@ -289,9 +282,7 @@ static inline void DEC8() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif uint8_t Work8 = S9xGetByte(OpAddress) - 1; S9xSetByte(Work8, OpAddress); SetZN8(Work8); @@ -314,9 +305,7 @@ static inline void A_INC16() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.A.W++; SetZN16(ICPU.Registers.A.W); } @@ -326,9 +315,7 @@ static inline void A_INC8() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.AL++; SetZN8(ICPU.Registers.AL); } @@ -338,9 +325,7 @@ static inline void INC16() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif uint16_t Work16 = S9xGetWord(OpAddress) + 1; S9xSetByte(Work16 >> 8, OpAddress + 1); S9xSetByte(Work16 & 0xFF, OpAddress); @@ -352,9 +337,7 @@ static inline void INC8() #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif uint8_t Work8 = S9xGetByte(OpAddress) + 1; S9xSetByte(Work8, OpAddress); SetZN8(Work8); diff --git a/source/cpuops.c b/source/cpuops.c index 0b92901..c86d9c1 100644 --- a/source/cpuops.c +++ b/source/cpuops.c @@ -7,11 +7,9 @@ #include "snes9x.h" #include "memmap.h" -#include "missing.h" #include "apu.h" #include "sa1.h" #include "spc7110.h" - #include "cpuexec.h" #include "cpuaddr.h" #include "cpuops.h" @@ -21,181 +19,181 @@ int32_t OpAddress; /* ADC *************************************************************************************** */ -static void Op69M1() +static void Op69M1(void) { Immediate8(); ADC8(); } -static void Op69M0() +static void Op69M0(void) { Immediate16(); ADC16(); } -static void Op65M1() +static void Op65M1(void) { Direct(true); ADC8(); } -static void Op65M0() +static void Op65M0(void) { Direct(true); ADC16(); } -static void Op75M1() +static void Op75M1(void) { DirectIndexedX(true); ADC8(); } -static void Op75M0() +static void Op75M0(void) { DirectIndexedX(true); ADC16(); } -static void Op72M1() +static void Op72M1(void) { DirectIndirect(true); ADC8(); } -static void Op72M0() +static void Op72M0(void) { DirectIndirect(true); ADC16(); } -static void Op61M1() +static void Op61M1(void) { DirectIndexedIndirect(true); ADC8(); } -static void Op61M0() +static void Op61M0(void) { DirectIndexedIndirect(true); ADC16(); } -static void Op71M1() +static void Op71M1(void) { DirectIndirectIndexed(true); ADC8(); } -static void Op71M0() +static void Op71M0(void) { DirectIndirectIndexed(true); ADC16(); } -static void Op67M1() +static void Op67M1(void) { DirectIndirectLong(true); ADC8(); } -static void Op67M0() +static void Op67M0(void) { DirectIndirectLong(true); ADC16(); } -static void Op77M1() +static void Op77M1(void) { DirectIndirectIndexedLong(true); ADC8(); } -static void Op77M0() +static void Op77M0(void) { DirectIndirectIndexedLong(true); ADC16(); } -static void Op6DM1() +static void Op6DM1(void) { Absolute(true); ADC8(); } -static void Op6DM0() +static void Op6DM0(void) { Absolute(true); ADC16(); } -static void Op7DM1() +static void Op7DM1(void) { AbsoluteIndexedX(true); ADC8(); } -static void Op7DM0() +static void Op7DM0(void) { AbsoluteIndexedX(true); ADC16(); } -static void Op79M1() +static void Op79M1(void) { AbsoluteIndexedY(true); ADC8(); } -static void Op79M0() +static void Op79M0(void) { AbsoluteIndexedY(true); ADC16(); } -static void Op6FM1() +static void Op6FM1(void) { AbsoluteLong(true); ADC8(); } -static void Op6FM0() +static void Op6FM0(void) { AbsoluteLong(true); ADC16(); } -static void Op7FM1() +static void Op7FM1(void) { AbsoluteLongIndexedX(true); ADC8(); } -static void Op7FM0() +static void Op7FM0(void) { AbsoluteLongIndexedX(true); ADC16(); } -static void Op63M1() +static void Op63M1(void) { StackRelative(true); ADC8(); } -static void Op63M0() +static void Op63M0(void) { StackRelative(true); ADC16(); } -static void Op73M1() +static void Op73M1(void) { StackRelativeIndirectIndexed(true); ADC8(); } -static void Op73M0() +static void Op73M0(void) { StackRelativeIndirectIndexed(true); ADC16(); @@ -204,7 +202,7 @@ static void Op73M0() /**********************************************************************************************/ /* AND *************************************************************************************** */ -static void Op29M1() +static void Op29M1(void) { ICPU.Registers.AL &= *CPU.PC++; #ifndef SA1_OPCODES @@ -213,7 +211,7 @@ static void Op29M1() SetZN8(ICPU.Registers.AL); } -static void Op29M0() +static void Op29M0(void) { #ifdef FAST_LSB_WORD_ACCESS ICPU.Registers.A.W &= *(uint16_t*) CPU.PC; @@ -227,169 +225,169 @@ static void Op29M0() SetZN16(ICPU.Registers.A.W); } -static void Op25M1() +static void Op25M1(void) { Direct(true); AND8(); } -static void Op25M0() +static void Op25M0(void) { Direct(true); AND16(); } -static void Op35M1() +static void Op35M1(void) { DirectIndexedX(true); AND8(); } -static void Op35M0() +static void Op35M0(void) { DirectIndexedX(true); AND16(); } -static void Op32M1() +static void Op32M1(void) { DirectIndirect(true); AND8(); } -static void Op32M0() +static void Op32M0(void) { DirectIndirect(true); AND16(); } -static void Op21M1() +static void Op21M1(void) { DirectIndexedIndirect(true); AND8(); } -static void Op21M0() +static void Op21M0(void) { DirectIndexedIndirect(true); AND16(); } -static void Op31M1() +static void Op31M1(void) { DirectIndirectIndexed(true); AND8(); } -static void Op31M0() +static void Op31M0(void) { DirectIndirectIndexed(true); AND16(); } -static void Op27M1() +static void Op27M1(void) { DirectIndirectLong(true); AND8(); } -static void Op27M0() +static void Op27M0(void) { DirectIndirectLong(true); AND16(); } -static void Op37M1() +static void Op37M1(void) { DirectIndirectIndexedLong(true); AND8(); } -static void Op37M0() +static void Op37M0(void) { DirectIndirectIndexedLong(true); AND16(); } -static void Op2DM1() +static void Op2DM1(void) { Absolute(true); AND8(); } -static void Op2DM0() +static void Op2DM0(void) { Absolute(true); AND16(); } -static void Op3DM1() +static void Op3DM1(void) { AbsoluteIndexedX(true); AND8(); } -static void Op3DM0() +static void Op3DM0(void) { AbsoluteIndexedX(true); AND16(); } -static void Op39M1() +static void Op39M1(void) { AbsoluteIndexedY(true); AND8(); } -static void Op39M0() +static void Op39M0(void) { AbsoluteIndexedY(true); AND16(); } -static void Op2FM1() +static void Op2FM1(void) { AbsoluteLong(true); AND8(); } -static void Op2FM0() +static void Op2FM0(void) { AbsoluteLong(true); AND16(); } -static void Op3FM1() +static void Op3FM1(void) { AbsoluteLongIndexedX(true); AND8(); } -static void Op3FM0() +static void Op3FM0(void) { AbsoluteLongIndexedX(true); AND16(); } -static void Op23M1() +static void Op23M1(void) { StackRelative(true); AND8(); } -static void Op23M0() +static void Op23M0(void) { StackRelative(true); AND16(); } -static void Op33M1() +static void Op33M1(void) { StackRelativeIndirectIndexed(true); AND8(); } -static void Op33M0() +static void Op33M0(void) { StackRelativeIndirectIndexed(true); AND16(); @@ -397,59 +395,59 @@ static void Op33M0() /**********************************************************************************************/ /* ASL *************************************************************************************** */ -static void Op0AM1() +static void Op0AM1(void) { A_ASL8(); } -static void Op0AM0() +static void Op0AM0(void) { A_ASL16(); } -static void Op06M1() +static void Op06M1(void) { Direct(false); ASL8(); } -static void Op06M0() +static void Op06M0(void) { Direct(false); ASL16(); } -static void Op16M1() +static void Op16M1(void) { DirectIndexedX(false); ASL8(); } -static void Op16M0() +static void Op16M0(void) { DirectIndexedX(false); ASL16(); } -static void Op0EM1() +static void Op0EM1(void) { Absolute(false); ASL8(); } -static void Op0EM0() +static void Op0EM0(void) { Absolute(false); ASL16(); } -static void Op1EM1() +static void Op1EM1(void) { AbsoluteIndexedX(false); ASL8(); } -static void Op1EM0() +static void Op1EM0(void) { AbsoluteIndexedX(false); ASL16(); @@ -457,7 +455,7 @@ static void Op1EM0() /**********************************************************************************************/ /* BIT *************************************************************************************** */ -static void Op89M1() +static void Op89M1(void) { ICPU._Zero = ICPU.Registers.AL & *CPU.PC++; #ifndef SA1_OPCODES @@ -465,7 +463,7 @@ static void Op89M1() #endif } -static void Op89M0() +static void Op89M0(void) { #ifdef FAST_LSB_WORD_ACCESS ICPU._Zero = (ICPU.Registers.A.W & *(uint16_t*) CPU.PC) != 0; @@ -478,49 +476,49 @@ static void Op89M0() CPU.PC += 2; } -static void Op24M1() +static void Op24M1(void) { Direct(true); BIT8(); } -static void Op24M0() +static void Op24M0(void) { Direct(true); BIT16(); } -static void Op34M1() +static void Op34M1(void) { DirectIndexedX(true); BIT8(); } -static void Op34M0() +static void Op34M0(void) { DirectIndexedX(true); BIT16(); } -static void Op2CM1() +static void Op2CM1(void) { Absolute(true); BIT8(); } -static void Op2CM0() +static void Op2CM0(void) { Absolute(true); BIT16(); } -static void Op3CM1() +static void Op3CM1(void) { AbsoluteIndexedX(true); BIT8(); } -static void Op3CM0() +static void Op3CM0(void) { AbsoluteIndexedX(true); BIT16(); @@ -528,7 +526,7 @@ static void Op3CM0() /**********************************************************************************************/ /* CMP *************************************************************************************** */ -static void OpC9M1() +static void OpC9M1(void) { int32_t Int32 = (int32_t) ICPU.Registers.AL - (int32_t) *CPU.PC++; ICPU._Carry = Int32 >= 0; @@ -538,7 +536,7 @@ static void OpC9M1() #endif } -static void OpC9M0() +static void OpC9M0(void) { #ifdef FAST_LSB_WORD_ACCESS int32_t Int32 = (int32_t) ICPU.Registers.A.W - (int32_t) *(uint16_t*)CPU.PC; @@ -553,169 +551,169 @@ static void OpC9M0() #endif } -static void OpC5M1() +static void OpC5M1(void) { Direct(true); CMP8(); } -static void OpC5M0() +static void OpC5M0(void) { Direct(true); CMP16(); } -static void OpD5M1() +static void OpD5M1(void) { DirectIndexedX(true); CMP8(); } -static void OpD5M0() +static void OpD5M0(void) { DirectIndexedX(true); CMP16(); } -static void OpD2M1() +static void OpD2M1(void) { DirectIndirect(true); CMP8(); } -static void OpD2M0() +static void OpD2M0(void) { DirectIndirect(true); CMP16(); } -static void OpC1M1() +static void OpC1M1(void) { DirectIndexedIndirect(true); CMP8(); } -static void OpC1M0() +static void OpC1M0(void) { DirectIndexedIndirect(true); CMP16(); } -static void OpD1M1() +static void OpD1M1(void) { DirectIndirectIndexed(true); CMP8(); } -static void OpD1M0() +static void OpD1M0(void) { DirectIndirectIndexed(true); CMP16(); } -static void OpC7M1() +static void OpC7M1(void) { DirectIndirectLong(true); CMP8(); } -static void OpC7M0() +static void OpC7M0(void) { DirectIndirectLong(true); CMP16(); } -static void OpD7M1() +static void OpD7M1(void) { DirectIndirectIndexedLong(true); CMP8(); } -static void OpD7M0() +static void OpD7M0(void) { DirectIndirectIndexedLong(true); CMP16(); } -static void OpCDM1() +static void OpCDM1(void) { Absolute(true); CMP8(); } -static void OpCDM0() +static void OpCDM0(void) { Absolute(true); CMP16(); } -static void OpDDM1() +static void OpDDM1(void) { AbsoluteIndexedX(true); CMP8(); } -static void OpDDM0() +static void OpDDM0(void) { AbsoluteIndexedX(true); CMP16(); } -static void OpD9M1() +static void OpD9M1(void) { AbsoluteIndexedY(true); CMP8(); } -static void OpD9M0() +static void OpD9M0(void) { AbsoluteIndexedY(true); CMP16(); } -static void OpCFM1() +static void OpCFM1(void) { AbsoluteLong(true); CMP8(); } -static void OpCFM0() +static void OpCFM0(void) { AbsoluteLong(true); CMP16(); } -static void OpDFM1() +static void OpDFM1(void) { AbsoluteLongIndexedX(true); CMP8(); } -static void OpDFM0() +static void OpDFM0(void) { AbsoluteLongIndexedX(true); CMP16(); } -static void OpC3M1() +static void OpC3M1(void) { StackRelative(true); CMP8(); } -static void OpC3M0() +static void OpC3M0(void) { StackRelative(true); CMP16(); } -static void OpD3M1() +static void OpD3M1(void) { StackRelativeIndirectIndexed(true); CMP8(); } -static void OpD3M0() +static void OpD3M0(void) { StackRelativeIndirectIndexed(true); CMP16(); @@ -724,7 +722,7 @@ static void OpD3M0() /**********************************************************************************************/ /* CMX *************************************************************************************** */ -static void OpE0X1() +static void OpE0X1(void) { int32_t Int32 = (int32_t) ICPU.Registers.XL - (int32_t) *CPU.PC++; ICPU._Carry = Int32 >= 0; @@ -734,7 +732,7 @@ static void OpE0X1() #endif } -static void OpE0X0() +static void OpE0X0(void) { #ifdef FAST_LSB_WORD_ACCESS int32_t Int32 = (int32_t) ICPU.Registers.X.W - (int32_t) *(uint16_t*)CPU.PC; @@ -749,25 +747,25 @@ static void OpE0X0() #endif } -static void OpE4X1() +static void OpE4X1(void) { Direct(true); CMX8(); } -static void OpE4X0() +static void OpE4X0(void) { Direct(true); CMX16(); } -static void OpECX1() +static void OpECX1(void) { Absolute(true); CMX8(); } -static void OpECX0() +static void OpECX0(void) { Absolute(true); CMX16(); @@ -776,7 +774,7 @@ static void OpECX0() /**********************************************************************************************/ /* CMY *************************************************************************************** */ -static void OpC0X1() +static void OpC0X1(void) { int32_t Int32 = (int32_t) ICPU.Registers.YL - (int32_t) *CPU.PC++; ICPU._Carry = Int32 >= 0; @@ -786,7 +784,7 @@ static void OpC0X1() #endif } -static void OpC0X0() +static void OpC0X0(void) { #ifdef FAST_LSB_WORD_ACCESS int32_t Int32 = (int32_t) ICPU.Registers.Y.W - (int32_t) *(uint16_t*)CPU.PC; @@ -801,25 +799,25 @@ static void OpC0X0() #endif } -static void OpC4X1() +static void OpC4X1(void) { Direct(true); CMY8(); } -static void OpC4X0() +static void OpC4X0(void) { Direct(true); CMY16(); } -static void OpCCX1() +static void OpCCX1(void) { Absolute(true); CMY8(); } -static void OpCCX0() +static void OpCCX0(void) { Absolute(true); CMY16(); @@ -828,59 +826,59 @@ static void OpCCX0() /**********************************************************************************************/ /* DEC *************************************************************************************** */ -static void Op3AM1() +static void Op3AM1(void) { A_DEC8(); } -static void Op3AM0() +static void Op3AM0(void) { A_DEC16(); } -static void OpC6M1() +static void OpC6M1(void) { Direct(false); DEC8(); } -static void OpC6M0() +static void OpC6M0(void) { Direct(false); DEC16(); } -static void OpD6M1() +static void OpD6M1(void) { DirectIndexedX(false); DEC8(); } -static void OpD6M0() +static void OpD6M0(void) { DirectIndexedX(false); DEC16(); } -static void OpCEM1() +static void OpCEM1(void) { Absolute(false); DEC8(); } -static void OpCEM0() +static void OpCEM0(void) { Absolute(false); DEC16(); } -static void OpDEM1() +static void OpDEM1(void) { AbsoluteIndexedX(false); DEC8(); } -static void OpDEM0() +static void OpDEM0(void) { AbsoluteIndexedX(false); DEC16(); @@ -889,7 +887,7 @@ static void OpDEM0() /**********************************************************************************************/ /* EOR *************************************************************************************** */ -static void Op49M1() +static void Op49M1(void) { ICPU.Registers.AL ^= *CPU.PC++; #ifndef SA1_OPCODES @@ -898,7 +896,7 @@ static void Op49M1() SetZN8(ICPU.Registers.AL); } -static void Op49M0() +static void Op49M0(void) { #ifdef FAST_LSB_WORD_ACCESS ICPU.Registers.A.W ^= *(uint16_t*) CPU.PC; @@ -912,169 +910,169 @@ static void Op49M0() SetZN16(ICPU.Registers.A.W); } -static void Op45M1() +static void Op45M1(void) { Direct(true); EOR8(); } -static void Op45M0() +static void Op45M0(void) { Direct(true); EOR16(); } -static void Op55M1() +static void Op55M1(void) { DirectIndexedX(true); EOR8(); } -static void Op55M0() +static void Op55M0(void) { DirectIndexedX(true); EOR16(); } -static void Op52M1() +static void Op52M1(void) { DirectIndirect(true); EOR8(); } -static void Op52M0() +static void Op52M0(void) { DirectIndirect(true); EOR16(); } -static void Op41M1() +static void Op41M1(void) { DirectIndexedIndirect(true); EOR8(); } -static void Op41M0() +static void Op41M0(void) { DirectIndexedIndirect(true); EOR16(); } -static void Op51M1() +static void Op51M1(void) { DirectIndirectIndexed(true); EOR8(); } -static void Op51M0() +static void Op51M0(void) { DirectIndirectIndexed(true); EOR16(); } -static void Op47M1() +static void Op47M1(void) { DirectIndirectLong(true); EOR8(); } -static void Op47M0() +static void Op47M0(void) { DirectIndirectLong(true); EOR16(); } -static void Op57M1() +static void Op57M1(void) { DirectIndirectIndexedLong(true); EOR8(); } -static void Op57M0() +static void Op57M0(void) { DirectIndirectIndexedLong(true); EOR16(); } -static void Op4DM1() +static void Op4DM1(void) { Absolute(true); EOR8(); } -static void Op4DM0() +static void Op4DM0(void) { Absolute(true); EOR16(); } -static void Op5DM1() +static void Op5DM1(void) { AbsoluteIndexedX(true); EOR8(); } -static void Op5DM0() +static void Op5DM0(void) { AbsoluteIndexedX(true); EOR16(); } -static void Op59M1() +static void Op59M1(void) { AbsoluteIndexedY(true); EOR8(); } -static void Op59M0() +static void Op59M0(void) { AbsoluteIndexedY(true); EOR16(); } -static void Op4FM1() +static void Op4FM1(void) { AbsoluteLong(true); EOR8(); } -static void Op4FM0() +static void Op4FM0(void) { AbsoluteLong(true); EOR16(); } -static void Op5FM1() +static void Op5FM1(void) { AbsoluteLongIndexedX(true); EOR8(); } -static void Op5FM0() +static void Op5FM0(void) { AbsoluteLongIndexedX(true); EOR16(); } -static void Op43M1() +static void Op43M1(void) { StackRelative(true); EOR8(); } -static void Op43M0() +static void Op43M0(void) { StackRelative(true); EOR16(); } -static void Op53M1() +static void Op53M1(void) { StackRelativeIndirectIndexed(true); EOR8(); } -static void Op53M0() +static void Op53M0(void) { StackRelativeIndirectIndexed(true); EOR16(); @@ -1083,59 +1081,59 @@ static void Op53M0() /**********************************************************************************************/ /* INC *************************************************************************************** */ -static void Op1AM1() +static void Op1AM1(void) { A_INC8(); } -static void Op1AM0() +static void Op1AM0(void) { A_INC16(); } -static void OpE6M1() +static void OpE6M1(void) { Direct(false); INC8(); } -static void OpE6M0() +static void OpE6M0(void) { Direct(false); INC16(); } -static void OpF6M1() +static void OpF6M1(void) { DirectIndexedX(false); INC8(); } -static void OpF6M0() +static void OpF6M0(void) { DirectIndexedX(false); INC16(); } -static void OpEEM1() +static void OpEEM1(void) { Absolute(false); INC8(); } -static void OpEEM0() +static void OpEEM0(void) { Absolute(false); INC16(); } -static void OpFEM1() +static void OpFEM1(void) { AbsoluteIndexedX(false); INC8(); } -static void OpFEM0() +static void OpFEM0(void) { AbsoluteIndexedX(false); INC16(); @@ -1143,7 +1141,7 @@ static void OpFEM0() /**********************************************************************************************/ /* LDA *************************************************************************************** */ -static void OpA9M1() +static void OpA9M1(void) { ICPU.Registers.AL = *CPU.PC++; #ifndef SA1_OPCODES @@ -1152,7 +1150,7 @@ static void OpA9M1() SetZN8(ICPU.Registers.AL); } -static void OpA9M0() +static void OpA9M0(void) { #ifdef FAST_LSB_WORD_ACCESS ICPU.Registers.A.W = *(uint16_t*) CPU.PC; @@ -1167,169 +1165,169 @@ static void OpA9M0() SetZN16(ICPU.Registers.A.W); } -static void OpA5M1() +static void OpA5M1(void) { Direct(true); LDA8(); } -static void OpA5M0() +static void OpA5M0(void) { Direct(true); LDA16(); } -static void OpB5M1() +static void OpB5M1(void) { DirectIndexedX(true); LDA8(); } -static void OpB5M0() +static void OpB5M0(void) { DirectIndexedX(true); LDA16(); } -static void OpB2M1() +static void OpB2M1(void) { DirectIndirect(true); LDA8(); } -static void OpB2M0() +static void OpB2M0(void) { DirectIndirect(true); LDA16(); } -static void OpA1M1() +static void OpA1M1(void) { DirectIndexedIndirect(true); LDA8(); } -static void OpA1M0() +static void OpA1M0(void) { DirectIndexedIndirect(true); LDA16(); } -static void OpB1M1() +static void OpB1M1(void) { DirectIndirectIndexed(true); LDA8(); } -static void OpB1M0() +static void OpB1M0(void) { DirectIndirectIndexed(true); LDA16(); } -static void OpA7M1() +static void OpA7M1(void) { DirectIndirectLong(true); LDA8(); } -static void OpA7M0() +static void OpA7M0(void) { DirectIndirectLong(true); LDA16(); } -static void OpB7M1() +static void OpB7M1(void) { DirectIndirectIndexedLong(true); LDA8(); } -static void OpB7M0() +static void OpB7M0(void) { DirectIndirectIndexedLong(true); LDA16(); } -static void OpADM1() +static void OpADM1(void) { Absolute(true); LDA8(); } -static void OpADM0() +static void OpADM0(void) { Absolute(true); LDA16(); } -static void OpBDM1() +static void OpBDM1(void) { AbsoluteIndexedX(true); LDA8(); } -static void OpBDM0() +static void OpBDM0(void) { AbsoluteIndexedX(true); LDA16(); } -static void OpB9M1() +static void OpB9M1(void) { AbsoluteIndexedY(true); LDA8(); } -static void OpB9M0() +static void OpB9M0(void) { AbsoluteIndexedY(true); LDA16(); } -static void OpAFM1() +static void OpAFM1(void) { AbsoluteLong(true); LDA8(); } -static void OpAFM0() +static void OpAFM0(void) { AbsoluteLong(true); LDA16(); } -static void OpBFM1() +static void OpBFM1(void) { AbsoluteLongIndexedX(true); LDA8(); } -static void OpBFM0() +static void OpBFM0(void) { AbsoluteLongIndexedX(true); LDA16(); } -static void OpA3M1() +static void OpA3M1(void) { StackRelative(true); LDA8(); } -static void OpA3M0() +static void OpA3M0(void) { StackRelative(true); LDA16(); } -static void OpB3M1() +static void OpB3M1(void) { StackRelativeIndirectIndexed(true); LDA8(); } -static void OpB3M0() +static void OpB3M0(void) { StackRelativeIndirectIndexed(true); LDA16(); @@ -1338,7 +1336,7 @@ static void OpB3M0() /**********************************************************************************************/ /* LDX *************************************************************************************** */ -static void OpA2X1() +static void OpA2X1(void) { ICPU.Registers.XL = *CPU.PC++; #ifndef SA1_OPCODES @@ -1347,7 +1345,7 @@ static void OpA2X1() SetZN8(ICPU.Registers.XL); } -static void OpA2X0() +static void OpA2X0(void) { #ifdef FAST_LSB_WORD_ACCESS ICPU.Registers.X.W = *(uint16_t*) CPU.PC; @@ -1361,49 +1359,49 @@ static void OpA2X0() SetZN16(ICPU.Registers.X.W); } -static void OpA6X1() +static void OpA6X1(void) { Direct(true); LDX8(); } -static void OpA6X0() +static void OpA6X0(void) { Direct(true); LDX16(); } -static void OpB6X1() +static void OpB6X1(void) { DirectIndexedY(true); LDX8(); } -static void OpB6X0() +static void OpB6X0(void) { DirectIndexedY(true); LDX16(); } -static void OpAEX1() +static void OpAEX1(void) { Absolute(true); LDX8(); } -static void OpAEX0() +static void OpAEX0(void) { Absolute(true); LDX16(); } -static void OpBEX1() +static void OpBEX1(void) { AbsoluteIndexedY(true); LDX8(); } -static void OpBEX0() +static void OpBEX0(void) { AbsoluteIndexedY(true); LDX16(); @@ -1411,7 +1409,7 @@ static void OpBEX0() /**********************************************************************************************/ /* LDY *************************************************************************************** */ -static void OpA0X1() +static void OpA0X1(void) { ICPU.Registers.YL = *CPU.PC++; #ifndef SA1_OPCODES @@ -1420,7 +1418,7 @@ static void OpA0X1() SetZN8(ICPU.Registers.YL); } -static void OpA0X0() +static void OpA0X0(void) { #ifdef FAST_LSB_WORD_ACCESS ICPU.Registers.Y.W = *(uint16_t*) CPU.PC; @@ -1435,49 +1433,49 @@ static void OpA0X0() SetZN16(ICPU.Registers.Y.W); } -static void OpA4X1() +static void OpA4X1(void) { Direct(true); LDY8(); } -static void OpA4X0() +static void OpA4X0(void) { Direct(true); LDY16(); } -static void OpB4X1() +static void OpB4X1(void) { DirectIndexedX(true); LDY8(); } -static void OpB4X0() +static void OpB4X0(void) { DirectIndexedX(true); LDY16(); } -static void OpACX1() +static void OpACX1(void) { Absolute(true); LDY8(); } -static void OpACX0() +static void OpACX0(void) { Absolute(true); LDY16(); } -static void OpBCX1() +static void OpBCX1(void) { AbsoluteIndexedX(true); LDY8(); } -static void OpBCX0() +static void OpBCX0(void) { AbsoluteIndexedX(true); LDY16(); @@ -1485,59 +1483,59 @@ static void OpBCX0() /**********************************************************************************************/ /* LSR *************************************************************************************** */ -static void Op4AM1() +static void Op4AM1(void) { A_LSR8(); } -static void Op4AM0() +static void Op4AM0(void) { A_LSR16(); } -static void Op46M1() +static void Op46M1(void) { Direct(false); LSR8(); } -static void Op46M0() +static void Op46M0(void) { Direct(false); LSR16(); } -static void Op56M1() +static void Op56M1(void) { DirectIndexedX(false); LSR8(); } -static void Op56M0() +static void Op56M0(void) { DirectIndexedX(false); LSR16(); } -static void Op4EM1() +static void Op4EM1(void) { Absolute(false); LSR8(); } -static void Op4EM0() +static void Op4EM0(void) { Absolute(false); LSR16(); } -static void Op5EM1() +static void Op5EM1(void) { AbsoluteIndexedX(false); LSR8(); } -static void Op5EM0() +static void Op5EM0(void) { AbsoluteIndexedX(false); LSR16(); @@ -1546,7 +1544,7 @@ static void Op5EM0() /**********************************************************************************************/ /* ORA *************************************************************************************** */ -static void Op09M1() +static void Op09M1(void) { ICPU.Registers.AL |= *CPU.PC++; #ifndef SA1_OPCODES @@ -1555,7 +1553,7 @@ static void Op09M1() SetZN8(ICPU.Registers.AL); } -static void Op09M0() +static void Op09M0(void) { #ifdef FAST_LSB_WORD_ACCESS ICPU.Registers.A.W |= *(uint16_t*) CPU.PC; @@ -1569,169 +1567,169 @@ static void Op09M0() SetZN16(ICPU.Registers.A.W); } -static void Op05M1() +static void Op05M1(void) { Direct(true); ORA8(); } -static void Op05M0() +static void Op05M0(void) { Direct(true); ORA16(); } -static void Op15M1() +static void Op15M1(void) { DirectIndexedX(true); ORA8(); } -static void Op15M0() +static void Op15M0(void) { DirectIndexedX(true); ORA16(); } -static void Op12M1() +static void Op12M1(void) { DirectIndirect(true); ORA8(); } -static void Op12M0() +static void Op12M0(void) { DirectIndirect(true); ORA16(); } -static void Op01M1() +static void Op01M1(void) { DirectIndexedIndirect(true); ORA8(); } -static void Op01M0() +static void Op01M0(void) { DirectIndexedIndirect(true); ORA16(); } -static void Op11M1() +static void Op11M1(void) { DirectIndirectIndexed(true); ORA8(); } -static void Op11M0() +static void Op11M0(void) { DirectIndirectIndexed(true); ORA16(); } -static void Op07M1() +static void Op07M1(void) { DirectIndirectLong(true); ORA8(); } -static void Op07M0() +static void Op07M0(void) { DirectIndirectLong(true); ORA16(); } -static void Op17M1() +static void Op17M1(void) { DirectIndirectIndexedLong(true); ORA8(); } -static void Op17M0() +static void Op17M0(void) { DirectIndirectIndexedLong(true); ORA16(); } -static void Op0DM1() +static void Op0DM1(void) { Absolute(true); ORA8(); } -static void Op0DM0() +static void Op0DM0(void) { Absolute(true); ORA16(); } -static void Op1DM1() +static void Op1DM1(void) { AbsoluteIndexedX(true); ORA8(); } -static void Op1DM0() +static void Op1DM0(void) { AbsoluteIndexedX(true); ORA16(); } -static void Op19M1() +static void Op19M1(void) { AbsoluteIndexedY(true); ORA8(); } -static void Op19M0() +static void Op19M0(void) { AbsoluteIndexedY(true); ORA16(); } -static void Op0FM1() +static void Op0FM1(void) { AbsoluteLong(true); ORA8(); } -static void Op0FM0() +static void Op0FM0(void) { AbsoluteLong(true); ORA16(); } -static void Op1FM1() +static void Op1FM1(void) { AbsoluteLongIndexedX(true); ORA8(); } -static void Op1FM0() +static void Op1FM0(void) { AbsoluteLongIndexedX(true); ORA16(); } -static void Op03M1() +static void Op03M1(void) { StackRelative(true); ORA8(); } -static void Op03M0() +static void Op03M0(void) { StackRelative(true); ORA16(); } -static void Op13M1() +static void Op13M1(void) { StackRelativeIndirectIndexed(true); ORA8(); } -static void Op13M0() +static void Op13M0(void) { StackRelativeIndirectIndexed(true); ORA16(); @@ -1740,59 +1738,59 @@ static void Op13M0() /**********************************************************************************************/ /* ROL *************************************************************************************** */ -static void Op2AM1() +static void Op2AM1(void) { A_ROL8(); } -static void Op2AM0() +static void Op2AM0(void) { A_ROL16(); } -static void Op26M1() +static void Op26M1(void) { Direct(false); ROL8(); } -static void Op26M0() +static void Op26M0(void) { Direct(false); ROL16(); } -static void Op36M1() +static void Op36M1(void) { DirectIndexedX(false); ROL8(); } -static void Op36M0() +static void Op36M0(void) { DirectIndexedX(false); ROL16(); } -static void Op2EM1() +static void Op2EM1(void) { Absolute(false); ROL8(); } -static void Op2EM0() +static void Op2EM0(void) { Absolute(false); ROL16(); } -static void Op3EM1() +static void Op3EM1(void) { AbsoluteIndexedX(false); ROL8(); } -static void Op3EM0() +static void Op3EM0(void) { AbsoluteIndexedX(false); ROL16(); @@ -1800,59 +1798,59 @@ static void Op3EM0() /**********************************************************************************************/ /* ROR *************************************************************************************** */ -static void Op6AM1() +static void Op6AM1(void) { A_ROR8(); } -static void Op6AM0() +static void Op6AM0(void) { A_ROR16(); } -static void Op66M1() +static void Op66M1(void) { Direct(false); ROR8(); } -static void Op66M0() +static void Op66M0(void) { Direct(false); ROR16(); } -static void Op76M1() +static void Op76M1(void) { DirectIndexedX(false); ROR8(); } -static void Op76M0() +static void Op76M0(void) { DirectIndexedX(false); ROR16(); } -static void Op6EM1() +static void Op6EM1(void) { Absolute(false); ROR8(); } -static void Op6EM0() +static void Op6EM0(void) { Absolute(false); ROR16(); } -static void Op7EM1() +static void Op7EM1(void) { AbsoluteIndexedX(false); ROR8(); } -static void Op7EM0() +static void Op7EM0(void) { AbsoluteIndexedX(false); ROR16(); @@ -1860,181 +1858,181 @@ static void Op7EM0() /**********************************************************************************************/ /* SBC *************************************************************************************** */ -static void OpE9M1() +static void OpE9M1(void) { Immediate8(); SBC8(); } -static void OpE9M0() +static void OpE9M0(void) { Immediate16(); SBC16(); } -static void OpE5M1() +static void OpE5M1(void) { Direct(true); SBC8(); } -static void OpE5M0() +static void OpE5M0(void) { Direct(true); SBC16(); } -static void OpF5M1() +static void OpF5M1(void) { DirectIndexedX(true); SBC8(); } -static void OpF5M0() +static void OpF5M0(void) { DirectIndexedX(true); SBC16(); } -static void OpF2M1() +static void OpF2M1(void) { DirectIndirect(true); SBC8(); } -static void OpF2M0() +static void OpF2M0(void) { DirectIndirect(true); SBC16(); } -static void OpE1M1() +static void OpE1M1(void) { DirectIndexedIndirect(true); SBC8(); } -static void OpE1M0() +static void OpE1M0(void) { DirectIndexedIndirect(true); SBC16(); } -static void OpF1M1() +static void OpF1M1(void) { DirectIndirectIndexed(true); SBC8(); } -static void OpF1M0() +static void OpF1M0(void) { DirectIndirectIndexed(true); SBC16(); } -static void OpE7M1() +static void OpE7M1(void) { DirectIndirectLong(true); SBC8(); } -static void OpE7M0() +static void OpE7M0(void) { DirectIndirectLong(true); SBC16(); } -static void OpF7M1() +static void OpF7M1(void) { DirectIndirectIndexedLong(true); SBC8(); } -static void OpF7M0() +static void OpF7M0(void) { DirectIndirectIndexedLong(true); SBC16(); } -static void OpEDM1() +static void OpEDM1(void) { Absolute(true); SBC8(); } -static void OpEDM0() +static void OpEDM0(void) { Absolute(true); SBC16(); } -static void OpFDM1() +static void OpFDM1(void) { AbsoluteIndexedX(true); SBC8(); } -static void OpFDM0() +static void OpFDM0(void) { AbsoluteIndexedX(true); SBC16(); } -static void OpF9M1() +static void OpF9M1(void) { AbsoluteIndexedY(true); SBC8(); } -static void OpF9M0() +static void OpF9M0(void) { AbsoluteIndexedY(true); SBC16(); } -static void OpEFM1() +static void OpEFM1(void) { AbsoluteLong(true); SBC8(); } -static void OpEFM0() +static void OpEFM0(void) { AbsoluteLong(true); SBC16(); } -static void OpFFM1() +static void OpFFM1(void) { AbsoluteLongIndexedX(true); SBC8(); } -static void OpFFM0() +static void OpFFM0(void) { AbsoluteLongIndexedX(true); SBC16(); } -static void OpE3M1() +static void OpE3M1(void) { StackRelative(true); SBC8(); } -static void OpE3M0() +static void OpE3M0(void) { StackRelative(true); SBC16(); } -static void OpF3M1() +static void OpF3M1(void) { StackRelativeIndirectIndexed(true); SBC8(); } -static void OpF3M0() +static void OpF3M0(void) { StackRelativeIndirectIndexed(true); SBC16(); @@ -2042,177 +2040,177 @@ static void OpF3M0() /**********************************************************************************************/ /* STA *************************************************************************************** */ -static void Op85M1() +static void Op85M1(void) { Direct(false); STA8(); } -static void Op85M0() +static void Op85M0(void) { Direct(false); STA16(); } -static void Op95M1() +static void Op95M1(void) { DirectIndexedX(false); STA8(); } -static void Op95M0() +static void Op95M0(void) { DirectIndexedX(false); STA16(); } -static void Op92M1() +static void Op92M1(void) { DirectIndirect(false); STA8(); } -static void Op92M0() +static void Op92M0(void) { DirectIndirect(false); STA16(); } -static void Op81M1() +static void Op81M1(void) { DirectIndexedIndirect(false); STA8(); -#ifdef noVAR_CYCLES +#ifndef SA1_OPCODES if (CheckIndex()) CPU.Cycles += ONE_CYCLE; #endif } -static void Op81M0() +static void Op81M0(void) { DirectIndexedIndirect(false); STA16(); -#ifdef noVAR_CYCLES +#ifndef SA1_OPCODES if (CheckIndex()) CPU.Cycles += ONE_CYCLE; #endif } -static void Op91M1() +static void Op91M1(void) { DirectIndirectIndexed(false); STA8(); } -static void Op91M0() +static void Op91M0(void) { DirectIndirectIndexed(false); STA16(); } -static void Op87M1() +static void Op87M1(void) { DirectIndirectLong(false); STA8(); } -static void Op87M0() +static void Op87M0(void) { DirectIndirectLong(false); STA16(); } -static void Op97M1() +static void Op97M1(void) { DirectIndirectIndexedLong(false); STA8(); } -static void Op97M0() +static void Op97M0(void) { DirectIndirectIndexedLong(false); STA16(); } -static void Op8DM1() +static void Op8DM1(void) { Absolute(false); STA8(); } -static void Op8DM0() +static void Op8DM0(void) { Absolute(false); STA16(); } -static void Op9DM1() +static void Op9DM1(void) { AbsoluteIndexedX(false); STA8(); } -static void Op9DM0() +static void Op9DM0(void) { AbsoluteIndexedX(false); STA16(); } -static void Op99M1() +static void Op99M1(void) { AbsoluteIndexedY(false); STA8(); } -static void Op99M0() +static void Op99M0(void) { AbsoluteIndexedY(false); STA16(); } -static void Op8FM1() +static void Op8FM1(void) { AbsoluteLong(false); STA8(); } -static void Op8FM0() +static void Op8FM0(void) { AbsoluteLong(false); STA16(); } -static void Op9FM1() +static void Op9FM1(void) { AbsoluteLongIndexedX(false); STA8(); } -static void Op9FM0() +static void Op9FM0(void) { AbsoluteLongIndexedX(false); STA16(); } -static void Op83M1() +static void Op83M1(void) { StackRelative(false); STA8(); } -static void Op83M0() +static void Op83M0(void) { StackRelative(false); STA16(); } -static void Op93M1() +static void Op93M1(void) { StackRelativeIndirectIndexed(false); STA8(); } -static void Op93M0() +static void Op93M0(void) { StackRelativeIndirectIndexed(false); STA16(); @@ -2220,37 +2218,37 @@ static void Op93M0() /**********************************************************************************************/ /* STX *************************************************************************************** */ -static void Op86X1() +static void Op86X1(void) { Direct(false); STX8(); } -static void Op86X0() +static void Op86X0(void) { Direct(false); STX16(); } -static void Op96X1() +static void Op96X1(void) { DirectIndexedY(false); STX8(); } -static void Op96X0() +static void Op96X0(void) { DirectIndexedY(false); STX16(); } -static void Op8EX1() +static void Op8EX1(void) { Absolute(false); STX8(); } -static void Op8EX0() +static void Op8EX0(void) { Absolute(false); STX16(); @@ -2258,37 +2256,37 @@ static void Op8EX0() /**********************************************************************************************/ /* STY *************************************************************************************** */ -static void Op84X1() +static void Op84X1(void) { Direct(false); STY8(); } -static void Op84X0() +static void Op84X0(void) { Direct(false); STY16(); } -static void Op94X1() +static void Op94X1(void) { DirectIndexedX(false); STY8(); } -static void Op94X0() +static void Op94X0(void) { DirectIndexedX(false); STY16(); } -static void Op8CX1() +static void Op8CX1(void) { Absolute(false); STY8(); } -static void Op8CX0() +static void Op8CX0(void) { Absolute(false); STY16(); @@ -2296,49 +2294,49 @@ static void Op8CX0() /**********************************************************************************************/ /* STZ *************************************************************************************** */ -static void Op64M1() +static void Op64M1(void) { Direct(false); STZ8(); } -static void Op64M0() +static void Op64M0(void) { Direct(false); STZ16(); } -static void Op74M1() +static void Op74M1(void) { DirectIndexedX(false); STZ8(); } -static void Op74M0() +static void Op74M0(void) { DirectIndexedX(false); STZ16(); } -static void Op9CM1() +static void Op9CM1(void) { Absolute(false); STZ8(); } -static void Op9CM0() +static void Op9CM0(void) { Absolute(false); STZ16(); } -static void Op9EM1() +static void Op9EM1(void) { AbsoluteIndexedX(false); STZ8(); } -static void Op9EM0() +static void Op9EM0(void) { AbsoluteIndexedX(false); STZ16(); @@ -2347,25 +2345,25 @@ static void Op9EM0() /**********************************************************************************************/ /* TRB *************************************************************************************** */ -static void Op14M1() +static void Op14M1(void) { Direct(false); TRB8(); } -static void Op14M0() +static void Op14M0(void) { Direct(false); TRB16(); } -static void Op1CM1() +static void Op1CM1(void) { Absolute(false); TRB8(); } -static void Op1CM0() +static void Op1CM0(void) { Absolute(false); TRB16(); @@ -2373,25 +2371,25 @@ static void Op1CM0() /**********************************************************************************************/ /* TSB *************************************************************************************** */ -static void Op04M1() +static void Op04M1(void) { Direct(false); TSB8(); } -static void Op04M0() +static void Op04M0(void) { Direct(false); TSB16(); } -static void Op0CM1() +static void Op0CM1(void) { Absolute(false); TSB8(); } -static void Op0CM0() +static void Op0CM0(void) { Absolute(false); TSB16(); @@ -2401,63 +2399,19 @@ static void Op0CM0() /* Branch Instructions *********************************************************************** */ #ifndef SA1_OPCODES -#define BranchCheck0()\ - if(CPU.BranchSkip)\ - {\ - CPU.BranchSkip = false;\ - if (!Settings.SoundSkipMethod)\ - if (CPU.PC - CPU.PCBase > OpAddress)\ - return;\ - } - -#define BranchCheck1()\ - if(CPU.BranchSkip)\ - {\ - CPU.BranchSkip = false;\ - if (!Settings.SoundSkipMethod)\ - {\ - if( CPU.PC - CPU.PCBase > OpAddress)\ - return;\ - }\ - else if (Settings.SoundSkipMethod == 1)\ - return;\ - if (Settings.SoundSkipMethod == 3)\ - {\ - if (CPU.PC - CPU.PCBase > OpAddress)\ - return;\ - else\ - CPU.PC = CPU.PCBase + OpAddress;\ - }\ - } - -#define BranchCheck2()\ - if(CPU.BranchSkip)\ - {\ - CPU.BranchSkip = false;\ - if (!Settings.SoundSkipMethod)\ - {\ - if( CPU.PC - CPU.PCBase > OpAddress)\ - return;\ - }\ - else if (Settings.SoundSkipMethod == 1)\ - CPU.PC = CPU.PCBase + OpAddress;\ - if (Settings.SoundSkipMethod == 3)\ - {\ - if (CPU.PC - CPU.PCBase > OpAddress)\ - return;\ - else\ - CPU.PC = CPU.PCBase + OpAddress;\ - }\ +#define BranchCheck() \ + if(CPU.BranchSkip) \ + { \ + CPU.BranchSkip = false; \ + if (CPU.PC - CPU.PCBase > OpAddress)\ + return; \ } #else -#define BranchCheck0() -#define BranchCheck1() -#define BranchCheck2() +#define BranchCheck() #endif -#ifdef CPU_SHUTDOWN #ifndef SA1_OPCODES -static inline void CPUShutdown() +static inline void CPUShutdown(void) { if (Settings.Shutdown && CPU.PC == CPU.WaitAddress) { @@ -2490,7 +2444,7 @@ static inline void CPUShutdown() } } #else -static inline void CPUShutdown() +static inline void CPUShutdown(void) { if (Settings.Shutdown && CPU.PC == CPU.WaitAddress) { @@ -2504,15 +2458,11 @@ static inline void CPUShutdown() } } #endif -#else -#define CPUShutdown() -#endif // From the speed-hacks branch of CatSFC -static inline void ForceShutdown() +static inline void ForceShutdown(void) { -#ifdef CPU_SHUTDOWN -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.WaitAddress = NULL; #ifndef USE_BLARGG_APU CPU.Cycles = CPU.NextEvent; @@ -2531,14 +2481,13 @@ static inline void ForceShutdown() SA1.Executing = false; SA1.CPUExecuting = false; #endif -#endif } /* BCC */ -static void Op90() +static void Op90(void) { Relative(); - BranchCheck0(); + BranchCheck(); if (!CheckCarry()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2550,10 +2499,10 @@ static void Op90() } /* BCS */ -static void OpB0() +static void OpB0(void) { Relative(); - BranchCheck0(); + BranchCheck(); if (CheckCarry()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2565,10 +2514,10 @@ static void OpB0() } /* BEQ */ -static void OpF0() +static void OpF0(void) { Relative(); - BranchCheck2(); + BranchCheck(); if (CheckZero()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2580,10 +2529,10 @@ static void OpF0() } /* BMI */ -static void Op30() +static void Op30(void) { Relative(); - BranchCheck1(); + BranchCheck(); if (CheckNegative()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2595,10 +2544,10 @@ static void Op30() } /* BNE */ -static void OpD0() +static void OpD0(void) { Relative(); - BranchCheck1(); + BranchCheck(); if (!CheckZero()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2610,10 +2559,10 @@ static void OpD0() } /* BPL */ -static void Op10() +static void Op10(void) { Relative(); - BranchCheck1(); + BranchCheck(); if (!CheckNegative()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2625,7 +2574,7 @@ static void Op10() } /* BRA */ -static void Op80() +static void Op80(void) { Relative(); CPU.PC = CPU.PCBase + OpAddress; @@ -2636,10 +2585,10 @@ static void Op80() } /* BVC */ -static void Op50() +static void Op50(void) { Relative(); - BranchCheck0(); + BranchCheck(); if (!CheckOverflow()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2651,10 +2600,10 @@ static void Op50() } /* BVS */ -static void Op70() +static void Op70(void) { Relative(); - BranchCheck0(); + BranchCheck(); if (CheckOverflow()) { CPU.PC = CPU.PCBase + OpAddress; @@ -2668,7 +2617,7 @@ static void Op70() /* ClearFlag Instructions ******************************************************************** */ /* CLC */ -static void Op18() +static void Op18(void) { ClearCarry(); #ifndef SA1_OPCODES @@ -2677,7 +2626,7 @@ static void Op18() } /* CLD */ -static void OpD8() +static void OpD8(void) { ClearDecimal(); #ifndef SA1_OPCODES @@ -2686,7 +2635,7 @@ static void OpD8() } /* CLI */ -static void Op58() +static void Op58(void) { ClearIRQ(); #ifndef SA1_OPCODES @@ -2696,7 +2645,7 @@ static void Op58() } /* CLV */ -static void OpB8() +static void OpB8(void) { ClearOverflow(); #ifndef SA1_OPCODES @@ -2706,100 +2655,84 @@ static void OpB8() /**********************************************************************************************/ /* DEX/DEY *********************************************************************************** */ -static void OpCAX1() +static void OpCAX1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.XL--; SetZN8(ICPU.Registers.XL); } -static void OpCAX0() +static void OpCAX0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.X.W--; SetZN16(ICPU.Registers.X.W); } -static void Op88X1() +static void Op88X1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.YL--; SetZN8(ICPU.Registers.YL); } -static void Op88X0() +static void Op88X0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.Y.W--; SetZN16(ICPU.Registers.Y.W); } /**********************************************************************************************/ /* INX/INY *********************************************************************************** */ -static void OpE8X1() +static void OpE8X1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.XL++; SetZN8(ICPU.Registers.XL); } -static void OpE8X0() +static void OpE8X0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.X.W++; SetZN16(ICPU.Registers.X.W); } -static void OpC8X1() +static void OpC8X1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.YL++; SetZN8(ICPU.Registers.YL); } -static void OpC8X0() +static void OpC8X0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif -#ifdef CPU_SHUTDOWN CPU.WaitAddress = NULL; -#endif ICPU.Registers.Y.W++; SetZN16(ICPU.Registers.Y.W); } @@ -2807,7 +2740,7 @@ static void OpC8X0() /**********************************************************************************************/ /* NOP *************************************************************************************** */ -static void OpEA() +static void OpEA(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -2833,46 +2766,46 @@ static void OpEA() ICPU.Registers.SH = 0x01; //PEA NL -static void OpF4E1() +static void OpF4E1(void) { Absolute(false); PushWE((uint16_t)OpAddress); } -static void OpF4() +static void OpF4(void) { Absolute(false); PushW((uint16_t)OpAddress); } //PEI NL -static void OpD4E1() +static void OpD4E1(void) { DirectIndirect(false); PushWE((uint16_t)OpAddress); } -static void OpD4() +static void OpD4(void) { DirectIndirect(false); PushW((uint16_t)OpAddress); } //PER NL -static void Op62E1() +static void Op62E1(void) { RelativeLong(false); PushWE((uint16_t)OpAddress); } -static void Op62() +static void Op62(void) { RelativeLong(false); PushW((uint16_t)OpAddress); } //PHA -static void Op48E1() +static void Op48E1(void) { PushBE(ICPU.Registers.AL); #ifndef SA1_OPCODES @@ -2880,7 +2813,7 @@ static void Op48E1() #endif } -static void Op48M1() +static void Op48M1(void) { PushB(ICPU.Registers.AL); #ifndef SA1_OPCODES @@ -2888,7 +2821,7 @@ static void Op48M1() #endif } -static void Op48M0() +static void Op48M0(void) { PushW(ICPU.Registers.A.W); #ifndef SA1_OPCODES @@ -2897,7 +2830,7 @@ static void Op48M0() } //PHB -static void Op8BE1() +static void Op8BE1(void) { PushBE(ICPU.Registers.DB); #ifndef SA1_OPCODES @@ -2905,7 +2838,7 @@ static void Op8BE1() #endif } -static void Op8B() +static void Op8B(void) { PushB(ICPU.Registers.DB); #ifndef SA1_OPCODES @@ -2914,7 +2847,7 @@ static void Op8B() } //PHD NL -static void Op0BE1() +static void Op0BE1(void) { PushWE(ICPU.Registers.D.W); #ifndef SA1_OPCODES @@ -2922,7 +2855,7 @@ static void Op0BE1() #endif } -static void Op0B() +static void Op0B(void) { PushW(ICPU.Registers.D.W); #ifndef SA1_OPCODES @@ -2931,7 +2864,7 @@ static void Op0B() } //PHK -static void Op4BE1() +static void Op4BE1(void) { PushBE(ICPU.Registers.PB); #ifndef SA1_OPCODES @@ -2939,7 +2872,7 @@ static void Op4BE1() #endif } -static void Op4B() +static void Op4B(void) { PushB(ICPU.Registers.PB); #ifndef SA1_OPCODES @@ -2948,7 +2881,7 @@ static void Op4B() } //PHP -static void Op08E1() +static void Op08E1(void) { S9xPackStatus(); PushBE(ICPU.Registers.PL); @@ -2957,7 +2890,7 @@ static void Op08E1() #endif } -static void Op08() +static void Op08(void) { S9xPackStatus(); PushB(ICPU.Registers.PL); @@ -2967,7 +2900,7 @@ static void Op08() } //PHX -static void OpDAE1() +static void OpDAE1(void) { PushBE(ICPU.Registers.XL); #ifndef SA1_OPCODES @@ -2975,7 +2908,7 @@ static void OpDAE1() #endif } -static void OpDAX1() +static void OpDAX1(void) { PushB(ICPU.Registers.XL); #ifndef SA1_OPCODES @@ -2983,7 +2916,7 @@ static void OpDAX1() #endif } -static void OpDAX0() +static void OpDAX0(void) { PushW(ICPU.Registers.X.W); #ifndef SA1_OPCODES @@ -2992,7 +2925,7 @@ static void OpDAX0() } //PHY -static void Op5AE1() +static void Op5AE1(void) { PushBE(ICPU.Registers.YL); #ifndef SA1_OPCODES @@ -3000,7 +2933,7 @@ static void Op5AE1() #endif } -static void Op5AX1() +static void Op5AX1(void) { PushB(ICPU.Registers.YL); #ifndef SA1_OPCODES @@ -3008,7 +2941,7 @@ static void Op5AX1() #endif } -static void Op5AX0() +static void Op5AX0(void) { PushW(ICPU.Registers.Y.W); #ifndef SA1_OPCODES @@ -3034,7 +2967,7 @@ static void Op5AX0() ICPU.Registers.SH = 0x01; //PLA -static void Op68E1() +static void Op68E1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3043,7 +2976,7 @@ static void Op68E1() SetZN8(ICPU.Registers.AL); } -static void Op68M1() +static void Op68M1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3052,7 +2985,7 @@ static void Op68M1() SetZN8(ICPU.Registers.AL); } -static void Op68M0() +static void Op68M0(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3062,7 +2995,7 @@ static void Op68M0() } //PLB -static void OpABE1() +static void OpABE1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3072,7 +3005,7 @@ static void OpABE1() ICPU.ShiftedDB = ICPU.Registers.DB << 16; } -static void OpAB() +static void OpAB(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3084,7 +3017,7 @@ static void OpAB() /* PHP */ //PLD NL -static void Op2BE1() +static void Op2BE1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3093,7 +3026,7 @@ static void Op2BE1() SetZN16(ICPU.Registers.D.W); } -static void Op2B() +static void Op2B(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3103,7 +3036,7 @@ static void Op2B() } /* PLP */ -static void Op28E1() +static void Op28E1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3119,7 +3052,7 @@ static void Op28E1() S9xFixCycles(); } -static void Op28() +static void Op28(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3136,7 +3069,7 @@ static void Op28() } //PLX -static void OpFAE1() +static void OpFAE1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3145,7 +3078,7 @@ static void OpFAE1() SetZN8(ICPU.Registers.XL); } -static void OpFAX1() +static void OpFAX1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3154,7 +3087,7 @@ static void OpFAX1() SetZN8(ICPU.Registers.XL); } -static void OpFAX0() +static void OpFAX0(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3164,7 +3097,7 @@ static void OpFAX0() } //PLY -static void Op7AE1() +static void Op7AE1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3173,7 +3106,7 @@ static void Op7AE1() SetZN8(ICPU.Registers.YL); } -static void Op7AX1() +static void Op7AX1(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3182,7 +3115,7 @@ static void Op7AX1() SetZN8(ICPU.Registers.YL); } -static void Op7AX0() +static void Op7AX0(void) { #ifndef SA1_OPCODES CPU.Cycles += TWO_CYCLES; @@ -3195,7 +3128,7 @@ static void Op7AX0() /* SetFlag Instructions ********************************************************************** */ /* SEC */ -static void Op38() +static void Op38(void) { SetCarry(); #ifndef SA1_OPCODES @@ -3204,17 +3137,16 @@ static void Op38() } /* SED */ -static void OpF8() +static void OpF8(void) { SetDecimal(); #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #endif - missing.decimal_mode = 1; } /* SEI */ -static void Op78() +static void Op78(void) { SetIRQ(); #ifndef SA1_OPCODES @@ -3225,7 +3157,7 @@ static void Op78() /* Transfer Instructions ********************************************************************* */ /* TAX8 */ -static void OpAAX1() +static void OpAAX1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3235,7 +3167,7 @@ static void OpAAX1() } /* TAX16 */ -static void OpAAX0() +static void OpAAX0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3245,7 +3177,7 @@ static void OpAAX0() } /* TAY8 */ -static void OpA8X1() +static void OpA8X1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3255,7 +3187,7 @@ static void OpA8X1() } /* TAY16 */ -static void OpA8X0() +static void OpA8X0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3264,7 +3196,7 @@ static void OpA8X0() SetZN16(ICPU.Registers.Y.W); } -static void Op5B() +static void Op5B(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3273,7 +3205,7 @@ static void Op5B() SetZN16(ICPU.Registers.D.W); } -static void Op1B() +static void Op1B(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3283,7 +3215,7 @@ static void Op1B() ICPU.Registers.SH = 1; } -static void Op7B() +static void Op7B(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3292,7 +3224,7 @@ static void Op7B() SetZN16(ICPU.Registers.A.W); } -static void Op3B() +static void Op3B(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3301,7 +3233,7 @@ static void Op3B() SetZN16(ICPU.Registers.A.W); } -static void OpBAX1() +static void OpBAX1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3310,7 +3242,7 @@ static void OpBAX1() SetZN8(ICPU.Registers.XL); } -static void OpBAX0() +static void OpBAX0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3319,7 +3251,7 @@ static void OpBAX0() SetZN16(ICPU.Registers.X.W); } -static void Op8AM1() +static void Op8AM1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3328,7 +3260,7 @@ static void Op8AM1() SetZN8(ICPU.Registers.AL); } -static void Op8AM0() +static void Op8AM0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3337,7 +3269,7 @@ static void Op8AM0() SetZN16(ICPU.Registers.A.W); } -static void Op9A() +static void Op9A(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3347,7 +3279,7 @@ static void Op9A() ICPU.Registers.SH = 1; } -static void Op9BX1() +static void Op9BX1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3356,7 +3288,7 @@ static void Op9BX1() SetZN8(ICPU.Registers.YL); } -static void Op9BX0() +static void Op9BX0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3365,7 +3297,7 @@ static void Op9BX0() SetZN16(ICPU.Registers.Y.W); } -static void Op98M1() +static void Op98M1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3374,7 +3306,7 @@ static void Op98M1() SetZN8(ICPU.Registers.AL); } -static void Op98M0() +static void Op98M0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3383,7 +3315,7 @@ static void Op98M0() SetZN16(ICPU.Registers.A.W); } -static void OpBBX1() +static void OpBBX1(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3392,7 +3324,7 @@ static void OpBBX1() SetZN8(ICPU.Registers.XL); } -static void OpBBX0() +static void OpBBX0(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3404,7 +3336,7 @@ static void OpBBX0() /**********************************************************************************************/ /* XCE *************************************************************************************** */ -static void OpFB() +static void OpFB(void) { #ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; @@ -3418,7 +3350,6 @@ static void OpFB() { SetFlags(MemoryFlag | IndexFlag); ICPU.Registers.SH = 1; - missing.emulate6502 = 1; } if (CheckIndex()) { @@ -3430,11 +3361,8 @@ static void OpFB() /**********************************************************************************************/ /* BRK *************************************************************************************** */ -static void Op00() +static void Op00(void) { -#ifndef SA1_OPCODES - CPU.BRKTriggered = true; -#endif if (!CheckEmulation()) { PushB(ICPU.Registers.PB); @@ -3472,7 +3400,7 @@ static void Op00() /**********************************************************************************************/ /* BRL ************************************************************************************** */ -static void Op82() +static void Op82(void) { RelativeLong(); S9xSetPCBase(ICPU.ShiftedPB + OpAddress); @@ -3480,7 +3408,7 @@ static void Op82() /**********************************************************************************************/ /* IRQ *************************************************************************************** */ -void S9xOpcode_IRQ() +void S9xOpcode_IRQ(void) { if (!CheckEmulation()) { @@ -3538,7 +3466,7 @@ void S9xOpcode_IRQ() /**********************************************************************************************/ /* NMI *************************************************************************************** */ -void S9xOpcode_NMI() +void S9xOpcode_NMI(void) { if (!CheckEmulation()) { @@ -3595,7 +3523,7 @@ void S9xOpcode_NMI() /**********************************************************************************************/ /* COP *************************************************************************************** */ -static void Op02() +static void Op02(void) { if (!CheckEmulation()) { @@ -3634,7 +3562,7 @@ static void Op02() /**********************************************************************************************/ /* JML *************************************************************************************** */ -static void OpDC() +static void OpDC(void) { AbsoluteIndirectLong(false); ICPU.Registers.PB = (uint8_t)(OpAddress >> 16); @@ -3645,7 +3573,7 @@ static void OpDC() #endif } -static void Op5C() +static void Op5C(void) { AbsoluteLong(false); ICPU.Registers.PB = (uint8_t)(OpAddress >> 16); @@ -3655,22 +3583,22 @@ static void Op5C() /**********************************************************************************************/ /* JMP *************************************************************************************** */ -static void Op4C() +static void Op4C(void) { Absolute(false); S9xSetPCBase(ICPU.ShiftedPB + (OpAddress & 0xffff)); -#if defined(CPU_SHUTDOWN) && defined(SA1_OPCODES) +#ifdef SA1_OPCODES CPUShutdown(); #endif } -static void Op6C() +static void Op6C(void) { AbsoluteIndirect(false); S9xSetPCBase(ICPU.ShiftedPB + (OpAddress & 0xffff)); } -static void Op7C() +static void Op7C(void) { AbsoluteIndexedIndirect(false); S9xSetPCBase(ICPU.ShiftedPB + OpAddress); @@ -3681,7 +3609,7 @@ static void Op7C() /**********************************************************************************************/ /* JSL/RTL *********************************************************************************** */ -static void Op22E1() +static void Op22E1(void) { AbsoluteLong(false); PushB(ICPU.Registers.PB); @@ -3691,7 +3619,7 @@ static void Op22E1() S9xSetPCBase(OpAddress); } -static void Op22() +static void Op22(void) { AbsoluteLong(false); PushB(ICPU.Registers.PB); @@ -3701,7 +3629,7 @@ static void Op22() S9xSetPCBase(OpAddress); } -static void Op6BE1() +static void Op6BE1(void) { PullWE(ICPU.Registers.PC); PullB(ICPU.Registers.PB); @@ -3712,7 +3640,7 @@ static void Op6BE1() #endif } -static void Op6B() +static void Op6B(void) { PullW(ICPU.Registers.PC); PullB(ICPU.Registers.PB); @@ -3725,7 +3653,7 @@ static void Op6B() /**********************************************************************************************/ /* JSR/RTS *********************************************************************************** */ -static void Op20() +static void Op20(void) { Absolute(false); PushW(CPU.PC - CPU.PCBase - 1); @@ -3736,7 +3664,7 @@ static void Op20() } //JSR a,x -static void OpFCE1() +static void OpFCE1(void) { AbsoluteIndexedIndirect(false); PushWE(CPU.PC - CPU.PCBase - 1); @@ -3746,7 +3674,7 @@ static void OpFCE1() #endif } -static void OpFC() +static void OpFC(void) { AbsoluteIndexedIndirect(false); PushW(CPU.PC - CPU.PCBase - 1); @@ -3756,7 +3684,7 @@ static void OpFC() #endif } -static void Op60() +static void Op60(void) { PullW(ICPU.Registers.PC); S9xSetPCBase(ICPU.ShiftedPB + ((ICPU.Registers.PC + 1) & 0xffff)); @@ -3768,7 +3696,7 @@ static void Op60() /**********************************************************************************************/ /* MVN/MVP *********************************************************************************** */ -static void Op54X1() +static void Op54X1(void) { #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; @@ -3787,7 +3715,7 @@ static void Op54X1() CPU.PC -= 3; } -static void Op54X0() +static void Op54X0(void) { #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; @@ -3806,7 +3734,7 @@ static void Op54X0() CPU.PC -= 3; } -static void Op44X1() +static void Op44X1(void) { #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; @@ -3823,7 +3751,7 @@ static void Op44X1() CPU.PC -= 3; } -static void Op44X0() +static void Op44X0(void) { #ifndef SA1_OPCODES CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES; @@ -3843,7 +3771,7 @@ static void Op44X0() /**********************************************************************************************/ /* REP/SEP *********************************************************************************** */ -static void OpC2() +static void OpC2(void) { uint8_t Work8 = ~*CPU.PC++; ICPU.Registers.PL &= Work8; @@ -3856,10 +3784,7 @@ static void OpC2() CPU.Cycles += CPU.MemSpeed + ONE_CYCLE; #endif if (CheckEmulation()) - { SetFlags(MemoryFlag | IndexFlag); - missing.emulate6502 = 1; - } if (CheckIndex()) { ICPU.Registers.XH = 0; @@ -3868,7 +3793,7 @@ static void OpC2() S9xFixCycles(); } -static void OpE2() +static void OpE2(void) { uint8_t Work8 = *CPU.PC++; ICPU.Registers.PL |= Work8; @@ -3881,10 +3806,7 @@ static void OpE2() CPU.Cycles += CPU.MemSpeed + ONE_CYCLE; #endif if (CheckEmulation()) - { SetFlags(MemoryFlag | IndexFlag); - missing.emulate6502 = 1; - } if (CheckIndex()) { ICPU.Registers.XH = 0; @@ -3895,7 +3817,7 @@ static void OpE2() /**********************************************************************************************/ /* XBA *************************************************************************************** */ -static void OpEB() +static void OpEB(void) { uint8_t Work8 = ICPU.Registers.AL; ICPU.Registers.AL = ICPU.Registers.AH; @@ -3908,7 +3830,7 @@ static void OpEB() /**********************************************************************************************/ /* RTI *************************************************************************************** */ -static void Op40() +static void Op40(void) { PullB(ICPU.Registers.PL); S9xUnpackStatus(); @@ -3919,10 +3841,7 @@ static void Op40() ICPU.ShiftedPB = ICPU.Registers.PB << 16; } else - { SetFlags(MemoryFlag | IndexFlag); - missing.emulate6502 = 1; - } S9xSetPCBase(ICPU.ShiftedPB + ICPU.Registers.PC); if (CheckIndex()) { @@ -3939,7 +3858,7 @@ static void Op40() /* STP/WAI/DB ******************************************************************************** */ // WAI -static void OpCB() +static void OpCB(void) { #ifdef SA1_OPCODES SA1.WaitingForInterrupt = true; @@ -3947,7 +3866,6 @@ static void OpCB() #else // SA_OPCODES CPU.WaitingForInterrupt = true; CPU.PC--; -#ifdef CPU_SHUTDOWN if (Settings.Shutdown) { CPU.Cycles = CPU.NextEvent; @@ -3965,14 +3883,13 @@ static void OpCB() #endif } #endif -#endif } // Usually an STP opcode // SNESAdvance speed hack, not implemented in Snes9xTYL | Snes9x-Euphoria (from the speed-hacks branch of CatSFC) -static void OpDB() +static void OpDB(void) { -#if !defined NO_SPEEDHACKS && defined CPU_SHUTDOWN +#ifndef NO_SPEEDHACKS uint8_t NextByte = *CPU.PC++; ForceShutdown(); @@ -3984,11 +3901,11 @@ static void OpDB() switch (NextByte & 0x80) { case 0x00: // BNE - BranchCheck1 (); + BranchCheck(); if (!CheckZero ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -3999,11 +3916,11 @@ static void OpDB() } return; case 0x80: // BEQ - BranchCheck2 (); + BranchCheck(); if (CheckZero ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4021,9 +3938,9 @@ static void OpDB() } // SNESAdvance speed hack, as implemented in Snes9xTYL / Snes9x-Euphoria (from the speed-hacks branch of CatSFC) -static void Op42() +static void Op42(void) { -#if !defined NO_SPEEDHACKS && defined CPU_SHUTDOWN +#ifndef NO_SPEEDHACKS uint8_t NextByte = *CPU.PC++; ForceShutdown(); @@ -4034,11 +3951,11 @@ static void Op42() switch (NextByte & 0xF0) { case 0x10: // BPL - BranchCheck1 (); + BranchCheck(); if (!CheckNegative ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4049,11 +3966,11 @@ static void Op42() } return; case 0x30: // BMI - BranchCheck1 (); + BranchCheck(); if (CheckNegative ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4064,11 +3981,11 @@ static void Op42() } return; case 0x50: // BVC - BranchCheck0 (); + BranchCheck(); if (!CheckOverflow ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4079,11 +3996,11 @@ static void Op42() } return; case 0x70: // BVS - BranchCheck0 (); + BranchCheck(); if (CheckOverflow ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4095,7 +4012,7 @@ static void Op42() return; case 0x80: // BRA CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4105,11 +4022,11 @@ static void Op42() CPUShutdown (); return; case 0x90: // BCC - BranchCheck0 (); + BranchCheck(); if (!CheckCarry ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4120,11 +4037,11 @@ static void Op42() } return; case 0xB0: // BCS - BranchCheck0 (); + BranchCheck(); if (CheckCarry ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4135,11 +4052,11 @@ static void Op42() } return; case 0xD0: // BNE - BranchCheck1 (); + BranchCheck(); if (!CheckZero ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES @@ -4150,11 +4067,11 @@ static void Op42() } return; case 0xF0: // BEQ - BranchCheck2 (); + BranchCheck(); if (CheckZero ()) { CPU.PC = CPU.PCBase + OpAddress; -#ifdef VAR_CYCLES +#ifndef SA1_OPCODES CPU.Cycles += ONE_CYCLE; #else #ifndef SA1_OPCODES diff --git a/source/display.h b/source/display.h index 44e0900..e7732bc 100644 --- a/source/display.h +++ b/source/display.h @@ -8,12 +8,10 @@ uint32_t S9xReadJoypad(int32_t port); bool S9xReadMousePosition(int32_t which1_0_to_1, int32_t* x, int32_t* y, uint32_t* buttons); bool S9xReadSuperScopePosition(int32_t* x, int32_t* y, uint32_t* buttons); -void S9xInitDisplay(); -void S9xDeinitDisplay(); +void S9xInitDisplay(void); +void S9xDeinitDisplay(void); void S9xToggleSoundChannel(int32_t channel); -void S9xSetInfoString(const char* string); -void S9xNextController(); -bool S9xLoadROMImage(const char* string); +void S9xNextController(void); const char* S9xGetFilename(const char* extension); diff --git a/source/dma.c b/source/dma.c index e943975..399d956 100644 --- a/source/dma.c +++ b/source/dma.c @@ -1,41 +1,25 @@ #include "../copyright" -#ifdef HAVE_CONFIG_H -#include <config.h> -#endif - #include "snes9x.h" - #include "memmap.h" #include "ppu.h" #include "cpuexec.h" -#include "missing.h" #include "dma.h" #include "apu.h" #include "sa1.h" #include "spc7110.h" - -#ifdef SDD1_DECOMP #include "sdd1emu.h" -#endif -#ifdef SDD1_DECOMP static uint8_t sdd1_decode_buffer[0x10000]; -#endif extern int32_t HDMA_ModeByteCounts [8]; extern uint8_t* HDMAMemPointers [8]; extern uint8_t* HDMABasePointers [8]; -#ifdef SETA010_HDMA_FROM_CART -uint32_t HDMARawPointers[8]; // Cart address space pointer -#endif - /**********************************************************************************************/ /* S9xDoDMA() */ /* This function preforms the general dma transfer */ /**********************************************************************************************/ - void S9xDoDMA(uint8_t Channel) { uint8_t Work; @@ -50,7 +34,6 @@ void S9xDoDMA(uint8_t Channel) bool s7_wrap = false; SDMA* d = &DMA[Channel]; - int32_t count = d->TransferBytes; // Prepare for custom chip DMA @@ -76,8 +59,6 @@ void S9xDoDMA(uint8_t Channel) FLUSH_REDRAW(); break; } - // S-DD1 -#ifdef SDD1_DECOMP if (Settings.SDD1) { if (d->AAddressFixed && Memory.FillRAM [0x4801] > 0) @@ -97,7 +78,6 @@ void S9xDoDMA(uint8_t Channel) Memory.FillRAM [0x4801] = 0; } -#endif if (Settings.SPC7110 && (d->AAddress == 0x4800 || d->ABank == 0x50)) { uint32_t i; @@ -519,7 +499,6 @@ void S9xDoDMA(uint8_t Channel) d->AAddress += inc; --count; break; - case 1: case 5: Work = S9xGetPPU(0x2100 + d->BAddress); @@ -533,7 +512,6 @@ void S9xDoDMA(uint8_t Channel) d->AAddress += inc; count--; break; - case 3: case 7: Work = S9xGetPPU(0x2100 + d->BAddress); @@ -593,15 +571,13 @@ void S9xDoDMA(uint8_t Channel) while (count); } #ifndef USE_BLARGG_APU -#ifdef SPC700_C IAPU.APUExecuting = Settings.APUEnabled; APU_EXECUTE(); #endif -#endif if (Settings.SuperFX) while (CPU.Cycles > CPU.NextEvent) S9xDoHBlankProcessing_SFX(); - else /* if (!Settings.SuperFX) */ + else while (CPU.Cycles > CPU.NextEvent) S9xDoHBlankProcessing_NoSFX(); @@ -633,20 +609,18 @@ void S9xStartHDMA() if (Settings.DisableHDMA) IPPU.HDMA = 0; else - missing.hdma_this_frame = IPPU.HDMA = Memory.FillRAM [0x420c]; + IPPU.HDMA = Memory.FillRAM [0x420c]; //per anomie timing post if (IPPU.HDMA != 0) CPU.Cycles += ONE_CYCLE * 3; - IPPU.HDMAStarted = true; - uint8_t i; for (i = 0; i < 8; i++) { if (IPPU.HDMA & (1 << i)) { - CPU.Cycles += SLOW_ONE_CYCLE ; + CPU.Cycles += SLOW_ONE_CYCLE; DMA [i].LineCount = 0; DMA [i].FirstLine = true; DMA [i].Address = DMA [i].AAddress; @@ -654,9 +628,6 @@ void S9xStartHDMA() CPU.Cycles += (SLOW_ONE_CYCLE << 2); } HDMAMemPointers [i] = NULL; -#ifdef SETA010_HDMA_FROM_CART - HDMARawPointers [i] = 0; -#endif } } @@ -694,11 +665,7 @@ uint8_t S9xDoHDMA(uint8_t byte) /* XXX: instead of p->BAddress == 0x18, make S9xSetPPU fail * XXX: writes to $2118/9 when appropriate */ -#ifdef SETA010_HDMA_FROM_CART - if (!p->LineCount) -#else if (!p->LineCount || p->BAddress == 0x18) -#endif { byte &= ~mask; p->IndirectAddress += HDMAMemPointers [d] - HDMABasePointers [d]; @@ -708,7 +675,7 @@ uint8_t S9xDoHDMA(uint8_t byte) } p->Address++; - p->FirstLine = 1; + p->FirstLine = true; if (p->HDMAIndirectAddressing) { p->IndirectBank = Memory.FillRAM [0x4307 + (d << 4)]; @@ -722,11 +689,7 @@ uint8_t S9xDoHDMA(uint8_t byte) p->IndirectBank = p->ABank; p->IndirectAddress = p->Address; } - HDMABasePointers [d] = HDMAMemPointers [d] = - S9xGetMemPointer((p->IndirectBank << 16) + p->IndirectAddress); -#ifdef SETA010_HDMA_FROM_CART - HDMARawPointers [d] = (p->IndirectBank << 16) + p->IndirectAddress; -#endif + HDMABasePointers [d] = HDMAMemPointers [d] = S9xGetMemPointer((p->IndirectBank << 16) + p->IndirectAddress); } else CPU.Cycles += SLOW_ONE_CYCLE; @@ -738,9 +701,7 @@ uint8_t S9xDoHDMA(uint8_t byte) p->IndirectBank = p->ABank; p->IndirectAddress = p->Address; } -#ifdef SETA010_HDMA_FROM_CART - HDMARawPointers [d] = (p->IndirectBank << 16) + p->IndirectAddress; -#endif + if (!(HDMABasePointers [d] = HDMAMemPointers [d] = S9xGetMemPointer((p->IndirectBank << 16) + p->IndirectAddress))) { @@ -763,88 +724,49 @@ uint8_t S9xDoHDMA(uint8_t byte) { case 0: CPU.Cycles += SLOW_ONE_CYCLE; -#ifdef SETA010_HDMA_FROM_CART - S9xSetPPU(S9xGetByte(HDMARawPointers [d]++), 0x2100 + p->BAddress); - HDMAMemPointers [d]++; -#else S9xSetPPU(*HDMAMemPointers [d]++, 0x2100 + p->BAddress); -#endif break; case 5: CPU.Cycles += 2 * SLOW_ONE_CYCLE; -#ifdef SETA010_HDMA_FROM_CART - S9xSetPPU(S9xGetByte(HDMARawPointers [d]), 0x2100 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 1), 0x2101 + p->BAddress); - HDMARawPointers [d] += 2; -#else S9xSetPPU(*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 1), 0x2101 + p->BAddress); -#endif HDMAMemPointers [d] += 2; /* fall through */ case 1: CPU.Cycles += 2 * SLOW_ONE_CYCLE; -#ifdef SETA010_HDMA_FROM_CART - S9xSetPPU(S9xGetByte(HDMARawPointers [d]), 0x2100 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 1), 0x2101 + p->BAddress); - HDMARawPointers [d] += 2; -#else S9xSetPPU(*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 1), 0x2101 + p->BAddress); -#endif HDMAMemPointers [d] += 2; break; case 2: case 6: CPU.Cycles += 2 * SLOW_ONE_CYCLE; -#ifdef SETA010_HDMA_FROM_CART - S9xSetPPU(S9xGetByte(HDMARawPointers [d]), 0x2100 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 1), 0x2100 + p->BAddress); - HDMARawPointers [d] += 2; -#else S9xSetPPU(*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 1), 0x2100 + p->BAddress); -#endif HDMAMemPointers [d] += 2; break; case 3: case 7: CPU.Cycles += 4 * SLOW_ONE_CYCLE; -#ifdef SETA010_HDMA_FROM_CART - S9xSetPPU(S9xGetByte(HDMARawPointers [d]), 0x2100 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 1), 0x2100 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 2), 0x2101 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 3), 0x2101 + p->BAddress); - HDMARawPointers [d] += 4; -#else S9xSetPPU(*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 1), 0x2100 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 2), 0x2101 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 3), 0x2101 + p->BAddress); -#endif HDMAMemPointers [d] += 4; break; case 4: CPU.Cycles += 4 * SLOW_ONE_CYCLE; -#ifdef SETA010_HDMA_FROM_CART - S9xSetPPU(S9xGetByte(HDMARawPointers [d]), 0x2100 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 1), 0x2101 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 2), 0x2102 + p->BAddress); - S9xSetPPU(S9xGetByte(HDMARawPointers [d] + 3), 0x2103 + p->BAddress); - HDMARawPointers [d] += 4; -#else S9xSetPPU(*(HDMAMemPointers [d] + 0), 0x2100 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 1), 0x2101 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 2), 0x2102 + p->BAddress); S9xSetPPU(*(HDMAMemPointers [d] + 3), 0x2103 + p->BAddress); -#endif HDMAMemPointers [d] += 4; break; } if (!p->HDMAIndirectAddressing) p->Address += HDMA_ModeByteCounts [p->TransferMode]; p->IndirectAddress += HDMA_ModeByteCounts [p->TransferMode]; - /* XXX: Check for p->IndirectAddress crossing a mapping boundry, + /* XXX: Check for p->IndirectAddress crossing a mapping boundary, * XXX: and invalidate HDMAMemPointers[d] */ p->FirstLine = false; @@ -852,7 +774,7 @@ uint8_t S9xDoHDMA(uint8_t byte) } } CPU.InDMA = false; - return (byte); + return byte; } void S9xResetDMA() diff --git a/source/dma.h b/source/dma.h index 7782ee2..c2ab8d2 100644 --- a/source/dma.h +++ b/source/dma.h @@ -3,9 +3,9 @@ #ifndef _DMA_H_ #define _DMA_H_ -void S9xResetDMA(); +void S9xResetDMA(void); uint8_t S9xDoHDMA(uint8_t); -void S9xStartHDMA(); +void S9xStartHDMA(void); void S9xDoDMA(uint8_t); #endif diff --git a/source/dsp1.c b/source/dsp1.c index 9e7f05b..2166e87 100644 --- a/source/dsp1.c +++ b/source/dsp1.c @@ -2,10 +2,7 @@ #include "snes9x.h" #include "dsp1.h" -#include "missing.h" #include "memmap.h" -#include <math.h> - #include "dsp1emu.c" #include "dsp2emu.c" @@ -124,9 +121,9 @@ void DSP1SetByte(uint8_t byte, uint16_t address) case 0x32: DSP1.in_count = 7; break; - case 0x3a: - case 0x2a: case 0x1a: + case 0x2a: + case 0x3a: DSP1.command = 0x1a; DSP1.in_count = 1; break; @@ -786,7 +783,7 @@ typedef struct uint32_t out_count; uint32_t out_index; uint8_t parameters [512]; - uint8_t output [512]; + uint8_t output [512]; } SDSP4; SDSP4 DSP4; @@ -826,38 +823,36 @@ void DSP4SetByte(uint8_t byte, uint16_t address) switch (DSP4.command) { - case 0x0000: - DSP4.in_count = 4; - break; - case 0x0001: - DSP4.in_count = 36; - break; case 0x0003: case 0x0005: case 0x0006: + case 0x000E: DSP4.in_count = 0; break; - case 0x0007: - DSP4.in_count = 22; + case 0x0000: + DSP4.in_count = 4; break; - case 0x0008: - DSP4.in_count = 72; + case 0x000A: + case 0x000B: + DSP4.in_count = 6; + break; + case 0x0011: + DSP4.in_count = 8; break; case 0x0009: DSP4.in_count = 14; break; - case 0x000A: - case 0x000B: - DSP4.in_count = 6; + case 0x0007: + DSP4.in_count = 22; break; case 0x000D: DSP4.in_count = 34; break; - case 0x000E: - DSP4.in_count = 0; + case 0x0001: + DSP4.in_count = 36; break; - case 0x0011: - DSP4.in_count = 8; + case 0x0008: + DSP4.in_count = 72; break; default: DSP4.waiting4command = true; diff --git a/source/dsp1.h b/source/dsp1.h index 7cd97c6..4cc2eca 100644 --- a/source/dsp1.h +++ b/source/dsp1.h @@ -28,11 +28,10 @@ typedef struct uint32_t out_count; uint32_t out_index; uint8_t parameters [512]; - //output was 512 for DSP-2 work, updated to reflect current thinking on DSP-3 - uint8_t output [512]; + uint8_t output [512]; } SDSP1; -void S9xResetDSP1(); +void S9xResetDSP1(void); uint8_t S9xGetDSP(uint16_t Address); void S9xSetDSP(uint8_t Byte, uint16_t Address); extern SDSP1 DSP1; diff --git a/source/font.h b/source/font.h index 01ed497..e5fb25c 100644 --- a/source/font.h +++ b/source/font.h @@ -60,4 +60,3 @@ static const char* font[] = static int32_t font_width = 8; static int32_t font_height = 9; - diff --git a/source/fxemu.c b/source/fxemu.c index 3995a53..dcbf04d 100644 --- a/source/fxemu.c +++ b/source/fxemu.c @@ -7,7 +7,7 @@ #include <stdio.h> /* The FxChip Emulator's internal variables */ -struct FxRegs_s GSU; // This will be initialized when loading a ROM +FxRegs_s GSU; /* This will be initialized when loading a ROM */ void FxCacheWriteAccess(uint16_t vAddress) { @@ -282,10 +282,10 @@ static void fx_writeRegisterSpaceAfterUse() } /* Reset the FxChip */ -void FxReset(struct FxInit_s* psFxInfo) +void FxReset(FxInit_s* psFxInfo) { /* Clear all internal variables */ - memset((uint8_t*) &GSU, 0, sizeof(struct FxRegs_s)); + memset(&GSU, 0, sizeof(FxRegs_s)); /* Set default registers */ GSU.pvSreg = GSU.pvDreg = &R0; diff --git a/source/fxemu.h b/source/fxemu.h index 0012c33..3af330c 100644 --- a/source/fxemu.h +++ b/source/fxemu.h @@ -6,48 +6,47 @@ #include "snes9x.h" /* The FxInfo_s structure, the link between the FxEmulator and the Snes Emulator */ -struct FxInit_s +typedef struct { - uint32_t vFlags; uint8_t* pvRegisters; /* 768 bytes located in the memory at address 0x3000 */ uint32_t nRamBanks; /* Number of 64kb-banks in GSU-RAM/BackupRAM (banks 0x70-0x73) */ uint8_t* pvRam; /* Pointer to GSU-RAM */ uint32_t nRomBanks; /* Number of 32kb-banks in Cart-ROM */ uint8_t* pvRom; /* Pointer to Cart-ROM */ -}; +} FxInit_s; /* Reset the FxChip */ -extern void FxReset(struct FxInit_s* psFxInfo); +extern void FxReset(FxInit_s* psFxInfo); /* Execute until the next stop instruction */ extern int32_t FxEmulate(uint32_t nInstructions); /* Write access to the cache */ extern void FxCacheWriteAccess(uint16_t vAddress); -extern void FxFlushCache(); /* Callled when the G flag in SFR is set to zero */ +extern void FxFlushCache(void); /* Called when the G flag in SFR is set to zero */ /* Errors */ -extern int32_t FxGetErrorCode(); -extern int32_t FxGetIllegalAddress(); +extern int32_t FxGetErrorCode(void); +extern int32_t FxGetIllegalAddress(void); /* Access to internal registers */ -extern uint32_t FxGetColorRegister(); -extern uint32_t FxGetPlotOptionRegister(); -extern uint32_t FxGetSourceRegisterIndex(); -extern uint32_t FxGetDestinationRegisterIndex(); +extern uint32_t FxGetColorRegister(void); +extern uint32_t FxGetPlotOptionRegister(void); +extern uint32_t FxGetSourceRegisterIndex(void); +extern uint32_t FxGetDestinationRegisterIndex(void); /* Get the byte currently in the pipe */ -extern uint8_t FxPipe(); +extern uint8_t FxPipe(void); /* SCBR write seen. We need to update our cached screen pointers */ -extern void fx_dirtySCBR(); +extern void fx_dirtySCBR(void); /* Update RamBankReg and RAM Bank pointer */ extern void fx_updateRamBank(uint8_t Byte); /* Option flags */ #define FX_FLAG_ADDRESS_CHECKING 0x01 -#define FX_FLAG_ROM_BUFFER 0x02 +#define FX_FLAG_ROM_BUFFER 0x02 /* Return codes from FxEmulate(), FxStepInto() or FxStepOver() */ #define FX_BREAKPOINT -1 diff --git a/source/fxinst.c b/source/fxinst.c index 86ccd38..814825b 100644 --- a/source/fxinst.c +++ b/source/fxinst.c @@ -7,7 +7,7 @@ #include <string.h> #include <stdio.h> -extern struct FxRegs_s GSU; +extern FxRegs_s GSU; int32_t gsu_bank [512] = {0}; /* Codes used: @@ -22,7 +22,7 @@ int32_t gsu_bank [512] = {0}; */ /* 00 - stop - stop GSU execution (and maybe generate an IRQ) */ -static void fx_stop() +static inline void fx_stop() { CF(G); GSU.vCounter = 0; @@ -39,7 +39,7 @@ static void fx_stop() } /* 01 - nop - no operation */ -static void fx_nop() +static inline void fx_nop() { CLRFLAGS; R15++; @@ -48,7 +48,7 @@ static void fx_nop() extern void fx_flushCache(); /* 02 - cache - reintialize GSU cache */ -static void fx_cache() +static inline void fx_cache() { uint32_t c = R15 & 0xfff0; if (GSU.vCacheBaseReg != c || !GSU.bCacheActive) @@ -62,7 +62,7 @@ static void fx_cache() } /* 03 - lsr - logic shift right */ -static void fx_lsr() +static inline void fx_lsr() { uint32_t v; GSU.vCarry = SREG & 1; @@ -76,7 +76,7 @@ static void fx_lsr() } /* 04 - rol - rotate left */ -static void fx_rol() +static inline void fx_rol() { uint32_t v = USEX16((SREG << 1) + GSU.vCarry); GSU.vCarry = (SREG >> 15) & 1; @@ -89,7 +89,7 @@ static void fx_rol() } /* 05 - bra - branch always */ -static void fx_bra() +static inline void fx_bra() { uint8_t v = PIPE; R15++; @@ -113,61 +113,61 @@ static void fx_bra() #define TEST_CY (GSU.vCarry & 1) /* 06 - blt - branch on less than */ -static void fx_blt() +static inline void fx_blt() { BRA_COND((TEST_S != 0) != (TEST_OV != 0)); } /* 07 - bge - branch on greater or equals */ -static void fx_bge() +static inline void fx_bge() { BRA_COND((TEST_S != 0) == (TEST_OV != 0)); } /* 08 - bne - branch on not equal */ -static void fx_bne() +static inline void fx_bne() { BRA_COND(!TEST_Z); } /* 09 - beq - branch on equal */ -static void fx_beq() +static inline void fx_beq() { BRA_COND(TEST_Z); } /* 0a - bpl - branch on plus */ -static void fx_bpl() +static inline void fx_bpl() { BRA_COND(!TEST_S); } /* 0b - bmi - branch on minus */ -static void fx_bmi() +static inline void fx_bmi() { BRA_COND(TEST_S); } /* 0c - bcc - branch on carry clear */ -static void fx_bcc() +static inline void fx_bcc() { BRA_COND(!TEST_CY); } /* 0d - bcs - branch on carry set */ -static void fx_bcs() +static inline void fx_bcs() { BRA_COND(TEST_CY); } /* 0e - bvc - branch on overflow clear */ -static void fx_bvc() +static inline void fx_bvc() { BRA_COND(!TEST_OV); } /* 0f - bvs - branch on overflow set */ -static void fx_bvs() +static inline void fx_bvs() { BRA_COND(TEST_OV); } @@ -207,67 +207,67 @@ static void fx_bvs() R15++; \ } -static void fx_to_r0() +static inline void fx_to_r0() { FX_TO(0); } -static void fx_to_r1() +static inline void fx_to_r1() { FX_TO(1); } -static void fx_to_r2() +static inline void fx_to_r2() { FX_TO(2); } -static void fx_to_r3() +static inline void fx_to_r3() { FX_TO(3); } -static void fx_to_r4() +static inline void fx_to_r4() { FX_TO(4); } -static void fx_to_r5() +static inline void fx_to_r5() { FX_TO(5); } -static void fx_to_r6() +static inline void fx_to_r6() { FX_TO(6); } -static void fx_to_r7() +static inline void fx_to_r7() { FX_TO(7); } -static void fx_to_r8() +static inline void fx_to_r8() { FX_TO(8); } -static void fx_to_r9() +static inline void fx_to_r9() { FX_TO(9); } -static void fx_to_r10() +static inline void fx_to_r10() { FX_TO(10); } -static void fx_to_r11() +static inline void fx_to_r11() { FX_TO(11); } -static void fx_to_r12() +static inline void fx_to_r12() { FX_TO(12); } -static void fx_to_r13() +static inline void fx_to_r13() { FX_TO(13); } -static void fx_to_r14() +static inline void fx_to_r14() { FX_TO_R14(14); } -static void fx_to_r15() +static inline void fx_to_r15() { FX_TO_R15(15); } @@ -278,67 +278,67 @@ static void fx_to_r15() GSU.pvSreg = GSU.pvDreg = &GSU.avReg[reg]; \ R15++ -static void fx_with_r0() +static inline void fx_with_r0() { FX_WITH(0); } -static void fx_with_r1() +static inline void fx_with_r1() { FX_WITH(1); } -static void fx_with_r2() +static inline void fx_with_r2() { FX_WITH(2); } -static void fx_with_r3() +static inline void fx_with_r3() { FX_WITH(3); } -static void fx_with_r4() +static inline void fx_with_r4() { FX_WITH(4); } -static void fx_with_r5() +static inline void fx_with_r5() { FX_WITH(5); } -static void fx_with_r6() +static inline void fx_with_r6() { FX_WITH(6); } -static void fx_with_r7() +static inline void fx_with_r7() { FX_WITH(7); } -static void fx_with_r8() +static inline void fx_with_r8() { FX_WITH(8); } -static void fx_with_r9() +static inline void fx_with_r9() { FX_WITH(9); } -static void fx_with_r10() +static inline void fx_with_r10() { FX_WITH(10); } -static void fx_with_r11() +static inline void fx_with_r11() { FX_WITH(11); } -static void fx_with_r12() +static inline void fx_with_r12() { FX_WITH(12); } -static void fx_with_r13() +static inline void fx_with_r13() { FX_WITH(13); } -static void fx_with_r14() +static inline void fx_with_r14() { FX_WITH(14); } -static void fx_with_r15() +static inline void fx_with_r15() { FX_WITH(15); } @@ -351,51 +351,51 @@ static void fx_with_r15() CLRFLAGS; \ R15++ -static void fx_stw_r0() +static inline void fx_stw_r0() { FX_STW(0); } -static void fx_stw_r1() +static inline void fx_stw_r1() { FX_STW(1); } -static void fx_stw_r2() +static inline void fx_stw_r2() { FX_STW(2); } -static void fx_stw_r3() +static inline void fx_stw_r3() { FX_STW(3); } -static void fx_stw_r4() +static inline void fx_stw_r4() { FX_STW(4); } -static void fx_stw_r5() +static inline void fx_stw_r5() { FX_STW(5); } -static void fx_stw_r6() +static inline void fx_stw_r6() { FX_STW(6); } -static void fx_stw_r7() +static inline void fx_stw_r7() { FX_STW(7); } -static void fx_stw_r8() +static inline void fx_stw_r8() { FX_STW(8); } -static void fx_stw_r9() +static inline void fx_stw_r9() { FX_STW(9); } -static void fx_stw_r10() +static inline void fx_stw_r10() { FX_STW(10); } -static void fx_stw_r11() +static inline void fx_stw_r11() { FX_STW(11); } @@ -407,57 +407,57 @@ static void fx_stw_r11() CLRFLAGS; \ R15++ -static void fx_stb_r0() +static inline void fx_stb_r0() { FX_STB(0); } -static void fx_stb_r1() +static inline void fx_stb_r1() { FX_STB(1); } -static void fx_stb_r2() +static inline void fx_stb_r2() { FX_STB(2); } -static void fx_stb_r3() +static inline void fx_stb_r3() { FX_STB(3); } -static void fx_stb_r4() +static inline void fx_stb_r4() { FX_STB(4); } -static void fx_stb_r5() +static inline void fx_stb_r5() { FX_STB(5); } -static void fx_stb_r6() +static inline void fx_stb_r6() { FX_STB(6); } -static void fx_stb_r7() +static inline void fx_stb_r7() { FX_STB(7); } -static void fx_stb_r8() +static inline void fx_stb_r8() { FX_STB(8); } -static void fx_stb_r9() +static inline void fx_stb_r9() { FX_STB(9); } -static void fx_stb_r10() +static inline void fx_stb_r10() { FX_STB(10); } -static void fx_stb_r11() +static inline void fx_stb_r11() { FX_STB(11); } /* 3c - loop - decrement loop counter, and branch on not zero */ -static void fx_loop() +static inline void fx_loop() { GSU.vSign = GSU.vZero = --R12; if ((uint16_t) R12 != 0) @@ -468,7 +468,7 @@ static void fx_loop() } /* 3d - alt1 - set alt1 mode */ -static void fx_alt1() +static inline void fx_alt1() { SF(ALT1); CF(B); @@ -476,7 +476,7 @@ static void fx_alt1() } /* 3e - alt2 - set alt2 mode */ -static void fx_alt2() +static inline void fx_alt2() { SF(ALT2); CF(B); @@ -484,7 +484,7 @@ static void fx_alt2() } /* 3f - alt3 - set alt3 mode */ -static void fx_alt3() +static inline void fx_alt3() { SF(ALT1); SF(ALT2); @@ -503,51 +503,51 @@ static void fx_alt3() TESTR14; \ CLRFLAGS -static void fx_ldw_r0() +static inline void fx_ldw_r0() { FX_LDW(0); } -static void fx_ldw_r1() +static inline void fx_ldw_r1() { FX_LDW(1); } -static void fx_ldw_r2() +static inline void fx_ldw_r2() { FX_LDW(2); } -static void fx_ldw_r3() +static inline void fx_ldw_r3() { FX_LDW(3); } -static void fx_ldw_r4() +static inline void fx_ldw_r4() { FX_LDW(4); } -static void fx_ldw_r5() +static inline void fx_ldw_r5() { FX_LDW(5); } -static void fx_ldw_r6() +static inline void fx_ldw_r6() { FX_LDW(6); } -static void fx_ldw_r7() +static inline void fx_ldw_r7() { FX_LDW(7); } -static void fx_ldw_r8() +static inline void fx_ldw_r8() { FX_LDW(8); } -static void fx_ldw_r9() +static inline void fx_ldw_r9() { FX_LDW(9); } -static void fx_ldw_r10() +static inline void fx_ldw_r10() { FX_LDW(10); } -static void fx_ldw_r11() +static inline void fx_ldw_r11() { FX_LDW(11); } @@ -562,57 +562,57 @@ static void fx_ldw_r11() TESTR14; \ CLRFLAGS -static void fx_ldb_r0() +static inline void fx_ldb_r0() { FX_LDB(0); } -static void fx_ldb_r1() +static inline void fx_ldb_r1() { FX_LDB(1); } -static void fx_ldb_r2() +static inline void fx_ldb_r2() { FX_LDB(2); } -static void fx_ldb_r3() +static inline void fx_ldb_r3() { FX_LDB(3); } -static void fx_ldb_r4() +static inline void fx_ldb_r4() { FX_LDB(4); } -static void fx_ldb_r5() +static inline void fx_ldb_r5() { FX_LDB(5); } -static void fx_ldb_r6() +static inline void fx_ldb_r6() { FX_LDB(6); } -static void fx_ldb_r7() +static inline void fx_ldb_r7() { FX_LDB(7); } -static void fx_ldb_r8() +static inline void fx_ldb_r8() { FX_LDB(8); } -static void fx_ldb_r9() +static inline void fx_ldb_r9() { FX_LDB(9); } -static void fx_ldb_r10() +static inline void fx_ldb_r10() { FX_LDB(10); } -static void fx_ldb_r11() +static inline void fx_ldb_r11() { FX_LDB(11); } /* 4c - plot - plot pixel with R1,R2 as x,y and the color register as the color */ -static void fx_plot_2bit() +static inline void fx_plot_2bit() { uint32_t x = USEX8(R1); uint32_t y = USEX8(R2); @@ -644,7 +644,7 @@ static void fx_plot_2bit() } /* 2c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static void fx_rpix_2bit() +static inline void fx_rpix_2bit() { uint32_t x = USEX8(R1); uint32_t y = USEX8(R2); @@ -664,7 +664,7 @@ static void fx_rpix_2bit() } /* 4c - plot - plot pixel with R1,R2 as x,y and the color register as the color */ -static void fx_plot_4bit() +static inline void fx_plot_4bit() { uint32_t x = USEX8(R1); uint32_t y = USEX8(R2); @@ -704,7 +704,7 @@ static void fx_plot_4bit() } /* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static void fx_rpix_4bit() +static inline void fx_rpix_4bit() { uint32_t x = USEX8(R1); uint32_t y = USEX8(R2); @@ -726,7 +726,7 @@ static void fx_rpix_4bit() } /* 8c - plot - plot pixel with R1,R2 as x,y and the color register as the color */ -static void fx_plot_8bit() +static inline void fx_plot_8bit() { uint32_t x = USEX8(R1); uint32_t y = USEX8(R2); @@ -784,7 +784,7 @@ static void fx_plot_8bit() } /* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static void fx_rpix_8bit() +static inline void fx_rpix_8bit() { uint32_t x = USEX8(R1); uint32_t y = USEX8(R2); @@ -812,12 +812,12 @@ static void fx_rpix_8bit() /* 4o - plot - plot pixel with R1,R2 as x,y and the color register as the color */ /* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static void fx_obj_func() +static inline void fx_obj_func() { } /* 4d - swap - swap upper and lower byte of a register */ -static void fx_swap() +static inline void fx_swap() { uint8_t c = (uint8_t)SREG; uint8_t d = (uint8_t)(SREG >> 8); @@ -831,7 +831,7 @@ static void fx_swap() } /* 4e - color - copy source register to color register */ -static void fx_color() +static inline void fx_color() { uint8_t c = (uint8_t)SREG; if (GSU.vPlotOptionReg & 0x04) @@ -848,7 +848,7 @@ static void fx_color() } /* 4e(ALT1) - cmode - set plot option register */ -static void fx_cmode() +static inline void fx_cmode() { GSU.vPlotOptionReg = SREG; @@ -863,7 +863,7 @@ static void fx_cmode() } /* 4f - not - perform exclusive exor with 1 on all bits */ -static void fx_not() +static inline void fx_not() { uint32_t v = ~SREG; R15++; @@ -886,67 +886,67 @@ static void fx_not() TESTR14; \ CLRFLAGS -static void fx_add_r0() +static inline void fx_add_r0() { FX_ADD(0); } -static void fx_add_r1() +static inline void fx_add_r1() { FX_ADD(1); } -static void fx_add_r2() +static inline void fx_add_r2() { FX_ADD(2); } -static void fx_add_r3() +static inline void fx_add_r3() { FX_ADD(3); } -static void fx_add_r4() +static inline void fx_add_r4() { FX_ADD(4); } -static void fx_add_r5() +static inline void fx_add_r5() { FX_ADD(5); } -static void fx_add_r6() +static inline void fx_add_r6() { FX_ADD(6); } -static void fx_add_r7() +static inline void fx_add_r7() { FX_ADD(7); } -static void fx_add_r8() +static inline void fx_add_r8() { FX_ADD(8); } -static void fx_add_r9() +static inline void fx_add_r9() { FX_ADD(9); } -static void fx_add_r10() +static inline void fx_add_r10() { FX_ADD(10); } -static void fx_add_r11() +static inline void fx_add_r11() { FX_ADD(11); } -static void fx_add_r12() +static inline void fx_add_r12() { FX_ADD(12); } -static void fx_add_r13() +static inline void fx_add_r13() { FX_ADD(13); } -static void fx_add_r14() +static inline void fx_add_r14() { FX_ADD(14); } -static void fx_add_r15() +static inline void fx_add_r15() { FX_ADD(15); } @@ -963,67 +963,67 @@ static void fx_add_r15() TESTR14; \ CLRFLAGS -static void fx_adc_r0() +static inline void fx_adc_r0() { FX_ADC(0); } -static void fx_adc_r1() +static inline void fx_adc_r1() { FX_ADC(1); } -static void fx_adc_r2() +static inline void fx_adc_r2() { FX_ADC(2); } -static void fx_adc_r3() +static inline void fx_adc_r3() { FX_ADC(3); } -static void fx_adc_r4() +static inline void fx_adc_r4() { FX_ADC(4); } -static void fx_adc_r5() +static inline void fx_adc_r5() { FX_ADC(5); } -static void fx_adc_r6() +static inline void fx_adc_r6() { FX_ADC(6); } -static void fx_adc_r7() +static inline void fx_adc_r7() { FX_ADC(7); } -static void fx_adc_r8() +static inline void fx_adc_r8() { FX_ADC(8); } -static void fx_adc_r9() +static inline void fx_adc_r9() { FX_ADC(9); } -static void fx_adc_r10() +static inline void fx_adc_r10() { FX_ADC(10); } -static void fx_adc_r11() +static inline void fx_adc_r11() { FX_ADC(11); } -static void fx_adc_r12() +static inline void fx_adc_r12() { FX_ADC(12); } -static void fx_adc_r13() +static inline void fx_adc_r13() { FX_ADC(13); } -static void fx_adc_r14() +static inline void fx_adc_r14() { FX_ADC(14); } -static void fx_adc_r15() +static inline void fx_adc_r15() { FX_ADC(15); } @@ -1040,67 +1040,67 @@ static void fx_adc_r15() TESTR14; \ CLRFLAGS -static void fx_add_i0() +static inline void fx_add_i0() { FX_ADD_I(0); } -static void fx_add_i1() +static inline void fx_add_i1() { FX_ADD_I(1); } -static void fx_add_i2() +static inline void fx_add_i2() { FX_ADD_I(2); } -static void fx_add_i3() +static inline void fx_add_i3() { FX_ADD_I(3); } -static void fx_add_i4() +static inline void fx_add_i4() { FX_ADD_I(4); } -static void fx_add_i5() +static inline void fx_add_i5() { FX_ADD_I(5); } -static void fx_add_i6() +static inline void fx_add_i6() { FX_ADD_I(6); } -static void fx_add_i7() +static inline void fx_add_i7() { FX_ADD_I(7); } -static void fx_add_i8() +static inline void fx_add_i8() { FX_ADD_I(8); } -static void fx_add_i9() +static inline void fx_add_i9() { FX_ADD_I(9); } -static void fx_add_i10() +static inline void fx_add_i10() { FX_ADD_I(10); } -static void fx_add_i11() +static inline void fx_add_i11() { FX_ADD_I(11); } -static void fx_add_i12() +static inline void fx_add_i12() { FX_ADD_I(12); } -static void fx_add_i13() +static inline void fx_add_i13() { FX_ADD_I(13); } -static void fx_add_i14() +static inline void fx_add_i14() { FX_ADD_I(14); } -static void fx_add_i15() +static inline void fx_add_i15() { FX_ADD_I(15); } @@ -1117,67 +1117,67 @@ static void fx_add_i15() TESTR14; \ CLRFLAGS -static void fx_adc_i0() +static inline void fx_adc_i0() { FX_ADC_I(0); } -static void fx_adc_i1() +static inline void fx_adc_i1() { FX_ADC_I(1); } -static void fx_adc_i2() +static inline void fx_adc_i2() { FX_ADC_I(2); } -static void fx_adc_i3() +static inline void fx_adc_i3() { FX_ADC_I(3); } -static void fx_adc_i4() +static inline void fx_adc_i4() { FX_ADC_I(4); } -static void fx_adc_i5() +static inline void fx_adc_i5() { FX_ADC_I(5); } -static void fx_adc_i6() +static inline void fx_adc_i6() { FX_ADC_I(6); } -static void fx_adc_i7() +static inline void fx_adc_i7() { FX_ADC_I(7); } -static void fx_adc_i8() +static inline void fx_adc_i8() { FX_ADC_I(8); } -static void fx_adc_i9() +static inline void fx_adc_i9() { FX_ADC_I(9); } -static void fx_adc_i10() +static inline void fx_adc_i10() { FX_ADC_I(10); } -static void fx_adc_i11() +static inline void fx_adc_i11() { FX_ADC_I(11); } -static void fx_adc_i12() +static inline void fx_adc_i12() { FX_ADC_I(12); } -static void fx_adc_i13() +static inline void fx_adc_i13() { FX_ADC_I(13); } -static void fx_adc_i14() +static inline void fx_adc_i14() { FX_ADC_I(14); } -static void fx_adc_i15() +static inline void fx_adc_i15() { FX_ADC_I(15); } @@ -1194,67 +1194,67 @@ static void fx_adc_i15() TESTR14; \ CLRFLAGS -static void fx_sub_r0() +static inline void fx_sub_r0() { FX_SUB(0); } -static void fx_sub_r1() +static inline void fx_sub_r1() { FX_SUB(1); } -static void fx_sub_r2() +static inline void fx_sub_r2() { FX_SUB(2); } -static void fx_sub_r3() +static inline void fx_sub_r3() { FX_SUB(3); } -static void fx_sub_r4() +static inline void fx_sub_r4() { FX_SUB(4); } -static void fx_sub_r5() +static inline void fx_sub_r5() { FX_SUB(5); } -static void fx_sub_r6() +static inline void fx_sub_r6() { FX_SUB(6); } -static void fx_sub_r7() +static inline void fx_sub_r7() { FX_SUB(7); } -static void fx_sub_r8() +static inline void fx_sub_r8() { FX_SUB(8); } -static void fx_sub_r9() +static inline void fx_sub_r9() { FX_SUB(9); } -static void fx_sub_r10() +static inline void fx_sub_r10() { FX_SUB(10); } -static void fx_sub_r11() +static inline void fx_sub_r11() { FX_SUB(11); } -static void fx_sub_r12() +static inline void fx_sub_r12() { FX_SUB(12); } -static void fx_sub_r13() +static inline void fx_sub_r13() { FX_SUB(13); } -static void fx_sub_r14() +static inline void fx_sub_r14() { FX_SUB(14); } -static void fx_sub_r15() +static inline void fx_sub_r15() { FX_SUB(15); } @@ -1271,67 +1271,67 @@ static void fx_sub_r15() TESTR14; \ CLRFLAGS -static void fx_sbc_r0() +static inline void fx_sbc_r0() { FX_SBC(0); } -static void fx_sbc_r1() +static inline void fx_sbc_r1() { FX_SBC(1); } -static void fx_sbc_r2() +static inline void fx_sbc_r2() { FX_SBC(2); } -static void fx_sbc_r3() +static inline void fx_sbc_r3() { FX_SBC(3); } -static void fx_sbc_r4() +static inline void fx_sbc_r4() { FX_SBC(4); } -static void fx_sbc_r5() +static inline void fx_sbc_r5() { FX_SBC(5); } -static void fx_sbc_r6() +static inline void fx_sbc_r6() { FX_SBC(6); } -static void fx_sbc_r7() +static inline void fx_sbc_r7() { FX_SBC(7); } -static void fx_sbc_r8() +static inline void fx_sbc_r8() { FX_SBC(8); } -static void fx_sbc_r9() +static inline void fx_sbc_r9() { FX_SBC(9); } -static void fx_sbc_r10() +static inline void fx_sbc_r10() { FX_SBC(10); } -static void fx_sbc_r11() +static inline void fx_sbc_r11() { FX_SBC(11); } -static void fx_sbc_r12() +static inline void fx_sbc_r12() { FX_SBC(12); } -static void fx_sbc_r13() +static inline void fx_sbc_r13() { FX_SBC(13); } -static void fx_sbc_r14() +static inline void fx_sbc_r14() { FX_SBC(14); } -static void fx_sbc_r15() +static inline void fx_sbc_r15() { FX_SBC(15); } @@ -1348,67 +1348,67 @@ static void fx_sbc_r15() TESTR14; \ CLRFLAGS -static void fx_sub_i0() +static inline void fx_sub_i0() { FX_SUB_I(0); } -static void fx_sub_i1() +static inline void fx_sub_i1() { FX_SUB_I(1); } -static void fx_sub_i2() +static inline void fx_sub_i2() { FX_SUB_I(2); } -static void fx_sub_i3() +static inline void fx_sub_i3() { FX_SUB_I(3); } -static void fx_sub_i4() +static inline void fx_sub_i4() { FX_SUB_I(4); } -static void fx_sub_i5() +static inline void fx_sub_i5() { FX_SUB_I(5); } -static void fx_sub_i6() +static inline void fx_sub_i6() { FX_SUB_I(6); } -static void fx_sub_i7() +static inline void fx_sub_i7() { FX_SUB_I(7); } -static void fx_sub_i8() +static inline void fx_sub_i8() { FX_SUB_I(8); } -static void fx_sub_i9() +static inline void fx_sub_i9() { FX_SUB_I(9); } -static void fx_sub_i10() +static inline void fx_sub_i10() { FX_SUB_I(10); } -static void fx_sub_i11() +static inline void fx_sub_i11() { FX_SUB_I(11); } -static void fx_sub_i12() +static inline void fx_sub_i12() { FX_SUB_I(12); } -static void fx_sub_i13() +static inline void fx_sub_i13() { FX_SUB_I(13); } -static void fx_sub_i14() +static inline void fx_sub_i14() { FX_SUB_I(14); } -static void fx_sub_i15() +static inline void fx_sub_i15() { FX_SUB_I(15); } @@ -1423,73 +1423,73 @@ static void fx_sub_i15() R15++; \ CLRFLAGS -static void fx_cmp_r0() +static inline void fx_cmp_r0() { FX_CMP(0); } -static void fx_cmp_r1() +static inline void fx_cmp_r1() { FX_CMP(1); } -static void fx_cmp_r2() +static inline void fx_cmp_r2() { FX_CMP(2); } -static void fx_cmp_r3() +static inline void fx_cmp_r3() { FX_CMP(3); } -static void fx_cmp_r4() +static inline void fx_cmp_r4() { FX_CMP(4); } -static void fx_cmp_r5() +static inline void fx_cmp_r5() { FX_CMP(5); } -static void fx_cmp_r6() +static inline void fx_cmp_r6() { FX_CMP(6); } -static void fx_cmp_r7() +static inline void fx_cmp_r7() { FX_CMP(7); } -static void fx_cmp_r8() +static inline void fx_cmp_r8() { FX_CMP(8); } -static void fx_cmp_r9() +static inline void fx_cmp_r9() { FX_CMP(9); } -static void fx_cmp_r10() +static inline void fx_cmp_r10() { FX_CMP(10); } -static void fx_cmp_r11() +static inline void fx_cmp_r11() { FX_CMP(11); } -static void fx_cmp_r12() +static inline void fx_cmp_r12() { FX_CMP(12); } -static void fx_cmp_r13() +static inline void fx_cmp_r13() { FX_CMP(13); } -static void fx_cmp_r14() +static inline void fx_cmp_r14() { FX_CMP(14); } -static void fx_cmp_r15() +static inline void fx_cmp_r15() { FX_CMP(15); } /* 70 - merge - R7 as upper byte, R8 as lower byte (used for texture-mapping) */ -static void fx_merge() +static inline void fx_merge() { uint32_t v = (R7 & 0xff00) | ((R8 & 0xff00) >> 8); R15++; @@ -1512,63 +1512,63 @@ static void fx_merge() TESTR14; \ CLRFLAGS -static void fx_and_r1() +static inline void fx_and_r1() { FX_AND(1); } -static void fx_and_r2() +static inline void fx_and_r2() { FX_AND(2); } -static void fx_and_r3() +static inline void fx_and_r3() { FX_AND(3); } -static void fx_and_r4() +static inline void fx_and_r4() { FX_AND(4); } -static void fx_and_r5() +static inline void fx_and_r5() { FX_AND(5); } -static void fx_and_r6() +static inline void fx_and_r6() { FX_AND(6); } -static void fx_and_r7() +static inline void fx_and_r7() { FX_AND(7); } -static void fx_and_r8() +static inline void fx_and_r8() { FX_AND(8); } -static void fx_and_r9() +static inline void fx_and_r9() { FX_AND(9); } -static void fx_and_r10() +static inline void fx_and_r10() { FX_AND(10); } -static void fx_and_r11() +static inline void fx_and_r11() { FX_AND(11); } -static void fx_and_r12() +static inline void fx_and_r12() { FX_AND(12); } -static void fx_and_r13() +static inline void fx_and_r13() { FX_AND(13); } -static void fx_and_r14() +static inline void fx_and_r14() { FX_AND(14); } -static void fx_and_r15() +static inline void fx_and_r15() { FX_AND(15); } @@ -1583,63 +1583,63 @@ static void fx_and_r15() TESTR14; \ CLRFLAGS -static void fx_bic_r1() +static inline void fx_bic_r1() { FX_BIC(1); } -static void fx_bic_r2() +static inline void fx_bic_r2() { FX_BIC(2); } -static void fx_bic_r3() +static inline void fx_bic_r3() { FX_BIC(3); } -static void fx_bic_r4() +static inline void fx_bic_r4() { FX_BIC(4); } -static void fx_bic_r5() +static inline void fx_bic_r5() { FX_BIC(5); } -static void fx_bic_r6() +static inline void fx_bic_r6() { FX_BIC(6); } -static void fx_bic_r7() +static inline void fx_bic_r7() { FX_BIC(7); } -static void fx_bic_r8() +static inline void fx_bic_r8() { FX_BIC(8); } -static void fx_bic_r9() +static inline void fx_bic_r9() { FX_BIC(9); } -static void fx_bic_r10() +static inline void fx_bic_r10() { FX_BIC(10); } -static void fx_bic_r11() +static inline void fx_bic_r11() { FX_BIC(11); } -static void fx_bic_r12() +static inline void fx_bic_r12() { FX_BIC(12); } -static void fx_bic_r13() +static inline void fx_bic_r13() { FX_BIC(13); } -static void fx_bic_r14() +static inline void fx_bic_r14() { FX_BIC(14); } -static void fx_bic_r15() +static inline void fx_bic_r15() { FX_BIC(15); } @@ -1654,63 +1654,63 @@ static void fx_bic_r15() TESTR14; \ CLRFLAGS -static void fx_and_i1() +static inline void fx_and_i1() { FX_AND_I(1); } -static void fx_and_i2() +static inline void fx_and_i2() { FX_AND_I(2); } -static void fx_and_i3() +static inline void fx_and_i3() { FX_AND_I(3); } -static void fx_and_i4() +static inline void fx_and_i4() { FX_AND_I(4); } -static void fx_and_i5() +static inline void fx_and_i5() { FX_AND_I(5); } -static void fx_and_i6() +static inline void fx_and_i6() { FX_AND_I(6); } -static void fx_and_i7() +static inline void fx_and_i7() { FX_AND_I(7); } -static void fx_and_i8() +static inline void fx_and_i8() { FX_AND_I(8); } -static void fx_and_i9() +static inline void fx_and_i9() { FX_AND_I(9); } -static void fx_and_i10() +static inline void fx_and_i10() { FX_AND_I(10); } -static void fx_and_i11() +static inline void fx_and_i11() { FX_AND_I(11); } -static void fx_and_i12() +static inline void fx_and_i12() { FX_AND_I(12); } -static void fx_and_i13() +static inline void fx_and_i13() { FX_AND_I(13); } -static void fx_and_i14() +static inline void fx_and_i14() { FX_AND_I(14); } -static void fx_and_i15() +static inline void fx_and_i15() { FX_AND_I(15); } @@ -1725,63 +1725,63 @@ static void fx_and_i15() TESTR14; \ CLRFLAGS -static void fx_bic_i1() +static inline void fx_bic_i1() { FX_BIC_I(1); } -static void fx_bic_i2() +static inline void fx_bic_i2() { FX_BIC_I(2); } -static void fx_bic_i3() +static inline void fx_bic_i3() { FX_BIC_I(3); } -static void fx_bic_i4() +static inline void fx_bic_i4() { FX_BIC_I(4); } -static void fx_bic_i5() +static inline void fx_bic_i5() { FX_BIC_I(5); } -static void fx_bic_i6() +static inline void fx_bic_i6() { FX_BIC_I(6); } -static void fx_bic_i7() +static inline void fx_bic_i7() { FX_BIC_I(7); } -static void fx_bic_i8() +static inline void fx_bic_i8() { FX_BIC_I(8); } -static void fx_bic_i9() +static inline void fx_bic_i9() { FX_BIC_I(9); } -static void fx_bic_i10() +static inline void fx_bic_i10() { FX_BIC_I(10); } -static void fx_bic_i11() +static inline void fx_bic_i11() { FX_BIC_I(11); } -static void fx_bic_i12() +static inline void fx_bic_i12() { FX_BIC_I(12); } -static void fx_bic_i13() +static inline void fx_bic_i13() { FX_BIC_I(13); } -static void fx_bic_i14() +static inline void fx_bic_i14() { FX_BIC_I(14); } -static void fx_bic_i15() +static inline void fx_bic_i15() { FX_BIC_I(15); } @@ -1796,67 +1796,67 @@ static void fx_bic_i15() TESTR14; \ CLRFLAGS -static void fx_mult_r0() +static inline void fx_mult_r0() { FX_MULT(0); } -static void fx_mult_r1() +static inline void fx_mult_r1() { FX_MULT(1); } -static void fx_mult_r2() +static inline void fx_mult_r2() { FX_MULT(2); } -static void fx_mult_r3() +static inline void fx_mult_r3() { FX_MULT(3); } -static void fx_mult_r4() +static inline void fx_mult_r4() { FX_MULT(4); } -static void fx_mult_r5() +static inline void fx_mult_r5() { FX_MULT(5); } -static void fx_mult_r6() +static inline void fx_mult_r6() { FX_MULT(6); } -static void fx_mult_r7() +static inline void fx_mult_r7() { FX_MULT(7); } -static void fx_mult_r8() +static inline void fx_mult_r8() { FX_MULT(8); } -static void fx_mult_r9() +static inline void fx_mult_r9() { FX_MULT(9); } -static void fx_mult_r10() +static inline void fx_mult_r10() { FX_MULT(10); } -static void fx_mult_r11() +static inline void fx_mult_r11() { FX_MULT(11); } -static void fx_mult_r12() +static inline void fx_mult_r12() { FX_MULT(12); } -static void fx_mult_r13() +static inline void fx_mult_r13() { FX_MULT(13); } -static void fx_mult_r14() +static inline void fx_mult_r14() { FX_MULT(14); } -static void fx_mult_r15() +static inline void fx_mult_r15() { FX_MULT(15); } @@ -1871,67 +1871,67 @@ static void fx_mult_r15() TESTR14; \ CLRFLAGS -static void fx_umult_r0() +static inline void fx_umult_r0() { FX_UMULT(0); } -static void fx_umult_r1() +static inline void fx_umult_r1() { FX_UMULT(1); } -static void fx_umult_r2() +static inline void fx_umult_r2() { FX_UMULT(2); } -static void fx_umult_r3() +static inline void fx_umult_r3() { FX_UMULT(3); } -static void fx_umult_r4() +static inline void fx_umult_r4() { FX_UMULT(4); } -static void fx_umult_r5() +static inline void fx_umult_r5() { FX_UMULT(5); } -static void fx_umult_r6() +static inline void fx_umult_r6() { FX_UMULT(6); } -static void fx_umult_r7() +static inline void fx_umult_r7() { FX_UMULT(7); } -static void fx_umult_r8() +static inline void fx_umult_r8() { FX_UMULT(8); } -static void fx_umult_r9() +static inline void fx_umult_r9() { FX_UMULT(9); } -static void fx_umult_r10() +static inline void fx_umult_r10() { FX_UMULT(10); } -static void fx_umult_r11() +static inline void fx_umult_r11() { FX_UMULT(11); } -static void fx_umult_r12() +static inline void fx_umult_r12() { FX_UMULT(12); } -static void fx_umult_r13() +static inline void fx_umult_r13() { FX_UMULT(13); } -static void fx_umult_r14() +static inline void fx_umult_r14() { FX_UMULT(14); } -static void fx_umult_r15() +static inline void fx_umult_r15() { FX_UMULT(15); } @@ -1946,67 +1946,67 @@ static void fx_umult_r15() TESTR14; \ CLRFLAGS -static void fx_mult_i0() +static inline void fx_mult_i0() { FX_MULT_I(0); } -static void fx_mult_i1() +static inline void fx_mult_i1() { FX_MULT_I(1); } -static void fx_mult_i2() +static inline void fx_mult_i2() { FX_MULT_I(2); } -static void fx_mult_i3() +static inline void fx_mult_i3() { FX_MULT_I(3); } -static void fx_mult_i4() +static inline void fx_mult_i4() { FX_MULT_I(4); } -static void fx_mult_i5() +static inline void fx_mult_i5() { FX_MULT_I(5); } -static void fx_mult_i6() +static inline void fx_mult_i6() { FX_MULT_I(6); } -static void fx_mult_i7() +static inline void fx_mult_i7() { FX_MULT_I(7); } -static void fx_mult_i8() +static inline void fx_mult_i8() { FX_MULT_I(8); } -static void fx_mult_i9() +static inline void fx_mult_i9() { FX_MULT_I(9); } -static void fx_mult_i10() +static inline void fx_mult_i10() { FX_MULT_I(10); } -static void fx_mult_i11() +static inline void fx_mult_i11() { FX_MULT_I(11); } -static void fx_mult_i12() +static inline void fx_mult_i12() { FX_MULT_I(12); } -static void fx_mult_i13() +static inline void fx_mult_i13() { FX_MULT_I(13); } -static void fx_mult_i14() +static inline void fx_mult_i14() { FX_MULT_I(14); } -static void fx_mult_i15() +static inline void fx_mult_i15() { FX_MULT_I(15); } @@ -2021,73 +2021,73 @@ static void fx_mult_i15() TESTR14; \ CLRFLAGS -static void fx_umult_i0() +static inline void fx_umult_i0() { FX_UMULT_I(0); } -static void fx_umult_i1() +static inline void fx_umult_i1() { FX_UMULT_I(1); } -static void fx_umult_i2() +static inline void fx_umult_i2() { FX_UMULT_I(2); } -static void fx_umult_i3() +static inline void fx_umult_i3() { FX_UMULT_I(3); } -static void fx_umult_i4() +static inline void fx_umult_i4() { FX_UMULT_I(4); } -static void fx_umult_i5() +static inline void fx_umult_i5() { FX_UMULT_I(5); } -static void fx_umult_i6() +static inline void fx_umult_i6() { FX_UMULT_I(6); } -static void fx_umult_i7() +static inline void fx_umult_i7() { FX_UMULT_I(7); } -static void fx_umult_i8() +static inline void fx_umult_i8() { FX_UMULT_I(8); } -static void fx_umult_i9() +static inline void fx_umult_i9() { FX_UMULT_I(9); } -static void fx_umult_i10() +static inline void fx_umult_i10() { FX_UMULT_I(10); } -static void fx_umult_i11() +static inline void fx_umult_i11() { FX_UMULT_I(11); } -static void fx_umult_i12() +static inline void fx_umult_i12() { FX_UMULT_I(12); } -static void fx_umult_i13() +static inline void fx_umult_i13() { FX_UMULT_I(13); } -static void fx_umult_i14() +static inline void fx_umult_i14() { FX_UMULT_I(14); } -static void fx_umult_i15() +static inline void fx_umult_i15() { FX_UMULT_I(15); } /* 90 - sbk - store word to last accessed RAM address */ -static void fx_sbk() +static inline void fx_sbk() { RAM(GSU.vLastRamAdr) = (uint8_t)SREG; RAM(GSU.vLastRamAdr ^ 1) = (uint8_t)(SREG >> 8); @@ -2101,25 +2101,25 @@ static void fx_sbk() CLRFLAGS; \ R15++ -static void fx_link_i1() +static inline void fx_link_i1() { FX_LINK_I(1); } -static void fx_link_i2() +static inline void fx_link_i2() { FX_LINK_I(2); } -static void fx_link_i3() +static inline void fx_link_i3() { FX_LINK_I(3); } -static void fx_link_i4() +static inline void fx_link_i4() { FX_LINK_I(4); } /* 95 - sex - sign extend 8 bit to 16 bit */ -static void fx_sex() +static inline void fx_sex() { uint32_t v = (uint32_t)SEX8(SREG); R15++; @@ -2131,7 +2131,7 @@ static void fx_sex() } /* 96 - asr - aritmetric shift right by one */ -static void fx_asr() +static inline void fx_asr() { uint32_t v; GSU.vCarry = SREG & 1; @@ -2145,7 +2145,7 @@ static void fx_asr() } /* 96(ALT1) - div2 - aritmetric shift right by one */ -static void fx_div2() +static inline void fx_div2() { uint32_t v; int32_t s = SEX16(SREG); @@ -2163,7 +2163,7 @@ static void fx_div2() } /* 97 - ror - rotate right by one */ -static void fx_ror() +static inline void fx_ror() { uint32_t v = (USEX16(SREG) >> 1) | (GSU.vCarry << 15); GSU.vCarry = SREG & 1; @@ -2180,27 +2180,27 @@ static void fx_ror() R15 = GSU.avReg[reg]; \ CLRFLAGS -static void fx_jmp_r8() +static inline void fx_jmp_r8() { FX_JMP(8); } -static void fx_jmp_r9() +static inline void fx_jmp_r9() { FX_JMP(9); } -static void fx_jmp_r10() +static inline void fx_jmp_r10() { FX_JMP(10); } -static void fx_jmp_r11() +static inline void fx_jmp_r11() { FX_JMP(11); } -static void fx_jmp_r12() +static inline void fx_jmp_r12() { FX_JMP(12); } -static void fx_jmp_r13() +static inline void fx_jmp_r13() { FX_JMP(13); } @@ -2214,33 +2214,33 @@ static void fx_jmp_r13() fx_cache(); \ R15-- -static void fx_ljmp_r8() +static inline void fx_ljmp_r8() { FX_LJMP(8); } -static void fx_ljmp_r9() +static inline void fx_ljmp_r9() { FX_LJMP(9); } -static void fx_ljmp_r10() +static inline void fx_ljmp_r10() { FX_LJMP(10); } -static void fx_ljmp_r11() +static inline void fx_ljmp_r11() { FX_LJMP(11); } -static void fx_ljmp_r12() +static inline void fx_ljmp_r12() { FX_LJMP(12); } -static void fx_ljmp_r13() +static inline void fx_ljmp_r13() { FX_LJMP(13); } /* 9e - lob - set upper byte to zero (keep low byte) */ -static void fx_lob() +static inline void fx_lob() { uint32_t v = USEX8(SREG); R15++; @@ -2252,7 +2252,7 @@ static void fx_lob() } /* 9f - fmult - 16 bit to 32 bit signed multiplication, upper 16 bits only */ -static void fx_fmult() +static inline void fx_fmult() { uint32_t v; uint32_t c = (uint32_t)(SEX16(SREG) * SEX16(R6)); @@ -2267,7 +2267,7 @@ static void fx_fmult() } /* 9f(ALT1) - lmult - 16 bit to 32 bit signed multiplication */ -static void fx_lmult() +static inline void fx_lmult() { uint32_t v; uint32_t c = (uint32_t)(SEX16(SREG) * SEX16(R6)); @@ -2292,68 +2292,68 @@ static void fx_lmult() GSU.avReg[reg] = SEX8(v); \ CLRFLAGS -static void fx_ibt_r0() +static inline void fx_ibt_r0() { FX_IBT(0); } -static void fx_ibt_r1() +static inline void fx_ibt_r1() { FX_IBT(1); } -static void fx_ibt_r2() +static inline void fx_ibt_r2() { FX_IBT(2); } -static void fx_ibt_r3() +static inline void fx_ibt_r3() { FX_IBT(3); } -static void fx_ibt_r4() +static inline void fx_ibt_r4() { FX_IBT(4); } -static void fx_ibt_r5() +static inline void fx_ibt_r5() { FX_IBT(5); } -static void fx_ibt_r6() +static inline void fx_ibt_r6() { FX_IBT(6); } -static void fx_ibt_r7() +static inline void fx_ibt_r7() { FX_IBT(7); } -static void fx_ibt_r8() +static inline void fx_ibt_r8() { FX_IBT(8); } -static void fx_ibt_r9() +static inline void fx_ibt_r9() { FX_IBT(9); } -static void fx_ibt_r10() +static inline void fx_ibt_r10() { FX_IBT(10); } -static void fx_ibt_r11() +static inline void fx_ibt_r11() { FX_IBT(11); } -static void fx_ibt_r12() +static inline void fx_ibt_r12() { FX_IBT(12); } -static void fx_ibt_r13() +static inline void fx_ibt_r13() { FX_IBT(13); } -static void fx_ibt_r14() +static inline void fx_ibt_r14() { FX_IBT(14); READR14; } -static void fx_ibt_r15() +static inline void fx_ibt_r15() { FX_IBT(15); } @@ -2368,68 +2368,68 @@ static void fx_ibt_r15() GSU.avReg[reg] |= ((uint32_t) RAM(GSU.vLastRamAdr + 1)) << 8; \ CLRFLAGS -static void fx_lms_r0() +static inline void fx_lms_r0() { FX_LMS(0); } -static void fx_lms_r1() +static inline void fx_lms_r1() { FX_LMS(1); } -static void fx_lms_r2() +static inline void fx_lms_r2() { FX_LMS(2); } -static void fx_lms_r3() +static inline void fx_lms_r3() { FX_LMS(3); } -static void fx_lms_r4() +static inline void fx_lms_r4() { FX_LMS(4); } -static void fx_lms_r5() +static inline void fx_lms_r5() { FX_LMS(5); } -static void fx_lms_r6() +static inline void fx_lms_r6() { FX_LMS(6); } -static void fx_lms_r7() +static inline void fx_lms_r7() { FX_LMS(7); } -static void fx_lms_r8() +static inline void fx_lms_r8() { FX_LMS(8); } -static void fx_lms_r9() +static inline void fx_lms_r9() { FX_LMS(9); } -static void fx_lms_r10() +static inline void fx_lms_r10() { FX_LMS(10); } -static void fx_lms_r11() +static inline void fx_lms_r11() { FX_LMS(11); } -static void fx_lms_r12() +static inline void fx_lms_r12() { FX_LMS(12); } -static void fx_lms_r13() +static inline void fx_lms_r13() { FX_LMS(13); } -static void fx_lms_r14() +static inline void fx_lms_r14() { FX_LMS(14); READR14; } -static void fx_lms_r15() +static inline void fx_lms_r15() { FX_LMS(15); } @@ -2446,67 +2446,67 @@ static void fx_lms_r15() CLRFLAGS; \ R15++ -static void fx_sms_r0() +static inline void fx_sms_r0() { FX_SMS(0); } -static void fx_sms_r1() +static inline void fx_sms_r1() { FX_SMS(1); } -static void fx_sms_r2() +static inline void fx_sms_r2() { FX_SMS(2); } -static void fx_sms_r3() +static inline void fx_sms_r3() { FX_SMS(3); } -static void fx_sms_r4() +static inline void fx_sms_r4() { FX_SMS(4); } -static void fx_sms_r5() +static inline void fx_sms_r5() { FX_SMS(5); } -static void fx_sms_r6() +static inline void fx_sms_r6() { FX_SMS(6); } -static void fx_sms_r7() +static inline void fx_sms_r7() { FX_SMS(7); } -static void fx_sms_r8() +static inline void fx_sms_r8() { FX_SMS(8); } -static void fx_sms_r9() +static inline void fx_sms_r9() { FX_SMS(9); } -static void fx_sms_r10() +static inline void fx_sms_r10() { FX_SMS(10); } -static void fx_sms_r11() +static inline void fx_sms_r11() { FX_SMS(11); } -static void fx_sms_r12() +static inline void fx_sms_r12() { FX_SMS(12); } -static void fx_sms_r13() +static inline void fx_sms_r13() { FX_SMS(13); } -static void fx_sms_r14() +static inline void fx_sms_r14() { FX_SMS(14); } -static void fx_sms_r15() +static inline void fx_sms_r15() { FX_SMS(15); } @@ -2531,73 +2531,73 @@ static void fx_sms_r15() R15++; \ } -static void fx_from_r0() +static inline void fx_from_r0() { FX_FROM(0); } -static void fx_from_r1() +static inline void fx_from_r1() { FX_FROM(1); } -static void fx_from_r2() +static inline void fx_from_r2() { FX_FROM(2); } -static void fx_from_r3() +static inline void fx_from_r3() { FX_FROM(3); } -static void fx_from_r4() +static inline void fx_from_r4() { FX_FROM(4); } -static void fx_from_r5() +static inline void fx_from_r5() { FX_FROM(5); } -static void fx_from_r6() +static inline void fx_from_r6() { FX_FROM(6); } -static void fx_from_r7() +static inline void fx_from_r7() { FX_FROM(7); } -static void fx_from_r8() +static inline void fx_from_r8() { FX_FROM(8); } -static void fx_from_r9() +static inline void fx_from_r9() { FX_FROM(9); } -static void fx_from_r10() +static inline void fx_from_r10() { FX_FROM(10); } -static void fx_from_r11() +static inline void fx_from_r11() { FX_FROM(11); } -static void fx_from_r12() +static inline void fx_from_r12() { FX_FROM(12); } -static void fx_from_r13() +static inline void fx_from_r13() { FX_FROM(13); } -static void fx_from_r14() +static inline void fx_from_r14() { FX_FROM(14); } -static void fx_from_r15() +static inline void fx_from_r15() { FX_FROM(15); } /* c0 - hib - move high-byte to low-byte */ -static void fx_hib() +static inline void fx_hib() { uint32_t v = USEX8(SREG >> 8); R15++; @@ -2618,63 +2618,63 @@ static void fx_hib() TESTR14; \ CLRFLAGS -static void fx_or_r1() +static inline void fx_or_r1() { FX_OR(1); } -static void fx_or_r2() +static inline void fx_or_r2() { FX_OR(2); } -static void fx_or_r3() +static inline void fx_or_r3() { FX_OR(3); } -static void fx_or_r4() +static inline void fx_or_r4() { FX_OR(4); } -static void fx_or_r5() +static inline void fx_or_r5() { FX_OR(5); } -static void fx_or_r6() +static inline void fx_or_r6() { FX_OR(6); } -static void fx_or_r7() +static inline void fx_or_r7() { FX_OR(7); } -static void fx_or_r8() +static inline void fx_or_r8() { FX_OR(8); } -static void fx_or_r9() +static inline void fx_or_r9() { FX_OR(9); } -static void fx_or_r10() +static inline void fx_or_r10() { FX_OR(10); } -static void fx_or_r11() +static inline void fx_or_r11() { FX_OR(11); } -static void fx_or_r12() +static inline void fx_or_r12() { FX_OR(12); } -static void fx_or_r13() +static inline void fx_or_r13() { FX_OR(13); } -static void fx_or_r14() +static inline void fx_or_r14() { FX_OR(14); } -static void fx_or_r15() +static inline void fx_or_r15() { FX_OR(15); } @@ -2689,63 +2689,63 @@ static void fx_or_r15() TESTR14; \ CLRFLAGS -static void fx_xor_r1() +static inline void fx_xor_r1() { FX_XOR(1); } -static void fx_xor_r2() +static inline void fx_xor_r2() { FX_XOR(2); } -static void fx_xor_r3() +static inline void fx_xor_r3() { FX_XOR(3); } -static void fx_xor_r4() +static inline void fx_xor_r4() { FX_XOR(4); } -static void fx_xor_r5() +static inline void fx_xor_r5() { FX_XOR(5); } -static void fx_xor_r6() +static inline void fx_xor_r6() { FX_XOR(6); } -static void fx_xor_r7() +static inline void fx_xor_r7() { FX_XOR(7); } -static void fx_xor_r8() +static inline void fx_xor_r8() { FX_XOR(8); } -static void fx_xor_r9() +static inline void fx_xor_r9() { FX_XOR(9); } -static void fx_xor_r10() +static inline void fx_xor_r10() { FX_XOR(10); } -static void fx_xor_r11() +static inline void fx_xor_r11() { FX_XOR(11); } -static void fx_xor_r12() +static inline void fx_xor_r12() { FX_XOR(12); } -static void fx_xor_r13() +static inline void fx_xor_r13() { FX_XOR(13); } -static void fx_xor_r14() +static inline void fx_xor_r14() { FX_XOR(14); } -static void fx_xor_r15() +static inline void fx_xor_r15() { FX_XOR(15); } @@ -2760,63 +2760,63 @@ static void fx_xor_r15() TESTR14; \ CLRFLAGS -static void fx_or_i1() +static inline void fx_or_i1() { FX_OR_I(1); } -static void fx_or_i2() +static inline void fx_or_i2() { FX_OR_I(2); } -static void fx_or_i3() +static inline void fx_or_i3() { FX_OR_I(3); } -static void fx_or_i4() +static inline void fx_or_i4() { FX_OR_I(4); } -static void fx_or_i5() +static inline void fx_or_i5() { FX_OR_I(5); } -static void fx_or_i6() +static inline void fx_or_i6() { FX_OR_I(6); } -static void fx_or_i7() +static inline void fx_or_i7() { FX_OR_I(7); } -static void fx_or_i8() +static inline void fx_or_i8() { FX_OR_I(8); } -static void fx_or_i9() +static inline void fx_or_i9() { FX_OR_I(9); } -static void fx_or_i10() +static inline void fx_or_i10() { FX_OR_I(10); } -static void fx_or_i11() +static inline void fx_or_i11() { FX_OR_I(11); } -static void fx_or_i12() +static inline void fx_or_i12() { FX_OR_I(12); } -static void fx_or_i13() +static inline void fx_or_i13() { FX_OR_I(13); } -static void fx_or_i14() +static inline void fx_or_i14() { FX_OR_I(14); } -static void fx_or_i15() +static inline void fx_or_i15() { FX_OR_I(15); } @@ -2831,63 +2831,63 @@ static void fx_or_i15() TESTR14; \ CLRFLAGS -static void fx_xor_i1() +static inline void fx_xor_i1() { FX_XOR_I(1); } -static void fx_xor_i2() +static inline void fx_xor_i2() { FX_XOR_I(2); } -static void fx_xor_i3() +static inline void fx_xor_i3() { FX_XOR_I(3); } -static void fx_xor_i4() +static inline void fx_xor_i4() { FX_XOR_I(4); } -static void fx_xor_i5() +static inline void fx_xor_i5() { FX_XOR_I(5); } -static void fx_xor_i6() +static inline void fx_xor_i6() { FX_XOR_I(6); } -static void fx_xor_i7() +static inline void fx_xor_i7() { FX_XOR_I(7); } -static void fx_xor_i8() +static inline void fx_xor_i8() { FX_XOR_I(8); } -static void fx_xor_i9() +static inline void fx_xor_i9() { FX_XOR_I(9); } -static void fx_xor_i10() +static inline void fx_xor_i10() { FX_XOR_I(10); } -static void fx_xor_i11() +static inline void fx_xor_i11() { FX_XOR_I(11); } -static void fx_xor_i12() +static inline void fx_xor_i12() { FX_XOR_I(12); } -static void fx_xor_i13() +static inline void fx_xor_i13() { FX_XOR_I(13); } -static void fx_xor_i14() +static inline void fx_xor_i14() { FX_XOR_I(14); } -static void fx_xor_i15() +static inline void fx_xor_i15() { FX_XOR_I(15); } @@ -2900,70 +2900,70 @@ static void fx_xor_i15() CLRFLAGS; \ R15++ -static void fx_inc_r0() +static inline void fx_inc_r0() { FX_INC(0); } -static void fx_inc_r1() +static inline void fx_inc_r1() { FX_INC(1); } -static void fx_inc_r2() +static inline void fx_inc_r2() { FX_INC(2); } -static void fx_inc_r3() +static inline void fx_inc_r3() { FX_INC(3); } -static void fx_inc_r4() +static inline void fx_inc_r4() { FX_INC(4); } -static void fx_inc_r5() +static inline void fx_inc_r5() { FX_INC(5); } -static void fx_inc_r6() +static inline void fx_inc_r6() { FX_INC(6); } -static void fx_inc_r7() +static inline void fx_inc_r7() { FX_INC(7); } -static void fx_inc_r8() +static inline void fx_inc_r8() { FX_INC(8); } -static void fx_inc_r9() +static inline void fx_inc_r9() { FX_INC(9); } -static void fx_inc_r10() +static inline void fx_inc_r10() { FX_INC(10); } -static void fx_inc_r11() +static inline void fx_inc_r11() { FX_INC(11); } -static void fx_inc_r12() +static inline void fx_inc_r12() { FX_INC(12); } -static void fx_inc_r13() +static inline void fx_inc_r13() { FX_INC(13); } -static void fx_inc_r14() +static inline void fx_inc_r14() { FX_INC(14); READR14; } /* df - getc - transfer ROM buffer to color register */ -static void fx_getc() +static inline void fx_getc() { #ifndef FX_DO_ROMBUFFER uint8_t c; @@ -2985,7 +2985,7 @@ static void fx_getc() } /* df(ALT2) - ramb - set current RAM bank */ -static void fx_ramb() +static inline void fx_ramb() { GSU.vRamBankReg = SREG & (FX_RAM_BANKS - 1); GSU.pvRamBank = GSU.apvRamBank[GSU.vRamBankReg & 0x3]; @@ -2994,7 +2994,7 @@ static void fx_ramb() } /* df(ALT3) - romb - set current ROM bank */ -static void fx_romb() +static inline void fx_romb() { GSU.vRomBankReg = USEX8(SREG) & 0x7f; GSU.pvRomBank = GSU.apvRomBank[GSU.vRomBankReg]; @@ -3010,70 +3010,70 @@ static void fx_romb() CLRFLAGS; \ R15++ -static void fx_dec_r0() +static inline void fx_dec_r0() { FX_DEC(0); } -static void fx_dec_r1() +static inline void fx_dec_r1() { FX_DEC(1); } -static void fx_dec_r2() +static inline void fx_dec_r2() { FX_DEC(2); } -static void fx_dec_r3() +static inline void fx_dec_r3() { FX_DEC(3); } -static void fx_dec_r4() +static inline void fx_dec_r4() { FX_DEC(4); } -static void fx_dec_r5() +static inline void fx_dec_r5() { FX_DEC(5); } -static void fx_dec_r6() +static inline void fx_dec_r6() { FX_DEC(6); } -static void fx_dec_r7() +static inline void fx_dec_r7() { FX_DEC(7); } -static void fx_dec_r8() +static inline void fx_dec_r8() { FX_DEC(8); } -static void fx_dec_r9() +static inline void fx_dec_r9() { FX_DEC(9); } -static void fx_dec_r10() +static inline void fx_dec_r10() { FX_DEC(10); } -static void fx_dec_r11() +static inline void fx_dec_r11() { FX_DEC(11); } -static void fx_dec_r12() +static inline void fx_dec_r12() { FX_DEC(12); } -static void fx_dec_r13() +static inline void fx_dec_r13() { FX_DEC(13); } -static void fx_dec_r14() +static inline void fx_dec_r14() { FX_DEC(14); READR14; } /* ef - getb - get byte from ROM at address R14 */ -static void fx_getb() +static inline void fx_getb() { uint32_t v; #ifndef FX_DO_ROMBUFFER @@ -3088,7 +3088,7 @@ static void fx_getb() } /* ef(ALT1) - getbh - get high-byte from ROM at address R14 */ -static void fx_getbh() +static inline void fx_getbh() { uint32_t v; #ifndef FX_DO_ROMBUFFER @@ -3105,7 +3105,7 @@ static void fx_getbh() } /* ef(ALT2) - getbl - get low-byte from ROM at address R14 */ -static void fx_getbl() +static inline void fx_getbl() { uint32_t v; #ifndef FX_DO_ROMBUFFER @@ -3121,7 +3121,7 @@ static void fx_getbl() } /* ef(ALT3) - getbs - get sign extended byte from ROM at address R14 */ -static void fx_getbs() +static inline void fx_getbs() { uint32_t v; #ifndef FX_DO_ROMBUFFER @@ -3149,68 +3149,68 @@ static void fx_getbs() GSU.avReg[reg] = v; \ CLRFLAGS -static void fx_iwt_r0() +static inline void fx_iwt_r0() { FX_IWT(0); } -static void fx_iwt_r1() +static inline void fx_iwt_r1() { FX_IWT(1); } -static void fx_iwt_r2() +static inline void fx_iwt_r2() { FX_IWT(2); } -static void fx_iwt_r3() +static inline void fx_iwt_r3() { FX_IWT(3); } -static void fx_iwt_r4() +static inline void fx_iwt_r4() { FX_IWT(4); } -static void fx_iwt_r5() +static inline void fx_iwt_r5() { FX_IWT(5); } -static void fx_iwt_r6() +static inline void fx_iwt_r6() { FX_IWT(6); } -static void fx_iwt_r7() +static inline void fx_iwt_r7() { FX_IWT(7); } -static void fx_iwt_r8() +static inline void fx_iwt_r8() { FX_IWT(8); } -static void fx_iwt_r9() +static inline void fx_iwt_r9() { FX_IWT(9); } -static void fx_iwt_r10() +static inline void fx_iwt_r10() { FX_IWT(10); } -static void fx_iwt_r11() +static inline void fx_iwt_r11() { FX_IWT(11); } -static void fx_iwt_r12() +static inline void fx_iwt_r12() { FX_IWT(12); } -static void fx_iwt_r13() +static inline void fx_iwt_r13() { FX_IWT(13); } -static void fx_iwt_r14() +static inline void fx_iwt_r14() { FX_IWT(14); READR14; } -static void fx_iwt_r15() +static inline void fx_iwt_r15() { FX_IWT(15); } @@ -3228,68 +3228,68 @@ static void fx_iwt_r15() GSU.avReg[reg] |= USEX8(RAM(GSU.vLastRamAdr ^ 1)) << 8; \ CLRFLAGS -static void fx_lm_r0() +static inline void fx_lm_r0() { FX_LM(0); } -static void fx_lm_r1() +static inline void fx_lm_r1() { FX_LM(1); } -static void fx_lm_r2() +static inline void fx_lm_r2() { FX_LM(2); } -static void fx_lm_r3() +static inline void fx_lm_r3() { FX_LM(3); } -static void fx_lm_r4() +static inline void fx_lm_r4() { FX_LM(4); } -static void fx_lm_r5() +static inline void fx_lm_r5() { FX_LM(5); } -static void fx_lm_r6() +static inline void fx_lm_r6() { FX_LM(6); } -static void fx_lm_r7() +static inline void fx_lm_r7() { FX_LM(7); } -static void fx_lm_r8() +static inline void fx_lm_r8() { FX_LM(8); } -static void fx_lm_r9() +static inline void fx_lm_r9() { FX_LM(9); } -static void fx_lm_r10() +static inline void fx_lm_r10() { FX_LM(10); } -static void fx_lm_r11() +static inline void fx_lm_r11() { FX_LM(11); } -static void fx_lm_r12() +static inline void fx_lm_r12() { FX_LM(12); } -static void fx_lm_r13() +static inline void fx_lm_r13() { FX_LM(13); } -static void fx_lm_r14() +static inline void fx_lm_r14() { FX_LM(14); READR14; } -static void fx_lm_r15() +static inline void fx_lm_r15() { FX_LM(15); } @@ -3309,67 +3309,67 @@ static void fx_lm_r15() CLRFLAGS; \ R15++ -static void fx_sm_r0() +static inline void fx_sm_r0() { FX_SM(0); } -static void fx_sm_r1() +static inline void fx_sm_r1() { FX_SM(1); } -static void fx_sm_r2() +static inline void fx_sm_r2() { FX_SM(2); } -static void fx_sm_r3() +static inline void fx_sm_r3() { FX_SM(3); } -static void fx_sm_r4() +static inline void fx_sm_r4() { FX_SM(4); } -static void fx_sm_r5() +static inline void fx_sm_r5() { FX_SM(5); } -static void fx_sm_r6() +static inline void fx_sm_r6() { FX_SM(6); } -static void fx_sm_r7() +static inline void fx_sm_r7() { FX_SM(7); } -static void fx_sm_r8() +static inline void fx_sm_r8() { FX_SM(8); } -static void fx_sm_r9() +static inline void fx_sm_r9() { FX_SM(9); } -static void fx_sm_r10() +static inline void fx_sm_r10() { FX_SM(10); } -static void fx_sm_r11() +static inline void fx_sm_r11() { FX_SM(11); } -static void fx_sm_r12() +static inline void fx_sm_r12() { FX_SM(12); } -static void fx_sm_r13() +static inline void fx_sm_r13() { FX_SM(13); } -static void fx_sm_r14() +static inline void fx_sm_r14() { FX_SM(14); } -static void fx_sm_r15() +static inline void fx_sm_r15() { FX_SM(15); } @@ -3388,8 +3388,8 @@ uint32_t fx_run(uint32_t nInstructions) /*** Special table for the different plot configurations ***/ void (*fx_apfPlotTable[])() = { - &fx_plot_2bit, &fx_plot_4bit, &fx_plot_4bit, &fx_plot_8bit, &fx_obj_func, - &fx_rpix_2bit, &fx_rpix_4bit, &fx_rpix_4bit, &fx_rpix_8bit, &fx_obj_func, + &fx_plot_2bit, &fx_plot_4bit, &fx_plot_4bit, &fx_plot_8bit, &fx_obj_func, + &fx_rpix_2bit, &fx_rpix_4bit, &fx_rpix_4bit, &fx_rpix_8bit, &fx_obj_func, }; /*** Opcode table ***/ diff --git a/source/fxinst.h b/source/fxinst.h index 657d7d2..e63c68c 100644 --- a/source/fxinst.h +++ b/source/fxinst.h @@ -124,71 +124,65 @@ /* Number of banks in GSU RAM */ #define FX_RAM_BANKS 4 -struct FxRegs_s +typedef struct { /* FxChip registers */ - uint32_t avReg[16]; /* 16 Generic registers */ - uint32_t vColorReg; /* Internal color register */ - uint32_t vPlotOptionReg; /* Plot option register */ - uint32_t vStatusReg; /* Status register */ - uint32_t vPrgBankReg; /* Program bank index register */ - uint32_t vRomBankReg; /* Rom bank index register */ - uint32_t vRamBankReg; /* Ram bank index register */ - uint32_t vCacheBaseReg; /* Cache base address register */ - uint32_t vCacheFlags; /* Saying what parts of the cache was written to */ - uint32_t vLastRamAdr; /* Last RAM address accessed */ - uint32_t* pvDreg; /* Pointer to current destination register */ - uint32_t* pvSreg; /* Pointer to current source register */ - uint8_t vRomBuffer; /* Current byte read by R14 */ - uint8_t vPipe; /* Instructionset pipe */ - uint32_t vPipeAdr; /* The address of where the pipe was read from */ + uint32_t avReg[16]; /* 16 Generic registers */ + uint32_t vColorReg; /* Internal color register */ + uint32_t vPlotOptionReg; /* Plot option register */ + uint32_t vStatusReg; /* Status register */ + uint32_t vPrgBankReg; /* Program bank index register */ + uint32_t vRomBankReg; /* Rom bank index register */ + uint32_t vRamBankReg; /* Ram bank index register */ + uint32_t vCacheBaseReg; /* Cache base address register */ + uint32_t vCacheFlags; /* Saying what parts of the cache was written to */ + uint32_t vLastRamAdr; /* Last RAM address accessed */ + uint32_t* pvDreg; /* Pointer to current destination register */ + uint32_t* pvSreg; /* Pointer to current source register */ + uint8_t vRomBuffer; /* Current byte read by R14 */ + uint8_t vPipe; /* Instructionset pipe */ + uint32_t vPipeAdr; /* The address of where the pipe was read from */ /* status register optimization stuff */ - uint32_t vSign; /* v & 0x8000 */ - uint32_t vZero; /* v == 0 */ - uint32_t vCarry; /* a value of 1 or 0 */ - int32_t vOverflow; /* (v >= 0x8000 || v < -0x8000) */ + uint32_t vSign; /* v & 0x8000 */ + uint32_t vZero; /* v == 0 */ + uint32_t vCarry; /* a value of 1 or 0 */ + int32_t vOverflow; /* (v >= 0x8000 || v < -0x8000) */ /* Other emulator variables */ - int32_t vErrorCode; - uint32_t vIllegalAddress; - - uint8_t bBreakPoint; - uint32_t vBreakPoint; - uint32_t vStepPoint; - - uint8_t* pvRegisters; /* 768 bytes located in the memory at address 0x3000 */ - uint32_t nRamBanks; /* Number of 64kb-banks in FxRam (Don't confuse it with SNES-Ram!!!) */ - uint8_t* pvRam; /* Pointer to FxRam */ - uint32_t nRomBanks; /* Number of 32kb-banks in Cart-ROM */ - uint8_t* pvRom; /* Pointer to Cart-ROM */ - - uint32_t vMode; /* Color depth/mode */ - uint32_t vPrevMode; /* Previous depth */ - uint8_t* pvScreenBase; - uint8_t* apvScreen[32]; /* Pointer to each of the 32 screen colums */ - int32_t x[32]; - uint32_t vScreenHeight; /* 128, 160, 192 or 256 (could be overriden by cmode) */ - uint32_t vScreenRealHeight; /* 128, 160, 192 or 256 */ - uint32_t vPrevScreenHeight; - uint32_t vScreenSize; - void (*pfPlot)(); - void (*pfRpix)(); - - uint8_t* pvRamBank; /* Pointer to current RAM-bank */ - uint8_t* pvRomBank; /* Pointer to current ROM-bank */ - uint8_t* pvPrgBank; /* Pointer to current program ROM-bank */ - - uint8_t* apvRamBank[FX_RAM_BANKS]; /* Ram bank table (max 256kb) */ - uint8_t* apvRomBank[256]; /* Rom bank table */ - - uint8_t bCacheActive; - uint8_t* pvCache; /* Pointer to the GSU cache */ - uint8_t avCacheBackup[512]; /* Backup of ROM when the cache has replaced it */ - uint32_t vCounter; - uint32_t vInstCount; - uint32_t vSCBRDirty; /* if SCBR is written, our cached screen pointers need updating */ -}; + int32_t vErrorCode; + uint32_t vIllegalAddress; + uint8_t bBreakPoint; + uint32_t vBreakPoint; + uint32_t vStepPoint; + uint8_t* pvRegisters; /* 768 bytes located in the memory at address 0x3000 */ + uint32_t nRamBanks; /* Number of 64kb-banks in FxRam (Don't confuse it with SNES-Ram!!!) */ + uint8_t* pvRam; /* Pointer to FxRam */ + uint32_t nRomBanks; /* Number of 32kb-banks in Cart-ROM */ + uint8_t* pvRom; /* Pointer to Cart-ROM */ + uint32_t vMode; /* Color depth/mode */ + uint32_t vPrevMode; /* Previous depth */ + uint8_t* pvScreenBase; + uint8_t* apvScreen[32]; /* Pointer to each of the 32 screen colums */ + int32_t x[32]; + uint32_t vScreenHeight; /* 128, 160, 192 or 256 (could be overriden by cmode) */ + uint32_t vScreenRealHeight; /* 128, 160, 192 or 256 */ + uint32_t vPrevScreenHeight; + uint32_t vScreenSize; + void (*pfPlot)(); + void (*pfRpix)(); + uint8_t* pvRamBank; /* Pointer to current RAM-bank */ + uint8_t* pvRomBank; /* Pointer to current ROM-bank */ + uint8_t* pvPrgBank; /* Pointer to current program ROM-bank */ + uint8_t* apvRamBank[FX_RAM_BANKS]; /* Ram bank table (max 256kb) */ + uint8_t* apvRomBank[256]; /* Rom bank table */ + uint8_t bCacheActive; + uint8_t* pvCache; /* Pointer to the GSU cache */ + uint8_t avCacheBackup[512]; /* Backup of ROM when the cache has replaced it */ + uint32_t vCounter; + uint32_t vInstCount; + uint32_t vSCBRDirty; /* if SCBR is written, our cached screen pointers need updating */ +} FxRegs_s; /* GSU registers */ #define GSU_R0 0x000 diff --git a/source/getset.h b/source/getset.h index 4155f75..ebf996f 100644 --- a/source/getset.h +++ b/source/getset.h @@ -13,7 +13,7 @@ extern uint8_t OpenBus; -INLINE uint8_t S9xGetByte(uint32_t Address) +inline uint8_t S9xGetByte(uint32_t Address) { int32_t block; uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK]; @@ -23,10 +23,8 @@ INLINE uint8_t S9xGetByte(uint32_t Address) if (GetAddress >= (uint8_t*) MAP_LAST) { -#ifdef CPU_SHUTDOWN if (Memory.BlockIsRAM [block]) CPU.WaitAddress = CPU.PCAtOpcodeStart; -#endif return (*(GetAddress + (Address & 0xffff))); } @@ -67,7 +65,7 @@ INLINE uint8_t S9xGetByte(uint32_t Address) } } -INLINE uint16_t S9xGetWord(uint32_t Address) +inline uint16_t S9xGetWord(uint32_t Address) { if ((Address & 0x0fff) == 0x0fff) { @@ -82,10 +80,8 @@ INLINE uint16_t S9xGetWord(uint32_t Address) if (GetAddress >= (uint8_t*) MAP_LAST) { -#ifdef CPU_SHUTDOWN if (Memory.BlockIsRAM [block]) CPU.WaitAddress = CPU.PCAtOpcodeStart; -#endif #ifdef FAST_LSB_WORD_ACCESS return (*(uint16_t*)(GetAddress + (Address & 0xffff))); #else @@ -145,11 +141,9 @@ INLINE uint16_t S9xGetWord(uint32_t Address) } } -INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) +inline void S9xSetByte(uint8_t Byte, uint32_t Address) { -#if defined(CPU_SHUTDOWN) CPU.WaitAddress = NULL; -#endif int32_t block; uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)]; @@ -158,7 +152,6 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) if (SetAddress >= (uint8_t*) MAP_LAST) { -#ifdef CPU_SHUTDOWN SetAddress += Address & 0xffff; if (SetAddress == SA1.WaitByteAddress1 || SetAddress == SA1.WaitByteAddress2) @@ -167,9 +160,6 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) SA1.WaitCounter = 0; } *SetAddress = Byte; -#else - *(SetAddress + (Address & 0xffff)) = Byte; -#endif return; } @@ -226,7 +216,7 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) } } -INLINE void S9xSetWord(uint16_t Word, uint32_t Address) +inline void S9xSetWord(uint16_t Word, uint32_t Address) { if ((Address & 0x0FFF) == 0x0FFF) { @@ -235,9 +225,7 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) return; } -#if defined(CPU_SHUTDOWN) CPU.WaitAddress = NULL; -#endif int32_t block; uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)]; @@ -246,7 +234,6 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) if (SetAddress >= (uint8_t*) MAP_LAST) { -#ifdef CPU_SHUTDOWN SetAddress += Address & 0xffff; if (SetAddress == SA1.WaitByteAddress1 || SetAddress == SA1.WaitByteAddress2) @@ -260,14 +247,6 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) *SetAddress = (uint8_t) Word; *(SetAddress + 1) = Word >> 8; #endif -#else -#ifdef FAST_LSB_WORD_ACCESS - *(uint16_t*)(SetAddress + (Address & 0xffff)) = Word; -#else - *(SetAddress + (Address & 0xffff)) = (uint8_t) Word; - *(SetAddress + ((Address + 1) & 0xffff)) = Word >> 8; -#endif -#endif return; } @@ -348,7 +327,7 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) } } -INLINE uint8_t* GetBasePointer(uint32_t Address) +inline uint8_t* GetBasePointer(uint32_t Address) { uint8_t* GetAddress = Memory.Map [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK]; if (GetAddress >= (uint8_t*) MAP_LAST) @@ -382,7 +361,7 @@ INLINE uint8_t* GetBasePointer(uint32_t Address) } } -INLINE uint8_t* S9xGetMemPointer(uint32_t Address) +inline uint8_t* S9xGetMemPointer(uint32_t Address) { uint8_t* GetAddress = Memory.Map [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK]; if (GetAddress >= (uint8_t*) MAP_LAST) @@ -419,7 +398,7 @@ INLINE uint8_t* S9xGetMemPointer(uint32_t Address) } } -INLINE void S9xSetPCBase(uint32_t Address) +inline void S9xSetPCBase(uint32_t Address) { int32_t block; uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK]; diff --git a/source/gfx.c b/source/gfx.c index 4b88295..5694be6 100644 --- a/source/gfx.c +++ b/source/gfx.c @@ -29,8 +29,8 @@ extern LargePixelRenderer DrawLargePixelPtr; extern SBG BG; -extern struct SLineData LineData[240]; -extern struct SLineMatrixData LineMatrixData [240]; +extern SLineData LineData[240]; +extern SLineMatrixData LineMatrixData [240]; extern uint8_t Mode7Depths [2]; @@ -38,8 +38,7 @@ extern uint8_t Mode7Depths [2]; ((a) & ((1 << 10) - 1)) + (((((a) & (1 << 13)) ^ (1 << 13)) - (1 << 13)) >> 3) #define ON_MAIN(N) \ -(GFX.r212c & (1 << (N)) && \ - !(PPU.BG_Forced & (1 << (N)))) +(GFX.r212c & (1 << (N))) #define SUB_OR_ADD(N) \ (GFX.r2131 & (1 << (N))) @@ -47,8 +46,7 @@ extern uint8_t Mode7Depths [2]; #define ON_SUB(N) \ ((GFX.r2130 & 0x30) != 0x30 && \ (GFX.r2130 & 2) && \ - (GFX.r212d & (1 << N)) && \ - !(PPU.BG_Forced & (1 << (N)))) + (GFX.r212d & (1 << N))) #define ANYTHING_ON_SUB \ ((GFX.r2130 & 0x30) != 0x30 && \ @@ -61,6 +59,7 @@ extern uint8_t Mode7Depths [2]; #define FIX_INTERLACE(SCREEN, DO_DEPTH, DEPTH) \ uint32_t y; \ if (IPPU.DoubleHeightPixels && ((PPU.BGMode != 5 && PPU.BGMode != 6) || !IPPU.Interlace)) \ + { \ for (y = GFX.StartY; y <= GFX.EndY; y++) \ { \ /* memmove converted: Same malloc, non-overlapping addresses [Neb] */ \ @@ -73,7 +72,8 @@ extern uint8_t Mode7Depths [2]; DEPTH + y * GFX.PPL, \ GFX.PPLx2>>1); \ } \ - } + } \ + } #define BLACK BUILD_PIXEL(0,0,0) @@ -266,7 +266,6 @@ bool S9xInitGFX() GFX.Delta = (GFX.SubScreen - GFX.Screen) >> 1; GFX.DepthDelta = GFX.SubZBuffer - GFX.ZBuffer; - PPU.BG_Forced = 0; IPPU.OBJChanged = true; IPPU.DirectColourMapsNeedRebuild = true; @@ -274,16 +273,8 @@ bool S9xInitGFX() DrawTilePtr = DrawTile16; DrawClippedTilePtr = DrawClippedTile16; DrawLargePixelPtr = DrawLargePixel16; - if (Settings.SupportHiRes) - { - DrawHiResTilePtr = DrawTile16; - DrawHiResClippedTilePtr = DrawClippedTile16; - } - else - { - DrawHiResTilePtr = DrawTile16HalfWidth; - DrawHiResClippedTilePtr = DrawClippedTile16HalfWidth; - } + DrawHiResTilePtr = DrawTile16; + DrawHiResClippedTilePtr = DrawClippedTile16; GFX.PPL = GFX.Pitch >> 1; GFX.PPLx2 = GFX.Pitch; S9xFixColourBrightness(); @@ -437,9 +428,6 @@ void S9xBuildDirectColourMaps() void S9xStartScreenRefresh() { - if (GFX.InfoStringTimeout > 0 && --GFX.InfoStringTimeout == 0) - GFX.InfoString = NULL; - if (IPPU.RenderThisFrame) { if (!S9xInitUpdate()) @@ -448,14 +436,11 @@ void S9xStartScreenRefresh() return; } - IPPU.RenderedFramesCount++; IPPU.PreviousLine = IPPU.CurrentLine = 0; - IPPU.MaxBrightness = PPU.Brightness; - IPPU.LatchedBlanking = PPU.ForcedBlanking; if (PPU.BGMode == 5 || PPU.BGMode == 6) IPPU.Interlace = (Memory.FillRAM[0x2133] & 1); - if (Settings.SupportHiRes && (PPU.BGMode == 5 || PPU.BGMode == 6 || IPPU.Interlace)) + if (PPU.BGMode == 5 || PPU.BGMode == 6 || IPPU.Interlace) { IPPU.RenderedScreenWidth = 512; IPPU.DoubleWidthPixels = true; @@ -478,14 +463,6 @@ void S9xStartScreenRefresh() GFX.PPLx2 = GFX.PPL << 1; } } - else if (!Settings.SupportHiRes && (PPU.BGMode == 5 || PPU.BGMode == 6 || IPPU.Interlace)) - { - IPPU.RenderedScreenWidth = 256; - IPPU.DoubleWidthPixels = false; - // Secret of Mana displays menus with mode 5. - // Make them readable. - IPPU.HalfWidthPixels = true; - } else { IPPU.RenderedScreenWidth = 256; @@ -507,11 +484,7 @@ void S9xStartScreenRefresh() } if (++IPPU.FrameCount % Memory.ROMFramesPerSecond == 0) - { - IPPU.DisplayedRenderedFrameCount = IPPU.RenderedFramesCount; - IPPU.RenderedFramesCount = 0; IPPU.FrameCount = 0; - } } void RenderLine(uint8_t C) @@ -525,7 +498,7 @@ void RenderLine(uint8_t C) if (PPU.BGMode == 7) { - struct SLineMatrixData* p = &LineMatrixData [C]; + SLineMatrixData* p = &LineMatrixData [C]; p->MatrixA = PPU.MatrixA; p->MatrixB = PPU.MatrixB; p->MatrixC = PPU.MatrixC; @@ -555,14 +528,14 @@ void RenderLine(uint8_t C) { /* if we're not rendering this frame, we still need to update this */ // XXX: Check ForceBlank? Or anything else? - if (IPPU.OBJChanged) S9xSetupOBJ(); + if (IPPU.OBJChanged) + S9xSetupOBJ(); PPU.RangeTimeOver |= GFX.OBJLines[C].RTOFlags; } } void S9xEndScreenRefresh() { - IPPU.HDMAStarted = false; if (IPPU.RenderThisFrame) { FLUSH_REDRAW(); @@ -577,20 +550,12 @@ void S9xEndScreenRefresh() GFX.PPL = GFX.PPLx2 >> 1; } -#ifdef WANT_CHEATS S9xApplyCheats(); -#endif if (CPU.SRAMModified) CPU.SRAMModified = false; } -void S9xSetInfoString(const char* string) -{ - GFX.InfoString = string; - GFX.InfoStringTimeout = 120; -} - static inline void SelectTileRenderer(bool normal) { if (normal) @@ -698,12 +663,6 @@ void S9xSetupOBJ() LargeWidth = LargeHeight = 32; break; } - if (IPPU.InterlaceSprites) - { - SmallHeight >>= 1; - LargeHeight >>= 1; - } - /* OK, we have three cases here. Either there's no priority, priority is * normal FirstSprite, or priority is FirstSprite+Y. The first two are * easy, the last is somewhat more ... interesting. So we split them up. */ @@ -892,7 +851,7 @@ static void DrawOBJS(bool OnMain, uint8_t D) struct { uint16_t Pos; - bool Value; + bool Value; } Windows[7]; int32_t clipcount = GFX.pCurrentClip->Count [4]; @@ -938,46 +897,31 @@ static void DrawOBJS(bool OnMain, uint8_t D) } } - if (Settings.SupportHiRes) + if (PPU.BGMode == 5 || PPU.BGMode == 6) { - if (PPU.BGMode == 5 || PPU.BGMode == 6) + // Bah, OnMain is never used except to determine if calling + // SelectTileRenderer is necessary. So let's hack it to false here + // to stop SelectTileRenderer from being called when it causes + // problems. + OnMain = false; + GFX.PixSize = 2; + if (IPPU.DoubleHeightPixels) { - // Bah, OnMain is never used except to determine if calling - // SelectTileRenderer is necessary. So let's hack it to false here - // to stop SelectTileRenderer from being called when it causes - // problems. - OnMain = false; - GFX.PixSize = 2; - if (IPPU.DoubleHeightPixels) - { - DrawTilePtr = DrawTile16x2x2; - DrawClippedTilePtr = DrawClippedTile16x2x2; - } - else - { - DrawTilePtr = DrawTile16x2; - DrawClippedTilePtr = DrawClippedTile16x2; - } + DrawTilePtr = DrawTile16x2x2; + DrawClippedTilePtr = DrawClippedTile16x2x2; } else { - DrawTilePtr = DrawTile16; - DrawClippedTilePtr = DrawClippedTile16; + DrawTilePtr = DrawTile16x2; + DrawClippedTilePtr = DrawClippedTile16x2; } } - else // if (!Settings.SupportHiRes) + else { - if (PPU.BGMode == 5 || PPU.BGMode == 6) - { - // Bah, OnMain is never used except to determine if calling - // SelectTileRenderer is necessary. So let's hack it to false here - // to stop SelectTileRenderer from being called when it causes - // problems. - OnMain = false; - } DrawTilePtr = DrawTile16; DrawClippedTilePtr = DrawClippedTile16; } + GFX.Z1 = D + 2; uint32_t Y, Offset; @@ -1941,8 +1885,6 @@ static void DrawBackground(uint32_t BGMode, uint32_t bg, uint8_t Z1, uint8_t Z2) case 5: case 6: // XXX: is also offset per tile. - if (!Settings.SupportHiRes) - SelectTileRenderer(true /* normal */); DrawBackgroundMode5(bg, Z1, Z2); return; } @@ -2291,7 +2233,7 @@ static void DrawBackground(uint32_t BGMode, uint32_t bg, uint8_t Z1, uint8_t Z2) \ Screen += GFX.StartY * GFX.Pitch; \ uint8_t *Depth = GFX.DB + GFX.StartY * GFX.PPL; \ - struct SLineMatrixData *l = &LineMatrixData [GFX.StartY]; \ + SLineMatrixData *l = &LineMatrixData [GFX.StartY]; \ \ uint32_t Line; \ for (Line = GFX.StartY; Line <= GFX.EndY; Line++, Screen += GFX.Pitch, Depth += GFX.PPL, l++) \ @@ -2482,7 +2424,7 @@ static void DrawBGMode7Background16Sub1_2(uint8_t* Screen, int32_t bg) \ Screen += GFX.StartY * GFX.Pitch; \ uint8_t *Depth = GFX.DB + GFX.StartY * GFX.PPL; \ - struct SLineMatrixData *l = &LineMatrixData [GFX.StartY]; \ + SLineMatrixData *l = &LineMatrixData [GFX.StartY]; \ bool allowSimpleCase = false; \ if (!l->MatrixB && !l->MatrixC && (l->MatrixA == 0x0100) && (l->MatrixD == 0x0100) \ && !LineMatrixData[GFX.EndY].MatrixB && !LineMatrixData[GFX.EndY].MatrixC \ @@ -3063,20 +3005,10 @@ void S9xUpdateScreen() GFX.r212d = Memory.FillRAM [0x212d]; GFX.r2130 = Memory.FillRAM [0x2130]; -#ifdef JP_FIX - - GFX.Pseudo = (Memory.FillRAM [0x2133] & 8) != 0 && - (GFX.r212c & 15) != (GFX.r212d & 15) && - (GFX.r2131 == 0x3f); - -#else - GFX.Pseudo = (Memory.FillRAM [0x2133] & 8) != 0 && (GFX.r212c & 15) != (GFX.r212d & 15) && (GFX.r2131 & 0x3f) == 0; -#endif - if (IPPU.OBJChanged) S9xSetupOBJ(); @@ -3096,9 +3028,7 @@ void S9xUpdateScreen() uint32_t starty = GFX.StartY; uint32_t endy = GFX.EndY; - if (Settings.SupportHiRes && - (PPU.BGMode == 5 || PPU.BGMode == 6 || IPPU.Interlace - || IPPU.DoubleHeightPixels)) + if (PPU.BGMode == 5 || PPU.BGMode == 6 || IPPU.Interlace || IPPU.DoubleHeightPixels) { if (PPU.BGMode == 5 || PPU.BGMode == 6 || IPPU.Interlace) { @@ -3158,27 +3088,6 @@ void S9xUpdateScreen() } } } - else if (!Settings.SupportHiRes) - { - if (PPU.BGMode == 5 || PPU.BGMode == 6 || IPPU.Interlace) - { - if (!IPPU.HalfWidthPixels) - { - // The game has switched from lo-res to hi-res mode part way down - // the screen. Hi-res pixels must now be drawn at half width. - IPPU.HalfWidthPixels = true; - } - } - else - { - if (IPPU.HalfWidthPixels) - { - // The game has switched from hi-res to lo-res mode part way down - // the screen. Lo-res pixels must now be drawn at FULL width. - IPPU.HalfWidthPixels = false; - } - } - } uint32_t black = BLACK | (BLACK << 16); @@ -3196,7 +3105,7 @@ void S9xUpdateScreen() (GFX.r2130 & 0x30) != 0x30 && !((GFX.r2130 & 0x30) == 0x10 && IPPU.Clip[1].Count[5] == 0)) { - struct ClipData* pClip; + ClipData* pClip; GFX.FixedColour = BUILD_PIXEL(IPPU.XB [PPU.FixedColourRed], IPPU.XB [PPU.FixedColourGreen], @@ -3264,7 +3173,6 @@ void S9xUpdateScreen() // because there is a colour window in effect clipping // the main screen that will allow the sub-screen // 'underneath' to show through. - uint32_t b = GFX.FixedColour | (GFX.FixedColour << 16); uint32_t* p = (uint32_t*)(GFX.SubScreen + y * GFX.Pitch2); uint32_t* q = (uint32_t*)((uint16_t*) p + IPPU.RenderedScreenWidth); @@ -3593,30 +3501,24 @@ void S9xUpdateScreen() } } } - else - { - } - if (Settings.SupportHiRes) + if (PPU.BGMode != 5 && PPU.BGMode != 6 && IPPU.DoubleWidthPixels) { - if (PPU.BGMode != 5 && PPU.BGMode != 6 && IPPU.DoubleWidthPixels) + // Mixture of background modes used on screen - scale width + // of all non-mode 5 and 6 pixels. + uint32_t y; + for (y = starty; y <= endy; y++) { - // Mixture of background modes used on screen - scale width - // of all non-mode 5 and 6 pixels. - uint32_t y; - for (y = starty; y <= endy; y++) - { - int32_t x; - uint16_t* p = (uint16_t*)(GFX.Screen + y * GFX.Pitch2) + 255; - uint16_t* q = (uint16_t*)(GFX.Screen + y * GFX.Pitch2) + 510; - for (x = 255; x >= 0; x--, p--, q -= 2) - * q = *(q + 1) = *p; - } + int32_t x; + uint16_t* p = (uint16_t*)(GFX.Screen + y * GFX.Pitch2) + 255; + uint16_t* q = (uint16_t*)(GFX.Screen + y * GFX.Pitch2) + 510; + for (x = 255; x >= 0; x--, p--, q -= 2) + * q = *(q + 1) = *p; } - - // Double the height of the pixels just drawn - FIX_INTERLACE(GFX.Screen, false, GFX.ZBuffer); } + // Double the height of the pixels just drawn + FIX_INTERLACE(GFX.Screen, false, GFX.ZBuffer); + IPPU.PreviousLine = IPPU.CurrentLine; } diff --git a/source/gfx.h b/source/gfx.h index 230d692..c6b01cc 100644 --- a/source/gfx.h +++ b/source/gfx.h @@ -4,66 +4,56 @@ #define _GFX_H_ #include "port.h" +#include "ppu.h" #include "snes9x.h" -void S9xStartScreenRefresh(); +void S9xStartScreenRefresh(void); void S9xDrawScanLine(uint8_t Line); -void S9xEndScreenRefresh(); -void S9xSetupOBJ(); -void S9xUpdateScreen(); +void S9xEndScreenRefresh(void); +void S9xSetupOBJ(void); +void S9xUpdateScreen(void); void RenderLine(uint8_t line); -void S9xBuildDirectColourMaps(); +void S9xBuildDirectColourMaps(void); -// External port interface which must be implemented or initialised for each port. -extern struct SGFX GFX; - -bool S9xInitGFX(); -void S9xDeinitGFX(); -bool S9xInitUpdate(); +bool S9xInitGFX(void); +void S9xDeinitGFX(void); +bool S9xInitUpdate(void); -struct SGFX +typedef struct { - // Initialize these variables - uint8_t* Screen_buffer; - uint8_t* SubScreen_buffer; - uint8_t* ZBuffer_buffer; - uint8_t* SubZBuffer_buffer; - - uint8_t* Screen; - uint8_t* SubScreen; - uint8_t* ZBuffer; - uint8_t* SubZBuffer; - uint32_t Pitch; - - // Setup in call to S9xInitGFX() - int32_t Delta; - uint16_t* X2; - uint16_t* ZERO_OR_X2; - uint16_t* ZERO; - uint32_t RealPitch; // True pitch of Screen buffer. - uint32_t Pitch2; // Same as RealPitch except while using speed up hack for Glide. - uint32_t ZPitch; // Pitch of ZBuffer - uint32_t PPL; // Number of pixels on each of Screen buffer - uint32_t PPLx2; - uint32_t PixSize; - uint8_t S_safety_margin[8]; - uint8_t* S; - uint8_t DB_safety_margin[8]; - uint8_t* DB; - ptrdiff_t DepthDelta; - uint8_t Z1; // Depth for comparison - uint8_t Z2; // Depth to save - uint8_t ZSprite; // Used to ensure only 1st sprite is drawn per pixel - uint32_t FixedColour; - const char* InfoString; - uint32_t InfoStringTimeout; - uint32_t StartY; - uint32_t EndY; - struct ClipData* pCurrentClip; - uint32_t Mode7Mask; - uint32_t Mode7PriorityMask; - uint8_t OBJWidths[128]; - uint8_t OBJVisibleTiles[128]; + uint8_t* Screen_buffer; + uint8_t* SubScreen_buffer; + uint8_t* ZBuffer_buffer; + uint8_t* SubZBuffer_buffer; + uint8_t* Screen; + uint8_t* SubScreen; + uint8_t* ZBuffer; + uint8_t* SubZBuffer; + uint32_t Pitch; + + int32_t Delta; + uint16_t* X2; + uint16_t* ZERO_OR_X2; + uint16_t* ZERO; + uint32_t RealPitch; // True pitch of Screen buffer. + uint32_t Pitch2; // Same as RealPitch except while using speed up hack for Glide. + uint32_t ZPitch; // Pitch of ZBuffer + uint32_t PPL; // Number of pixels on each of Screen buffer + uint32_t PPLx2; + uint32_t PixSize; + uint8_t* S; + uint8_t* DB; + ptrdiff_t DepthDelta; + uint8_t Z1; // Depth for comparison + uint8_t Z2; // Depth to save + uint32_t FixedColour; + uint32_t StartY; + uint32_t EndY; + ClipData* pCurrentClip; + uint32_t Mode7Mask; + uint32_t Mode7PriorityMask; + uint8_t OBJWidths[128]; + uint8_t OBJVisibleTiles[128]; struct { @@ -72,26 +62,29 @@ struct SGFX struct { - int8_t Sprite; + int8_t Sprite; uint8_t Line; } OBJ[32]; } OBJLines [SNES_HEIGHT_EXTENDED]; - uint8_t r212c; - uint8_t r212d; - uint8_t r2130; - uint8_t r2131; - bool Pseudo; -}; + uint8_t r212c; + uint8_t r212d; + uint8_t r2130; + uint8_t r2131; + bool Pseudo; +} SGFX; -struct SLineData +// External port interface which must be implemented or initialised for each port. +extern SGFX GFX; + +typedef struct { struct { uint16_t VOffset; uint16_t HOffset; } BG [4]; -}; +} SLineData; #define H_FLIP 0x4000 #define V_FLIP 0x8000 @@ -105,17 +98,15 @@ typedef struct uint32_t TileAddress; uint32_t NameSelect; uint32_t SCBase; - uint32_t StartPalette; uint32_t PaletteShift; uint32_t PaletteMask; - uint8_t* Buffer; uint8_t* Buffered; bool DirectColourMode; } SBG; -struct SLineMatrixData +typedef struct { int16_t MatrixA; int16_t MatrixB; @@ -123,41 +114,37 @@ struct SLineMatrixData int16_t MatrixD; int16_t CentreX; int16_t CentreY; -}; +} SLineMatrixData; -extern uint32_t odd_high [4][16]; -extern uint32_t odd_low [4][16]; extern uint32_t even_high [4][16]; -extern uint32_t even_low [4][16]; +extern uint32_t even_low [4][16]; +extern uint32_t odd_high [4][16]; +extern uint32_t odd_low [4][16]; extern SBG BG; extern uint16_t DirectColourMaps [8][256]; extern uint8_t mul_brightness [16][32]; // Could use BSWAP instruction on Intel port... -#define SWAP_DWORD(dw) dw = ((dw & 0xff) << 24) | ((dw & 0xff00) << 8) | \ - ((dw & 0xff0000) >> 8) | ((dw & 0xff000000) >> 24) +#define SWAP_DWORD(dword) dword = ((((dword) & 0x000000ff) << 24) \ + | (((dword) & 0x0000ff00) << 8) \ + | (((dword) & 0x00ff0000) >> 8) \ + | (((dword) & 0xff000000) >> 24)) #ifdef FAST_LSB_WORD_ACCESS -#define READ_2BYTES(s) (*(uint16_t *) (s)) -#define WRITE_2BYTES(s, d) *(uint16_t *) (s) = (d) +#define READ_2BYTES(s) (*(uint16_t *) (s)) +#define WRITE_2BYTES(s, d) *(uint16_t *) (s) = (d) +#elif defined(MSB_FIRST) +#define READ_2BYTES(s) (*(uint8_t *) (s) | (*((uint8_t *) (s) + 1) << 8)) +#define WRITE_2BYTES(s, d) *(uint8_t *) (s) = (d), *((uint8_t *) (s) + 1) = (d) >> 8 #else -#define READ_2BYTES(s) (*(uint8_t *) (s) | (*((uint8_t *) (s) + 1) << 8)) -#define WRITE_2BYTES(s, d) *(uint8_t *) (s) = (d), \ - *((uint8_t *) (s) + 1) = (d) >> 8 -#endif // i386 +#define READ_2BYTES(s) (*(uint16_t *) (s)) +#define WRITE_2BYTES(s, d) *(uint16_t *) (s) = (d) +#endif #define SUB_SCREEN_DEPTH 0 #define MAIN_SCREEN_DEPTH 32 -#if defined(OLD_COLOUR_BLENDING) -#define COLOR_ADD(C1, C2) \ -GFX.X2 [((((C1) & RGB_REMOVE_LOW_BITS_MASK) + \ - ((C2) & RGB_REMOVE_LOW_BITS_MASK)) >> 1) + \ - ((C1) & (C2) & RGB_LOW_BITS_MASK)] -#else -static inline uint16_t COLOR_ADD(uint16_t, uint16_t); - static inline uint16_t COLOR_ADD(uint16_t C1, uint16_t C2) { if (C1 == 0) @@ -165,52 +152,26 @@ static inline uint16_t COLOR_ADD(uint16_t C1, uint16_t C2) else if (C2 == 0) return C1; else - return GFX.X2 [(((C1 & RGB_REMOVE_LOW_BITS_MASK) + (C2 & - RGB_REMOVE_LOW_BITS_MASK)) >> 1) + (C1 & C2 & RGB_LOW_BITS_MASK)] | (( - C1 ^ C2) & RGB_LOW_BITS_MASK); + return GFX.X2 [(((C1 & RGB_REMOVE_LOW_BITS_MASK) + + (C2 & RGB_REMOVE_LOW_BITS_MASK)) >> 1) + + (C1 & C2 & RGB_LOW_BITS_MASK)] | + ((C1 ^ C2) & RGB_LOW_BITS_MASK); } -#endif #define COLOR_ADD1_2(C1, C2) \ (((((C1) & RGB_REMOVE_LOW_BITS_MASK) + \ ((C2) & RGB_REMOVE_LOW_BITS_MASK)) >> 1) + \ (((C1) & (C2) & RGB_LOW_BITS_MASK) | ALPHA_BITS_MASK)) -#if defined(OLD_COLOUR_BLENDING) -#define COLOR_SUB(C1, C2) \ -GFX.ZERO_OR_X2 [(((C1) | RGB_HI_BITS_MASKx2) - \ - ((C2) & RGB_REMOVE_LOW_BITS_MASK)) >> 1] -#elif !defined(NEW_COLOUR_BLENDING) #define COLOR_SUB(C1, C2) \ (GFX.ZERO_OR_X2 [(((C1) | RGB_HI_BITS_MASKx2) - \ ((C2) & RGB_REMOVE_LOW_BITS_MASK)) >> 1] + \ -((C1) & RGB_LOW_BITS_MASK) - ((C2) & RGB_LOW_BITS_MASK)) -#else -inline uint16_t COLOR_SUB(uint16_t, uint16_t); - -inline uint16_t COLOR_SUB(uint16_t C1, uint16_t C2) -{ - uint16_t mC1, mC2, v = 0; - - mC1 = C1 & FIRST_COLOR_MASK; - mC2 = C2 & FIRST_COLOR_MASK; - if (mC1 > mC2) v += (mC1 - mC2); - - mC1 = C1 & SECOND_COLOR_MASK; - mC2 = C2 & SECOND_COLOR_MASK; - if (mC1 > mC2) v += (mC1 - mC2); - - mC1 = C1 & THIRD_COLOR_MASK; - mC2 = C2 & THIRD_COLOR_MASK; - if (mC1 > mC2) v += (mC1 - mC2); - - return v; -} -#endif + ((C1) & RGB_LOW_BITS_MASK) - \ + ((C2) & RGB_LOW_BITS_MASK)) #define COLOR_SUB1_2(C1, C2) \ GFX.ZERO [(((C1) | RGB_HI_BITS_MASKx2) - \ - ((C2) & RGB_REMOVE_LOW_BITS_MASK)) >> 1] + ((C2) & RGB_REMOVE_LOW_BITS_MASK)) >> 1] typedef void (*NormalTileRenderer)(uint32_t Tile, int32_t Offset, uint32_t StartLine, uint32_t LineCount); diff --git a/source/globals.c b/source/globals.c index b99e488..830c6ab 100644 --- a/source/globals.c +++ b/source/globals.c @@ -4,7 +4,6 @@ #include "memmap.h" #include "ppu.h" #include "dsp1.h" -#include "missing.h" #include "cpuexec.h" #include "apu.h" #include "dma.h" @@ -17,8 +16,6 @@ char String[513]; -struct Missing missing; - SICPU ICPU; SCPUState CPU; @@ -39,8 +36,6 @@ SnesModel M1SNES = {1, 3, 2}; SnesModel M2SNES = {2, 4, 3}; SnesModel* Model = &M1SNES; -uint8_t* C4RAM = NULL; - int32_t OpAddress = 0; CMemory Memory; @@ -49,7 +44,7 @@ SSNESGameFixes SNESGameFixes; uint8_t OpenBus = 0; -struct FxInit_s SuperFX; +FxInit_s SuperFX; SPPU PPU; InternalPPU IPPU; @@ -61,9 +56,9 @@ uint8_t* HDMABasePointers [8]; SBG BG; -struct SGFX GFX; -struct SLineData LineData[240]; -struct SLineMatrixData LineMatrixData [240]; +SGFX GFX; +SLineData LineData[240]; +SLineMatrixData LineMatrixData [240]; uint8_t Mode7Depths [2]; NormalTileRenderer DrawTilePtr = NULL; @@ -77,9 +72,7 @@ uint32_t odd_low[4][16]; uint32_t even_high[4][16]; uint32_t even_low[4][16]; -#ifdef WANT_CHEATS SCheatData Cheat; -#endif #ifndef USE_BLARGG_APU SoundStatus so; @@ -150,12 +143,12 @@ uint8_t Depths[8][4] = { {TILE_2BIT, TILE_2BIT, TILE_2BIT, TILE_2BIT}, // 0 {TILE_4BIT, TILE_4BIT, TILE_2BIT, 0}, // 1 - {TILE_4BIT, TILE_4BIT, 0, 0}, // 2 - {TILE_8BIT, TILE_4BIT, 0, 0}, // 3 - {TILE_8BIT, TILE_2BIT, 0, 0}, // 4 - {TILE_4BIT, TILE_2BIT, 0, 0}, // 5 - {TILE_4BIT, 0, 0, 0}, // 6 - {0, 0, 0, 0} // 7 + {TILE_4BIT, TILE_4BIT, 0, 0}, // 2 + {TILE_8BIT, TILE_4BIT, 0, 0}, // 3 + {TILE_8BIT, TILE_2BIT, 0, 0}, // 4 + {TILE_4BIT, TILE_2BIT, 0, 0}, // 5 + {TILE_4BIT, 0, 0, 0}, // 6 + {0, 0, 0, 0} // 7 }; uint8_t BGSizes [2] = { @@ -165,8 +158,8 @@ uint16_t DirectColourMaps [8][256]; int32_t FilterValues[4][2] = { - {0, 0}, - {240, 0}, + {0, 0}, + {240, 0}, {488, -240}, {460, -208} }; @@ -208,7 +201,7 @@ uint8_t APUROM [64] = // Raw SPC700 instruction cycle lengths uint16_t S9xAPUCycleLengths [256] = { - /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */ + /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */ /* 00 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 6, 8, /* 10 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 6, 5, 2, 2, 4, 6, /* 20 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 5, 4, @@ -231,7 +224,7 @@ uint16_t S9xAPUCycleLengths [256] = // to be relative to the 65c816 instruction lengths. uint16_t S9xAPUCycles [256] = { - /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */ + /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */ /* 00 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 6, 8, /* 10 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 6, 5, 2, 2, 4, 6, /* 20 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 5, 4, diff --git a/source/memmap.c b/source/memmap.c index ec1dac8..31b46e6 100644 --- a/source/memmap.c +++ b/source/memmap.c @@ -29,7 +29,7 @@ #define MAP_RONLY_SRAM_OR_NONE (Memory.SRAMSize == 0 ? (uint8_t*) MAP_NONE : (uint8_t*) MAP_RONLY_SRAM) #include "fxemu.h" -extern struct FxInit_s SuperFX; +extern FxInit_s SuperFX; static int32_t retry_count = 0; static uint8_t bytes0x2000 [0x2000]; @@ -925,11 +925,9 @@ again: Tales = true; InitROM(Tales); -#ifdef WANT_CHEATS S9xLoadCheatFile(S9xGetFilename("cht")); S9xInitCheatData(); S9xApplyCheats(); -#endif S9xReset(); return true; } @@ -3125,6 +3123,4 @@ void ParseSNESHeader(uint8_t* RomHeader) sprintf(Memory.CompanyId, "%02X", RomHeader[0x2A]); } -#undef INLINE -#define INLINE #include "getset.h" diff --git a/source/memmap.h b/source/memmap.h index 3675357..0d24aae 100644 --- a/source/memmap.h +++ b/source/memmap.h @@ -10,11 +10,8 @@ #define READ_DWORD(s) (*(uint32_t *) (s)) #define WRITE_WORD(s, d) (*(uint16_t *) (s)) = (d) #define WRITE_DWORD(s, d) (*(uint32_t *) (s)) = (d) - -#define READ_3WORD(s) (0x00ffffff & *(uint32_t *) (s)) +#define READ_3WORD(s) ((*(uint32_t *) (s)) & 0x00ffffff) #define WRITE_3WORD(s, d) *(uint16_t *) (s) = (uint16_t)(d), *((uint8_t *) (s) + 2) = (uint8_t) ((d) >> 16) - - #else #define READ_WORD(s) (*(uint8_t *) (s) | (*((uint8_t *) (s) + 1) << 8)) #define READ_DWORD(s) (*(uint8_t *) (s) | (*((uint8_t *) (s) + 1) << 8) | (*((uint8_t *) (s) + 2) << 16) | (*((uint8_t *) (s) + 3) << 24)) @@ -113,16 +110,16 @@ typedef struct uint8_t* C4RAM; bool HiROM; bool LoROM; - uint32_t SRAMMask; + uint16_t SRAMMask; uint8_t SRAMSize; - uint8_t* Map [MEMMAP_NUM_BLOCKS]; - uint8_t* WriteMap [MEMMAP_NUM_BLOCKS]; + uint8_t* Map [MEMMAP_NUM_BLOCKS]; + uint8_t* WriteMap [MEMMAP_NUM_BLOCKS]; uint8_t MemorySpeed [MEMMAP_NUM_BLOCKS]; - uint8_t BlockIsRAM [MEMMAP_NUM_BLOCKS]; - uint8_t BlockIsROM [MEMMAP_NUM_BLOCKS]; - char ROMName [ROM_NAME_LEN]; - char ROMId [5]; - char CompanyId [3]; + uint8_t BlockIsRAM [MEMMAP_NUM_BLOCKS]; + uint8_t BlockIsROM [MEMMAP_NUM_BLOCKS]; + char ROMName [ROM_NAME_LEN]; + char ROMId [5]; + char CompanyId [3]; uint8_t ROMSpeed; uint8_t ROMType; uint8_t ROMSize; @@ -132,12 +129,8 @@ typedef struct uint32_t CalculatedChecksum; uint32_t ROMChecksum; uint32_t ROMComplementChecksum; - uint8_t* SDD1Index; - uint8_t* SDD1Data; - uint32_t SDD1Entries; char ROMFilename [_MAX_PATH]; uint8_t ROMRegion; - uint32_t ROMCRC32; uint8_t ExtendedFormat; uint8_t* BSRAM; } CMemory; @@ -147,7 +140,6 @@ void ResetSpeedMap(); extern CMemory Memory; void S9xDeinterleaveMode2(); -#ifdef NO_INLINE_SET_GET uint8_t S9xGetByte(uint32_t Address); uint16_t S9xGetWord(uint32_t Address); void S9xSetByte(uint8_t Byte, uint32_t Address); @@ -158,11 +150,4 @@ uint8_t* GetBasePointer(uint32_t Address); extern uint8_t OpenBus; -#else -#ifndef INLINE -#define INLINE static inline -#endif -#include "getset.h" -#endif // NO_INLINE_SET_GET - #endif // _memmap_h_ diff --git a/source/port.h b/source/port.h index 622027f..12d210c 100644 --- a/source/port.h +++ b/source/port.h @@ -4,7 +4,6 @@ #define _PORT_H_ #include <limits.h> - #include <string.h> #include <sys/types.h> @@ -24,23 +23,23 @@ #define PATH_MAX 1024 #endif -#define _MAX_DIR PATH_MAX +#define _MAX_DIR PATH_MAX #define _MAX_DRIVE 1 #define _MAX_FNAME PATH_MAX -#define _MAX_EXT PATH_MAX -#define _MAX_PATH PATH_MAX +#define _MAX_EXT PATH_MAX +#define _MAX_PATH PATH_MAX void _makepath(char* path, const char* drive, const char* dir, const char* fname, const char* ext); void _splitpath(const char* path, char* drive, char* dir, char* fname, char* ext); #else /* __WIN32__ */ -#define strcasecmp stricmp +#define strcasecmp stricmp #define strncasecmp strnicmp #endif #define SLASH_STR "/" #define SLASH_CHAR '/' -#if defined(__i386__) || defined(__i486__) || defined(__i586__) || \ +#if defined(__i386__) || defined(__i486__) || defined(__i586__) || \ defined(__WIN32__) || defined(__alpha__) #define FAST_LSB_WORD_ACCESS #elif defined(__MIPSEL__) diff --git a/source/ppu.c b/source/ppu.c index f48800d..167610d 100644 --- a/source/ppu.c +++ b/source/ppu.c @@ -4,7 +4,6 @@ #include "memmap.h" #include "ppu.h" #include "cpuexec.h" -#include "missing.h" #include "apu.h" #include "dma.h" #include "display.h" @@ -12,10 +11,10 @@ #include "sdd1.h" #include "srtc.h" #include "spc7110.h" - #include "fxemu.h" #include "fxinst.h" -extern struct FxInit_s SuperFX; + +extern FxInit_s SuperFX; extern uint8_t mul_brightness [16][32]; uint32_t justifiers = 0xffff00aa; @@ -28,7 +27,6 @@ void S9xLatchCounters(bool force) if (!force && !(Memory.FillRAM[0x4213] & 0x80)) return; - PPU.HVBeamCounterLatched = 1; PPU.VBeamPosLatched = (uint16_t) CPU.V_Counter; PPU.HBeamPosLatched = (uint16_t)((CPU.Cycles * SNES_HCOUNTER_MAX) / Settings.H_Max); @@ -111,7 +109,7 @@ static void S9xSetSuperFX(uint8_t Byte, uint16_t Address) return; old_fill_ram = Memory.FillRAM[Address]; - Memory.FillRAM[Address] = Byte; + Memory.FillRAM[Address] = Byte; switch (Address) { @@ -176,8 +174,6 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) IPPU.DirectColourMapsNeedRebuild = true; PPU.Brightness = Byte & 0xF; S9xFixColourBrightness(); - if (PPU.Brightness > IPPU.MaxBrightness) - IPPU.MaxBrightness = PPU.Brightness; } if ((Memory.FillRAM[0x2100] & 0x80) != (Byte & 0x80)) { @@ -201,7 +197,6 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) // Sprite write address (low) PPU.OAMAddr = ((Memory.FillRAM[0x2103] & 1) << 8) | Byte; PPU.OAMFlip = 2; - PPU.OAMReadFlip = 0; PPU.SavedOAMAddr = PPU.OAMAddr; if (PPU.OAMPriorityRotation && PPU.FirstSprite != (PPU.OAMAddr >> 1)) { @@ -232,7 +227,6 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) } } PPU.OAMFlip = 0; - PPU.OAMReadFlip = 0; PPU.SavedOAMAddr = PPU.OAMAddr; break; case 0x2104: @@ -295,8 +289,6 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.BG[3].NameBase = ((Byte >> 4) & 7) << 12; } break; - //This is the Theme Park fix - it appears all these registers - //share a previous byte value for setting them. case 0x210D: PPU.BG[0].HOffset = (Byte << 8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; @@ -329,7 +321,6 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.BG[3].VOffset = (Byte << 8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; break; - //end Theme Park case 0x2115: // VRAM byte/word access flag and increment PPU.VMA.High = (bool) (Byte & 0x80); @@ -395,12 +386,12 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) case 0x211b: // Mode 7 matrix A (low & high) PPU.MatrixA = ((PPU.MatrixA >> 8) & 0xff) | (Byte << 8); - PPU.Need16x8Mulitply = true; + PPU.Need16x8Multiply = true; break; case 0x211c: // Mode 7 matrix B (low & high) PPU.MatrixB = ((PPU.MatrixB >> 8) & 0xff) | (Byte << 8); - PPU.Need16x8Mulitply = true; + PPU.Need16x8Multiply = true; break; case 0x211d: // Mode 7 matrix C (low & high) @@ -605,7 +596,6 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) IPPU.OBJChanged = true; if (PPU.BGMode == 5 || PPU.BGMode == 6) IPPU.Interlace = (bool) (Byte & 1); - IPPU.InterlaceSprites = false; } } break; @@ -702,16 +692,10 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) case 0x217e: case 0x217f: #ifndef USE_BLARGG_APU -#ifdef SPCTOOL - _SPCInPB(Address & 3, Byte); -#else Memory.FillRAM [Address] = Byte; IAPU.RAM [(Address & 3) + 0xf4] = Byte; -#ifdef SPC700_SHUTDOWN IAPU.APUExecuting = Settings.APUEnabled; IAPU.WaitCounter++; -#endif -#endif // SPCTOOL #else S9xAPUWritePort(Address & 3, Byte); #endif // #ifndef USE_BLARGG_APU @@ -742,7 +726,6 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) S9xSetSA1(Byte, Address); else Memory.FillRAM [Address] = Byte; - return; } else @@ -794,13 +777,13 @@ uint8_t S9xGetPPU(uint16_t Address) case 0x2135: case 0x2136: // 16bit x 8bit multiply read result. - if (PPU.Need16x8Mulitply) + if (PPU.Need16x8Multiply) { int32_t r = (int32_t) PPU.MatrixA * (int32_t)(PPU.MatrixB >> 8); Memory.FillRAM[0x2134] = (uint8_t) r; Memory.FillRAM[0x2135] = (uint8_t)(r >> 8); Memory.FillRAM[0x2136] = (uint8_t)(r >> 16); - PPU.Need16x8Mulitply = false; + PPU.Need16x8Multiply = false; } return (PPU.OpenBus1 = Memory.FillRAM[Address]); case 0x2137: @@ -984,13 +967,9 @@ uint8_t S9xGetPPU(uint16_t Address) case 0x217e: case 0x217f: #ifndef USE_BLARGG_APU -#ifdef SPCTOOL - return ((uint8_t) _SPCOutP [Address & 3]); -#else -#ifdef SPC700_SHUTDOWN IAPU.APUExecuting = Settings.APUEnabled; IAPU.WaitCounter++; -#endif + if (Settings.APUEnabled) { if (SNESGameFixes.APU_OutPorts_ReturnValueFix && @@ -999,17 +978,9 @@ uint8_t S9xGetPPU(uint16_t Address) return (APU.OutPorts [Address & 3]); } -#endif - switch (Settings.SoundSkipMethod) - { - case 0: - case 1: - case 3: - CPU.BranchSkip = true; - break; - case 2: - break; - } + + CPU.BranchSkip = true; + if ((Address & 3) < 2) { int32_t r = rand(); @@ -1028,7 +999,7 @@ uint8_t S9xGetPPU(uint16_t Address) return ((r >> 3) & 0xff); } return (Memory.FillRAM[Address]); -#else // SPCTOOL +#else return (S9xAPUReadPort(Address & 3)); #endif //#ifndef USE_BLARGG_APU case 0x2180: @@ -1069,16 +1040,13 @@ uint8_t S9xGetPPU(uint16_t Address) byte = Memory.FillRAM [Address]; -#ifdef CPU_SHUTDOWN if (Address == 0x3030) CPU.WaitAddress = CPU.PCAtOpcodeStart; - else -#endif - if (Address == 0x3031) - { - CLEAR_IRQ_SOURCE(GSU_IRQ_SOURCE); - Memory.FillRAM [0x3031] = byte & 0x7f; - } + else if (Address == 0x3031) + { + CLEAR_IRQ_SOURCE(GSU_IRQ_SOURCE); + Memory.FillRAM [0x3031] = byte & 0x7f; + } return byte; } return byte; @@ -1306,20 +1274,12 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) // IRQ ocurred flag (reset on read or write) CLEAR_IRQ_SOURCE(PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE); break; - case 0x4212: - // v-blank, h-blank and joypad being scanned flags (read-only) - /* fall through */ - case 0x4213: - // I/O Port (read-only) - /* fall through */ + case 0x4212: // v-blank, h-blank and joypad being scanned flags (read-only) + case 0x4213: // I/O Port (read-only) case 0x4214: - case 0x4215: - // Quotent of divide (read-only) - /* fall through */ + case 0x4215: // Quotent of divide (read-only) case 0x4216: - case 0x4217: - // Multiply product (read-only) - /* fall through */ + case 0x4217: // Multiply product (read-only) case 0x4218: case 0x4219: case 0x421a: @@ -1327,8 +1287,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) case 0x421c: case 0x421d: case 0x421e: - case 0x421f: - // Joypad values (read-only) + case 0x421f: // Joypad values (read-only) return; case 0x4300: case 0x4310: @@ -1547,11 +1506,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) case 0x4841: case 0x4842: if (Settings.SPC7110) - { S9xSetSPC7110(byte, Address); - break; - } - default: break; } Memory.FillRAM [Address] = byte; @@ -1586,13 +1541,8 @@ uint8_t S9xGetCPU(uint16_t Address) if (Memory.FillRAM [0x4016] & 1) { // MultiPlayer5 adaptor is only allowed to be plugged into port 2 - switch (IPPU.Controller) - { - case SNES_MULTIPLAYER5: - return (2); - case SNES_MOUSE: - break; - } + if (IPPU.Controller == SNES_MULTIPLAYER5) + return 2; return 0; } @@ -1653,24 +1603,18 @@ uint8_t S9xGetCPU(uint16_t Address) case 0x420f: return OpenBus; case 0x4210: -#ifdef CPU_SHUTDOWN CPU.WaitAddress = CPU.PCAtOpcodeStart; -#endif byte = Memory.FillRAM[0x4210]; - Memory.FillRAM[0x4210] = Model->_5A22; - //SNEeSe returns 2 for 5A22 version. + Memory.FillRAM[0x4210] = Model->_5A22; //SNEeSe returns 2 for 5A22 version. return ((byte & 0x80) | (OpenBus & 0x70) | Model->_5A22); case 0x4211: byte = (CPU.IRQActive & (PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE)) ? 0x80 : 0; CLEAR_IRQ_SOURCE(PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE); byte |= OpenBus & 0x7f; - return (byte); case 0x4212: // V-blank, h-blank and joypads being read flags (read-only) -#ifdef CPU_SHUTDOWN CPU.WaitAddress = CPU.PCAtOpcodeStart; -#endif return (REGISTER_4212() | (OpenBus & 0x3E)); case 0x4213: // I/O port input - returns 0 wherever $4201 is 0, and 1 elsewhere @@ -1840,7 +1784,7 @@ static void CommonPPUReset() PPU.VMA.Shift = 0; uint8_t B; - for (B = 0; B != 4; B++) + for (B = 0; B < 4; B++) { PPU.BG[B].SCBase = 0; PPU.BG[B].VOffset = 0; @@ -1849,7 +1793,6 @@ static void CommonPPUReset() PPU.BG[B].NameBase = 0; PPU.BG[B].SCSize = 0; - PPU.ClipCounts[B] = 0; PPU.ClipWindowOverlapLogic [B] = CLIP_OR; PPU.ClipWindow1Enable[B] = false; PPU.ClipWindow2Enable[B] = false; @@ -1857,8 +1800,6 @@ static void CommonPPUReset() PPU.ClipWindow2Inside[B] = true; } - PPU.ClipCounts[4] = 0; - PPU.ClipCounts[5] = 0; PPU.ClipWindowOverlapLogic[4] = PPU.ClipWindowOverlapLogic[5] = CLIP_OR; PPU.ClipWindow1Enable[4] = PPU.ClipWindow1Enable[5] = false; PPU.ClipWindow2Enable[4] = PPU.ClipWindow2Enable[5] = false; @@ -1876,7 +1817,6 @@ static void CommonPPUReset() } PPU.FirstSprite = 0; - PPU.LastSprite = 127; int32_t Sprite; for (Sprite = 0; Sprite < 128; Sprite++) { @@ -1896,7 +1836,6 @@ static void CommonPPUReset() PPU.OpenBus2 = 0; PPU.OAMFlip = 0; - PPU.OAMTileAddress = 0; PPU.OAMAddr = 0; PPU.IRQVBeamPos = 0; PPU.IRQHBeamPos = 0; @@ -1905,7 +1844,6 @@ static void CommonPPUReset() PPU.HBeamFlip = 0; PPU.VBeamFlip = 0; - PPU.HVBeamCounterLatched = 0; PPU.MatrixA = PPU.MatrixB = PPU.MatrixC = PPU.MatrixD = 0; PPU.CentreX = PPU.CentreY = 0; @@ -1914,12 +1852,10 @@ static void CommonPPUReset() PPU.SavedOAMAddr = 0; PPU.ScreenHeight = SNES_HEIGHT; PPU.WRAM = 0; - PPU.BG_Forced = 0; PPU.ForcedBlanking = true; PPU.OBJSizeSelect = 0; PPU.OBJNameSelect = 0; PPU.OBJNameBase = 0; - PPU.OAMReadFlip = 0; PPU.BGnxOFSbyte = 0; memset(PPU.OAMData, 0, 512 + 32); @@ -1938,28 +1874,19 @@ static void CommonPPUReset() PPU.Window2Right = 0; PPU.RecomputeClipWindows = true; PPU.CGFLIPRead = false; - PPU.Need16x8Mulitply = false; - PPU.MouseSpeed[0] = PPU.MouseSpeed[1] = 0; + PPU.Need16x8Multiply = false; IPPU.ColorsChanged = true; IPPU.HDMA = 0; - IPPU.HDMAStarted = false; - IPPU.MaxBrightness = 0; - IPPU.LatchedBlanking = false; IPPU.OBJChanged = true; IPPU.RenderThisFrame = true; IPPU.DirectColourMapsNeedRebuild = true; IPPU.FrameCount = 0; - IPPU.RenderedFramesCount = 0; - IPPU.DisplayedRenderedFrameCount = 0; - IPPU.SkippedFrames = 0; - IPPU.FrameSkip = 0; memset(IPPU.TileCached [TILE_2BIT], 0, MAX_2BIT_TILES); memset(IPPU.TileCached [TILE_4BIT], 0, MAX_4BIT_TILES); memset(IPPU.TileCached [TILE_8BIT], 0, MAX_8BIT_TILES); IPPU.FirstVRAMRead = false; IPPU.Interlace = false; - IPPU.InterlaceSprites = false; IPPU.DoubleWidthPixels = false; IPPU.HalfWidthPixels = false; IPPU.DoubleHeightPixels = false; @@ -1978,7 +1905,7 @@ static void CommonPPUReset() S9xNextController(); for (c = 0; c < 2; c++) - memset(&IPPU.Clip [c], 0, sizeof(struct ClipData)); + memset(&IPPU.Clip [c], 0, sizeof(ClipData)); if (Settings.MouseMaster) { @@ -2050,9 +1977,7 @@ void S9xProcessMouse(int32_t which1) { int32_t delta_x, delta_y; #define MOUSE_SIGNATURE 0x1 - IPPU.Mouse [which1] = MOUSE_SIGNATURE | - (PPU.MouseSpeed [which1] << 4) | - ((buttons & 1) << 6) | ((buttons & 2) << 6); + IPPU.Mouse [which1] = MOUSE_SIGNATURE | ((buttons & 1) << 6) | ((buttons & 2) << 6); delta_x = x - IPPU.PrevMouseX[which1]; delta_y = y - IPPU.PrevMouseY[which1]; @@ -2131,7 +2056,6 @@ void ProcessSuperScope() PPU.VBeamPosLatched = (uint16_t)(y + 1); PPU.HBeamPosLatched = (uint16_t) x; - PPU.HVBeamCounterLatched = true; Memory.FillRAM [0x213F] |= 0x40 | Model->_5C78; } IPPU.Joypads [1] = scope; @@ -2215,8 +2139,6 @@ void S9xUpdateJustifiers() if (last_p1) { - - PPU.HVBeamCounterLatched = false; Memory.FillRAM [0x213F] = Model->_5C78; //process latch as Justifier 2 @@ -2226,10 +2148,8 @@ void S9xUpdateJustifiers() { if (!offscreen) { - PPU.VBeamPosLatched = (uint16_t)(y + 1); PPU.HBeamPosLatched = (uint16_t) x; - PPU.HVBeamCounterLatched = true; Memory.FillRAM [0x213F] |= 0x40 | Model->_5C78; } } @@ -2237,8 +2157,6 @@ void S9xUpdateJustifiers() } else { - - PPU.HVBeamCounterLatched = false; Memory.FillRAM [0x213F] = Model->_5C78; //emulate player 1. @@ -2248,7 +2166,6 @@ void S9xUpdateJustifiers() { PPU.VBeamPosLatched = (uint16_t)(y + 1); PPU.HBeamPosLatched = (uint16_t) x; - PPU.HVBeamCounterLatched = true; Memory.FillRAM [0x213F] |= 0x40 | Model->_5C78; } } @@ -2257,27 +2174,18 @@ void S9xUpdateJustifiers() //needs restructure if (!offscreen) { - if ((!last_p1 && IPPU.Controller == SNES_JUSTIFIER) || (last_p1 && IPPU.Controller == SNES_JUSTIFIER_2)) { PPU.VBeamPosLatched = (uint16_t)(y + 1); PPU.HBeamPosLatched = (uint16_t) x; - PPU.HVBeamCounterLatched = true; Memory.FillRAM [0x213F] |= 0x40 | Model->_5C78; } else - { - PPU.HVBeamCounterLatched = false; Memory.FillRAM [0x213F] = Model->_5C78; - - } } else - { - PPU.HVBeamCounterLatched = false; Memory.FillRAM [0x213F] = Model->_5C78; - } } } @@ -2289,11 +2197,9 @@ void S9xUpdateJoypads() { IPPU.Joypads [i] = S9xReadJoypad(i); - if ((IPPU.Joypads [i] & (SNES_LEFT_MASK | SNES_RIGHT_MASK)) == - (SNES_LEFT_MASK | SNES_RIGHT_MASK)) + if (IPPU.Joypads [i] & SNES_LEFT_MASK) IPPU.Joypads [i] &= ~SNES_RIGHT_MASK; - if ((IPPU.Joypads [i] & (SNES_UP_MASK | SNES_DOWN_MASK)) == - (SNES_UP_MASK | SNES_DOWN_MASK)) + if (IPPU.Joypads [i] & SNES_UP_MASK) IPPU.Joypads [i] &= ~SNES_DOWN_MASK; } @@ -2357,7 +2263,6 @@ void S9xUpdateJoypads() } } - void S9xSuperFXExec() { if (Settings.SuperFX) @@ -2374,252 +2279,3 @@ void S9xSuperFXExec() } } } - -// Register reads and writes... - -uint8_t REGISTER_4212() -{ - uint8_t GetBank = 0; - if (CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE && - CPU.V_Counter < PPU.ScreenHeight + FIRST_VISIBLE_LINE + 3) - GetBank = 1; - - GetBank |= CPU.Cycles >= Settings.HBlankStart ? 0x40 : 0; - if (CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE) - GetBank |= 0x80; /* XXX: 0x80 or 0xc0 ? */ - - return (GetBank); -} - -void FLUSH_REDRAW() -{ - if (IPPU.PreviousLine != IPPU.CurrentLine) - S9xUpdateScreen(); -} - -void REGISTER_2104(uint8_t byte) -{ - if (PPU.OAMAddr & 0x100) - { - int32_t addr = ((PPU.OAMAddr & 0x10f) << 1) + (PPU.OAMFlip & 1); - if (byte != PPU.OAMData [addr]) - { - FLUSH_REDRAW(); - PPU.OAMData [addr] = byte; - IPPU.OBJChanged = true; - - // X position high bit, and sprite size (x4) - struct SOBJ* pObj = &PPU.OBJ [(addr & 0x1f) * 4]; - - pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 0) & 1]; - pObj++->Size = byte & 2; - pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 2) & 1]; - pObj++->Size = byte & 8; - pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 4) & 1]; - pObj++->Size = byte & 32; - pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 6) & 1]; - pObj->Size = byte & 128; - } - PPU.OAMFlip ^= 1; - if (!(PPU.OAMFlip & 1)) - { - ++PPU.OAMAddr; - PPU.OAMAddr &= 0x1ff; - if (PPU.OAMPriorityRotation && PPU.FirstSprite != (PPU.OAMAddr >> 1)) - { - PPU.FirstSprite = (PPU.OAMAddr & 0xFE) >> 1; - IPPU.OBJChanged = true; - } - } - else if (PPU.OAMPriorityRotation && (PPU.OAMAddr & 1)) - IPPU.OBJChanged = true; - } - else if (!(PPU.OAMFlip & 1)) - { - PPU.OAMWriteRegister &= 0xff00; - PPU.OAMWriteRegister |= byte; - PPU.OAMFlip |= 1; - if (PPU.OAMPriorityRotation && (PPU.OAMAddr & 1)) - IPPU.OBJChanged = true; - } - else - { - PPU.OAMWriteRegister &= 0x00ff; - uint8_t lowbyte = (uint8_t)(PPU.OAMWriteRegister); - uint8_t highbyte = byte; - PPU.OAMWriteRegister |= byte << 8; - - int32_t addr = (PPU.OAMAddr << 1); - - if (lowbyte != PPU.OAMData [addr] || - highbyte != PPU.OAMData [addr + 1]) - { - FLUSH_REDRAW(); - PPU.OAMData [addr] = lowbyte; - PPU.OAMData [addr + 1] = highbyte; - IPPU.OBJChanged = true; - if (addr & 2) - { - // Tile - PPU.OBJ[addr = PPU.OAMAddr >> 1].Name = PPU.OAMWriteRegister & 0x1ff; - - // priority, h and v flip. - PPU.OBJ[addr].Palette = (highbyte >> 1) & 7; - PPU.OBJ[addr].Priority = (highbyte >> 4) & 3; - PPU.OBJ[addr].HFlip = (highbyte >> 6) & 1; - PPU.OBJ[addr].VFlip = (highbyte >> 7) & 1; - } - else - { - // X position (low) - PPU.OBJ[addr = PPU.OAMAddr >> 1].HPos &= 0xFF00; - PPU.OBJ[addr].HPos |= lowbyte; - - // Sprite Y position - PPU.OBJ[addr].VPos = highbyte; - } - } - PPU.OAMFlip &= ~1; - ++PPU.OAMAddr; - if (PPU.OAMPriorityRotation && PPU.FirstSprite != (PPU.OAMAddr >> 1)) - { - PPU.FirstSprite = (PPU.OAMAddr & 0xFE) >> 1; - IPPU.OBJChanged = true; - } - } - - Memory.FillRAM [0x2104] = byte; -} - -void REGISTER_2118(uint8_t Byte) -{ - uint32_t address; - if (PPU.VMA.FullGraphicCount) - { - uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; - address = (((PPU.VMA.Address & ~PPU.VMA.Mask1) + - (rem >> PPU.VMA.Shift) + - ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) & 0xffff; - Memory.VRAM [address] = Byte; - } - else - Memory.VRAM[address = (PPU.VMA.Address << 1) & 0xFFFF] = Byte; - IPPU.TileCached [TILE_2BIT][address >> 4] = false; - IPPU.TileCached [TILE_4BIT][address >> 5] = false; - IPPU.TileCached [TILE_8BIT][address >> 6] = false; - if (!PPU.VMA.High) - PPU.VMA.Address += PPU.VMA.Increment; -} - -void REGISTER_2118_tile(uint8_t Byte) -{ - uint32_t address; - uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; - address = (((PPU.VMA.Address & ~PPU.VMA.Mask1) + - (rem >> PPU.VMA.Shift) + - ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) & 0xffff; - Memory.VRAM [address] = Byte; - IPPU.TileCached [TILE_2BIT][address >> 4] = false; - IPPU.TileCached [TILE_4BIT][address >> 5] = false; - IPPU.TileCached [TILE_8BIT][address >> 6] = false; - if (!PPU.VMA.High) - PPU.VMA.Address += PPU.VMA.Increment; -} - -void REGISTER_2118_linear(uint8_t Byte) -{ - uint32_t address; - Memory.VRAM[address = (PPU.VMA.Address << 1) & 0xFFFF] = Byte; - IPPU.TileCached [TILE_2BIT][address >> 4] = false; - IPPU.TileCached [TILE_4BIT][address >> 5] = false; - IPPU.TileCached [TILE_8BIT][address >> 6] = false; - if (!PPU.VMA.High) - PPU.VMA.Address += PPU.VMA.Increment; -} - -void REGISTER_2119(uint8_t Byte) -{ - uint32_t address; - if (PPU.VMA.FullGraphicCount) - { - uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; - address = ((((PPU.VMA.Address & ~PPU.VMA.Mask1) + - (rem >> PPU.VMA.Shift) + - ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) + 1) & 0xFFFF; - Memory.VRAM [address] = Byte; - } - else - Memory.VRAM[address = ((PPU.VMA.Address << 1) + 1) & 0xFFFF] = Byte; - IPPU.TileCached [TILE_2BIT][address >> 4] = false; - IPPU.TileCached [TILE_4BIT][address >> 5] = false; - IPPU.TileCached [TILE_8BIT][address >> 6] = false; - if (PPU.VMA.High) - PPU.VMA.Address += PPU.VMA.Increment; -} - -void REGISTER_2119_tile(uint8_t Byte) -{ - uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; - uint32_t address = ((((PPU.VMA.Address & ~PPU.VMA.Mask1) + - (rem >> PPU.VMA.Shift) + - ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) + 1) & 0xFFFF; - Memory.VRAM [address] = Byte; - IPPU.TileCached [TILE_2BIT][address >> 4] = false; - IPPU.TileCached [TILE_4BIT][address >> 5] = false; - IPPU.TileCached [TILE_8BIT][address >> 6] = false; - if (PPU.VMA.High) - PPU.VMA.Address += PPU.VMA.Increment; -} - -void REGISTER_2119_linear(uint8_t Byte) -{ - uint32_t address; - Memory.VRAM[address = ((PPU.VMA.Address << 1) + 1) & 0xFFFF] = Byte; - IPPU.TileCached [TILE_2BIT][address >> 4] = false; - IPPU.TileCached [TILE_4BIT][address >> 5] = false; - IPPU.TileCached [TILE_8BIT][address >> 6] = false; - if (PPU.VMA.High) - PPU.VMA.Address += PPU.VMA.Increment; -} - -void REGISTER_2122(uint8_t Byte) -{ - // CG-RAM (palette) write - - if (PPU.CGFLIP) - { - if ((Byte & 0x7f) != (PPU.CGDATA[PPU.CGADD] >> 8)) - { - FLUSH_REDRAW(); - PPU.CGDATA[PPU.CGADD] &= 0x00FF; - PPU.CGDATA[PPU.CGADD] |= (Byte & 0x7f) << 8; - IPPU.ColorsChanged = true; - IPPU.Blue [PPU.CGADD] = IPPU.XB [(Byte >> 2) & 0x1f]; - IPPU.Green [PPU.CGADD] = IPPU.XB [(PPU.CGDATA[PPU.CGADD] >> 5) & 0x1f]; - IPPU.ScreenColors [PPU.CGADD] = (uint16_t) BUILD_PIXEL(IPPU.Red [PPU.CGADD], - IPPU.Green [PPU.CGADD], - IPPU.Blue [PPU.CGADD]); - } - PPU.CGADD++; - } - else if (Byte != (uint8_t)(PPU.CGDATA[PPU.CGADD] & 0xff)) - { - FLUSH_REDRAW(); - PPU.CGDATA[PPU.CGADD] &= 0x7F00; - PPU.CGDATA[PPU.CGADD] |= Byte; - IPPU.ColorsChanged = true; - IPPU.Red [PPU.CGADD] = IPPU.XB [Byte & 0x1f]; - IPPU.Green [PPU.CGADD] = IPPU.XB [(PPU.CGDATA[PPU.CGADD] >> 5) & 0x1f]; - IPPU.ScreenColors [PPU.CGADD] = (uint16_t) BUILD_PIXEL(IPPU.Red [PPU.CGADD], - IPPU.Green [PPU.CGADD], - IPPU.Blue [PPU.CGADD]); - } - PPU.CGFLIP = !PPU.CGFLIP; -} - -void REGISTER_2180(uint8_t Byte) -{ - Memory.RAM[PPU.WRAM++] = Byte; - PPU.WRAM &= 0x1FFFF; - Memory.FillRAM [0x2180] = Byte; -} diff --git a/source/ppu.h b/source/ppu.h index 5101f02..d700497 100644 --- a/source/ppu.h +++ b/source/ppu.h @@ -5,7 +5,7 @@ #define FIRST_VISIBLE_LINE 1 -extern uint8_t GetBank; +extern uint8_t GetBank; extern uint16_t SignExtend [2]; #define TILE_2BIT 0 @@ -22,55 +22,47 @@ extern uint16_t SignExtend [2]; #define SA1_DMA_IRQ_SOURCE (1 << 5) #define SA1_IRQ_SOURCE (1 << 7) -struct ClipData +typedef struct { - uint32_t Count [6]; - uint32_t Left [6][6]; - uint32_t Right [6][6]; -}; + uint32_t Count [6]; + uint32_t Left [6][6]; + uint32_t Right [6][6]; +} ClipData; typedef struct { - bool ColorsChanged; - uint8_t HDMA; - bool HDMAStarted; - uint8_t MaxBrightness; - bool LatchedBlanking; - bool OBJChanged; - bool RenderThisFrame; - bool DirectColourMapsNeedRebuild; - uint32_t FrameCount; - uint32_t RenderedFramesCount; - uint32_t DisplayedRenderedFrameCount; - uint32_t SkippedFrames; - uint32_t FrameSkip; - uint8_t* TileCache [3]; - uint8_t* TileCached [3]; - bool FirstVRAMRead; - bool DoubleHeightPixels; - bool Interlace; - bool InterlaceSprites; - bool DoubleWidthPixels; - bool HalfWidthPixels; - int32_t RenderedScreenHeight; - int32_t RenderedScreenWidth; - uint32_t Red [256]; - uint32_t Green [256]; - uint32_t Blue [256]; - uint8_t* XB; - uint16_t ScreenColors [256]; - int32_t PreviousLine; - int32_t CurrentLine; - int32_t Controller; - uint32_t Joypads[5]; - uint32_t SuperScope; - uint32_t Mouse[2]; - int32_t PrevMouseX[2]; - int32_t PrevMouseY[2]; - struct ClipData Clip [2]; + bool ColorsChanged; + uint8_t HDMA; + bool OBJChanged; + bool RenderThisFrame; + bool DirectColourMapsNeedRebuild; + uint32_t FrameCount; + uint8_t* TileCache [3]; + uint8_t* TileCached [3]; + bool FirstVRAMRead; + bool DoubleHeightPixels; + bool Interlace; + bool DoubleWidthPixels; + bool HalfWidthPixels; + int32_t RenderedScreenHeight; + int32_t RenderedScreenWidth; + uint32_t Red [256]; + uint32_t Green [256]; + uint32_t Blue [256]; + uint8_t* XB; + uint16_t ScreenColors [256]; + int32_t PreviousLine; + int32_t CurrentLine; + int32_t Controller; + uint32_t Joypads [5]; + uint32_t SuperScope; + uint32_t Mouse [2]; + int32_t PrevMouseX[2]; + int32_t PrevMouseY[2]; + ClipData Clip [2]; } InternalPPU; -struct SOBJ +typedef struct { int16_t HPos; uint16_t VPos; @@ -80,7 +72,7 @@ struct SOBJ uint8_t Priority; uint8_t Palette; uint8_t Size; -}; +} SOBJ; typedef struct { @@ -108,35 +100,31 @@ typedef struct uint16_t SCSize; } BG [4]; - bool CGFLIP; - uint16_t CGDATA [256]; - uint8_t FirstSprite; - uint8_t LastSprite; - struct SOBJ OBJ [128]; - uint8_t OAMPriorityRotation; - uint16_t OAMAddr; - uint8_t RangeTimeOver; - + bool CGFLIP; + uint16_t CGDATA [256]; + uint8_t FirstSprite; + uint8_t UNUSED1; + SOBJ OBJ [128]; + uint8_t OAMPriorityRotation; + uint16_t OAMAddr; + uint8_t RangeTimeOver; uint8_t OAMFlip; - uint16_t OAMTileAddress; + uint16_t UNUSED2; uint16_t IRQVBeamPos; uint16_t IRQHBeamPos; uint16_t VBeamPosLatched; uint16_t HBeamPosLatched; - - uint8_t HBeamFlip; - uint8_t VBeamFlip; - uint8_t HVBeamCounterLatched; - - int16_t MatrixA; - int16_t MatrixB; - int16_t MatrixC; - int16_t MatrixD; - int16_t CentreX; - int16_t CentreY; - uint8_t Joypad1ButtonReadPos; - uint8_t Joypad2ButtonReadPos; - + uint8_t HBeamFlip; + uint8_t VBeamFlip; + uint8_t UNUSED3; + int16_t MatrixA; + int16_t MatrixB; + int16_t MatrixC; + int16_t MatrixD; + int16_t CentreX; + int16_t CentreY; + uint8_t Joypad1ButtonReadPos; + uint8_t Joypad2ButtonReadPos; uint8_t CGADD; uint8_t FixedColourRed; uint8_t FixedColourGreen; @@ -144,20 +132,20 @@ typedef struct uint16_t SavedOAMAddr; uint16_t ScreenHeight; uint32_t WRAM; - uint8_t BG_Forced; + uint8_t UNUSED4; bool ForcedBlanking; - bool OBJThroughMain; - bool OBJThroughSub; + bool UNUSED5; + bool UNUSED6; uint8_t OBJSizeSelect; uint16_t OBJNameBase; - bool OBJAddition; - uint8_t OAMReadFlip; - uint8_t OAMData [512 + 32]; + bool UNUSED7; + uint8_t UNUSED8; + uint8_t OAMData [512 + 32]; bool VTimerEnabled; bool HTimerEnabled; int16_t HTimerPosition; uint8_t Mosaic; - bool BGMosaic [4]; + bool BGMosaic [4]; bool Mode7HFlip; bool Mode7VFlip; uint8_t Mode7Repeat; @@ -165,20 +153,18 @@ typedef struct uint8_t Window1Right; uint8_t Window2Left; uint8_t Window2Right; - uint8_t ClipCounts [6]; + uint8_t UNUSED9 [6]; uint8_t ClipWindowOverlapLogic [6]; - uint8_t ClipWindow1Enable [6]; - uint8_t ClipWindow2Enable [6]; - bool ClipWindow1Inside [6]; - bool ClipWindow2Inside [6]; + uint8_t ClipWindow1Enable [6]; + uint8_t ClipWindow2Enable [6]; + bool ClipWindow1Inside [6]; + bool ClipWindow2Inside [6]; bool RecomputeClipWindows; bool CGFLIPRead; uint16_t OBJNameSelect; - bool Need16x8Mulitply; + bool Need16x8Multiply; uint8_t Joypad3ButtonReadPos; - uint8_t MouseSpeed[2]; - - // XXX Do these need to be added to snapshot.cpp? + uint8_t UNUSED10 [2]; uint16_t OAMWriteRegister; uint8_t BGnxOFSbyte; uint8_t OpenBus1; @@ -192,11 +178,10 @@ typedef struct typedef struct { - bool TransferDirection; - bool AAddressFixed; - bool AAddressDecrement; - uint8_t TransferMode; - + bool TransferDirection; + bool AAddressFixed; + bool AAddressDecrement; + uint8_t TransferMode; uint8_t ABank; uint16_t AAddress; uint16_t Address; @@ -209,9 +194,9 @@ typedef struct bool HDMAIndirectAddressing; uint16_t IndirectAddress; uint8_t IndirectBank; - uint8_t Repeat; + bool Repeat; uint8_t LineCount; - uint8_t FirstLine; + bool FirstLine; } SDMA; void S9xUpdateScreen(); @@ -251,23 +236,254 @@ extern SnesModel M1SNES; extern SnesModel M2SNES; #define MAX_5C77_VERSION 0x01 -#define MAX_5C78_VERSION 0x03 #define MAX_5A22_VERSION 0x02 - -extern uint8_t REGISTER_4212(); -extern void FLUSH_REDRAW(); -extern void REGISTER_2104(uint8_t byte); -extern void REGISTER_2118(uint8_t Byte); -extern void REGISTER_2118_tile(uint8_t Byte); -extern void REGISTER_2118_linear(uint8_t Byte); -extern void REGISTER_2119(uint8_t Byte); -extern void REGISTER_2119_tile(uint8_t Byte); -extern void REGISTER_2119_linear(uint8_t Byte); -extern void REGISTER_2122(uint8_t Byte); -extern void REGISTER_2180(uint8_t Byte); +#define MAX_5C78_VERSION 0x03 //Platform specific input functions used by PPU.CPP void JustifierButtons(uint32_t*); bool JustifierOffscreen(); +static inline void FLUSH_REDRAW() +{ + if (IPPU.PreviousLine != IPPU.CurrentLine) + S9xUpdateScreen(); +} + +static inline void REGISTER_2104(uint8_t byte) +{ + if (PPU.OAMAddr & 0x100) + { + int32_t addr = ((PPU.OAMAddr & 0x10f) << 1) + (PPU.OAMFlip & 1); + if (byte != PPU.OAMData [addr]) + { + FLUSH_REDRAW(); + PPU.OAMData [addr] = byte; + IPPU.OBJChanged = true; + + // X position high bit, and sprite size (x4) + SOBJ* pObj = &PPU.OBJ [(addr & 0x1f) * 4]; + + pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 0) & 1]; + pObj++->Size = byte & 2; + pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 2) & 1]; + pObj++->Size = byte & 8; + pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 4) & 1]; + pObj++->Size = byte & 32; + pObj->HPos = (pObj->HPos & 0xFF) | SignExtend[(byte >> 6) & 1]; + pObj->Size = byte & 128; + } + PPU.OAMFlip ^= 1; + if (!(PPU.OAMFlip & 1)) + { + ++PPU.OAMAddr; + PPU.OAMAddr &= 0x1ff; + if (PPU.OAMPriorityRotation && PPU.FirstSprite != (PPU.OAMAddr >> 1)) + { + PPU.FirstSprite = (PPU.OAMAddr & 0xFE) >> 1; + IPPU.OBJChanged = true; + } + } + else if (PPU.OAMPriorityRotation && (PPU.OAMAddr & 1)) + IPPU.OBJChanged = true; + } + else if (!(PPU.OAMFlip & 1)) + { + PPU.OAMWriteRegister &= 0xff00; + PPU.OAMWriteRegister |= byte; + PPU.OAMFlip |= 1; + if (PPU.OAMPriorityRotation && (PPU.OAMAddr & 1)) + IPPU.OBJChanged = true; + } + else + { + PPU.OAMWriteRegister &= 0x00ff; + uint8_t lowbyte = (uint8_t)(PPU.OAMWriteRegister); + uint8_t highbyte = byte; + PPU.OAMWriteRegister |= byte << 8; + + int32_t addr = (PPU.OAMAddr << 1); + + if (lowbyte != PPU.OAMData [addr] || + highbyte != PPU.OAMData [addr + 1]) + { + FLUSH_REDRAW(); + PPU.OAMData [addr] = lowbyte; + PPU.OAMData [addr + 1] = highbyte; + IPPU.OBJChanged = true; + if (addr & 2) + { + // Tile + PPU.OBJ[addr = PPU.OAMAddr >> 1].Name = PPU.OAMWriteRegister & 0x1ff; + + // priority, h and v flip. + PPU.OBJ[addr].Palette = (highbyte >> 1) & 7; + PPU.OBJ[addr].Priority = (highbyte >> 4) & 3; + PPU.OBJ[addr].HFlip = (highbyte >> 6) & 1; + PPU.OBJ[addr].VFlip = (highbyte >> 7) & 1; + } + else + { + // X position (low) + PPU.OBJ[addr = PPU.OAMAddr >> 1].HPos &= 0xFF00; + PPU.OBJ[addr].HPos |= lowbyte; + + // Sprite Y position + PPU.OBJ[addr].VPos = highbyte; + } + } + PPU.OAMFlip &= ~1; + ++PPU.OAMAddr; + if (PPU.OAMPriorityRotation && PPU.FirstSprite != (PPU.OAMAddr >> 1)) + { + PPU.FirstSprite = (PPU.OAMAddr & 0xFE) >> 1; + IPPU.OBJChanged = true; + } + } + + Memory.FillRAM [0x2104] = byte; +} + +static inline void REGISTER_2118(uint8_t Byte) +{ + uint32_t address; + if (PPU.VMA.FullGraphicCount) + { + uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; + address = (((PPU.VMA.Address & ~PPU.VMA.Mask1) + + (rem >> PPU.VMA.Shift) + + ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) & 0xffff; + Memory.VRAM [address] = Byte; + } + else + Memory.VRAM[address = (PPU.VMA.Address << 1) & 0xFFFF] = Byte; + IPPU.TileCached [TILE_2BIT][address >> 4] = false; + IPPU.TileCached [TILE_4BIT][address >> 5] = false; + IPPU.TileCached [TILE_8BIT][address >> 6] = false; + if (!PPU.VMA.High) + PPU.VMA.Address += PPU.VMA.Increment; +} + +static inline void REGISTER_2118_tile(uint8_t Byte) +{ + uint32_t address; + uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; + address = (((PPU.VMA.Address & ~PPU.VMA.Mask1) + + (rem >> PPU.VMA.Shift) + + ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) & 0xffff; + Memory.VRAM [address] = Byte; + IPPU.TileCached [TILE_2BIT][address >> 4] = false; + IPPU.TileCached [TILE_4BIT][address >> 5] = false; + IPPU.TileCached [TILE_8BIT][address >> 6] = false; + if (!PPU.VMA.High) + PPU.VMA.Address += PPU.VMA.Increment; +} + +static inline void REGISTER_2118_linear(uint8_t Byte) +{ + uint32_t address; + Memory.VRAM[address = (PPU.VMA.Address << 1) & 0xFFFF] = Byte; + IPPU.TileCached [TILE_2BIT][address >> 4] = false; + IPPU.TileCached [TILE_4BIT][address >> 5] = false; + IPPU.TileCached [TILE_8BIT][address >> 6] = false; + if (!PPU.VMA.High) + PPU.VMA.Address += PPU.VMA.Increment; +} + +static inline void REGISTER_2119(uint8_t Byte) +{ + uint32_t address; + if (PPU.VMA.FullGraphicCount) + { + uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; + address = ((((PPU.VMA.Address & ~PPU.VMA.Mask1) + + (rem >> PPU.VMA.Shift) + + ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) + 1) & 0xFFFF; + Memory.VRAM [address] = Byte; + } + else + Memory.VRAM[address = ((PPU.VMA.Address << 1) + 1) & 0xFFFF] = Byte; + IPPU.TileCached [TILE_2BIT][address >> 4] = false; + IPPU.TileCached [TILE_4BIT][address >> 5] = false; + IPPU.TileCached [TILE_8BIT][address >> 6] = false; + if (PPU.VMA.High) + PPU.VMA.Address += PPU.VMA.Increment; +} + +static inline void REGISTER_2119_tile(uint8_t Byte) +{ + uint32_t rem = PPU.VMA.Address & PPU.VMA.Mask1; + uint32_t address = ((((PPU.VMA.Address & ~PPU.VMA.Mask1) + + (rem >> PPU.VMA.Shift) + + ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3)) << 1) + 1) & 0xFFFF; + Memory.VRAM [address] = Byte; + IPPU.TileCached [TILE_2BIT][address >> 4] = false; + IPPU.TileCached [TILE_4BIT][address >> 5] = false; + IPPU.TileCached [TILE_8BIT][address >> 6] = false; + if (PPU.VMA.High) + PPU.VMA.Address += PPU.VMA.Increment; +} + +static inline void REGISTER_2119_linear(uint8_t Byte) +{ + uint32_t address; + Memory.VRAM[address = ((PPU.VMA.Address << 1) + 1) & 0xFFFF] = Byte; + IPPU.TileCached [TILE_2BIT][address >> 4] = false; + IPPU.TileCached [TILE_4BIT][address >> 5] = false; + IPPU.TileCached [TILE_8BIT][address >> 6] = false; + if (PPU.VMA.High) + PPU.VMA.Address += PPU.VMA.Increment; +} + +static inline void REGISTER_2122(uint8_t Byte) +{ + if (PPU.CGFLIP) + { + if ((Byte & 0x7f) != (PPU.CGDATA[PPU.CGADD] >> 8)) + { + FLUSH_REDRAW(); + PPU.CGDATA[PPU.CGADD] &= 0x00FF; + PPU.CGDATA[PPU.CGADD] |= (Byte & 0x7f) << 8; + IPPU.ColorsChanged = true; + IPPU.Blue [PPU.CGADD] = IPPU.XB [(Byte >> 2) & 0x1f]; + IPPU.Green [PPU.CGADD] = IPPU.XB [(PPU.CGDATA[PPU.CGADD] >> 5) & 0x1f]; + IPPU.ScreenColors [PPU.CGADD] = (uint16_t) BUILD_PIXEL(IPPU.Red [PPU.CGADD], + IPPU.Green [PPU.CGADD], + IPPU.Blue [PPU.CGADD]); + } + PPU.CGADD++; + } + else if (Byte != (uint8_t)(PPU.CGDATA[PPU.CGADD] & 0xff)) + { + FLUSH_REDRAW(); + PPU.CGDATA[PPU.CGADD] &= 0x7F00; + PPU.CGDATA[PPU.CGADD] |= Byte; + IPPU.ColorsChanged = true; + IPPU.Red [PPU.CGADD] = IPPU.XB [Byte & 0x1f]; + IPPU.Green [PPU.CGADD] = IPPU.XB [(PPU.CGDATA[PPU.CGADD] >> 5) & 0x1f]; + IPPU.ScreenColors [PPU.CGADD] = (uint16_t) BUILD_PIXEL(IPPU.Red [PPU.CGADD], IPPU.Green [PPU.CGADD], IPPU.Blue [PPU.CGADD]); + } + PPU.CGFLIP = !PPU.CGFLIP; +} + +static inline void REGISTER_2180(uint8_t Byte) +{ + Memory.RAM[PPU.WRAM++] = Byte; + PPU.WRAM &= 0x1FFFF; + Memory.FillRAM [0x2180] = Byte; +} + +static inline uint8_t REGISTER_4212() +{ + uint8_t GetBank = 0; + if (CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE && + CPU.V_Counter < PPU.ScreenHeight + FIRST_VISIBLE_LINE + 3) + GetBank = 1; + + GetBank |= CPU.Cycles >= Settings.HBlankStart ? 0x40 : 0; + if (CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE) + GetBank |= 0x80; /* XXX: 0x80 or 0xc0 ? */ + + return GetBank; +} + #endif diff --git a/source/sa1.h b/source/sa1.h index 6eb9935..7bd02cb 100644 --- a/source/sa1.h +++ b/source/sa1.h @@ -43,7 +43,7 @@ typedef struct uint32_t WaitCounter; uint8_t* WaitByteAddress1; uint8_t* WaitByteAddress2; - uint8_t* Map [MEMMAP_NUM_BLOCKS]; + uint8_t* Map [MEMMAP_NUM_BLOCKS]; uint8_t* WriteMap [MEMMAP_NUM_BLOCKS]; int16_t op1; int16_t op2; @@ -104,8 +104,7 @@ static inline void S9xSA1UnpackStatus() static inline void S9xSA1PackStatus() { SA1.Registers.PL &= ~(Zero | Negative | Carry | Overflow); - SA1.Registers.PL |= SA1._Carry | ((SA1._Zero == 0) << 1) | - (SA1._Negative & 0x80) | (SA1._Overflow << 6); + SA1.Registers.PL |= SA1._Carry | ((SA1._Zero == 0) << 1) | (SA1._Negative & 0x80) | (SA1._Overflow << 6); } static inline void S9xSA1FixCycles() diff --git a/source/sa1cpu.c b/source/sa1cpu.c index 272eb52..28f0c59 100644 --- a/source/sa1cpu.c +++ b/source/sa1cpu.c @@ -47,7 +47,6 @@ #define StackRelative SA1StackRelative #define StackRelativeIndirectIndexed SA1StackRelativeIndirectIndexed -#undef VAR_CYCLES #define SA1_OPCODES #include "cpuops.c" @@ -74,9 +73,7 @@ void S9xSA1MainLoop() for (i = 0; i < 3 && SA1.Executing; i++) { -#ifdef CPU_SHUTDOWN SA1.PCAtOpcodeStart = SA1.PC; -#endif (*SA1.S9xOpcodes [*SA1.PC++].S9xOpcode)(); } } diff --git a/source/sar.h b/source/sar.h index 9d0861e..635477a 100644 --- a/source/sar.h +++ b/source/sar.h @@ -8,16 +8,17 @@ #include "port.h" #ifdef RIGHTSHIFT_IS_SAR -#define SAR8(b, n) ((b)>>(n)) -#define SAR16(b, n) ((b)>>(n)) -#define SAR32(b, n) ((b)>>(n)) -#define SAR64(b, n) ((b)>>(n)) +#define SAR8(b, n) ((b) >> (n)) +#define SAR16(b, n) ((b) >> (n)) +#define SAR32(b, n) ((b) >> (n)) +#define SAR64(b, n) ((b) >> (n)) #else static inline int8_t SAR8(const int8_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT8_IS_SAR - if (b < 0) return (b >> n) | (-1 << (8 - n)); + if (b < 0) + return (b >> n) | (~0u << (8 - n)); #endif return b >> n; } @@ -25,7 +26,8 @@ static inline int8_t SAR8(const int8_t b, const int32_t n) static inline int16_t SAR16(const int16_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT16_IS_SAR - if (b < 0) return (b >> n) | (-1 << (16 - n)); + if (b < 0) + return (b >> n) | (~0u << (16 - n)); #endif return b >> n; } @@ -33,7 +35,8 @@ static inline int16_t SAR16(const int16_t b, const int32_t n) static inline int32_t SAR32(const int32_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT32_IS_SAR - if (b < 0) return (b >> n) | (-1 << (32 - n)); + if (b < 0) + return (b >> n) | (~0u << (32 - n)); #endif return b >> n; } @@ -41,7 +44,8 @@ static inline int32_t SAR32(const int32_t b, const int32_t n) static inline int64_t SAR64(const int64_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT64_IS_SAR - if (b < 0) return (b >> n) | (-1 << (64 - n)); + if (b < 0) + return (b >> n) | (~0u << (64 - n)); #endif return b >> n; } diff --git a/source/sdd1emu.c b/source/sdd1emu.c index 5634960..fc2e809 100644 --- a/source/sdd1emu.c +++ b/source/sdd1emu.c @@ -36,52 +36,52 @@ static struct uint8_t LPS_next; } evolution_table[] = { - /* 0 */ { 0, 25, 25}, - /* 1 */ { 0, 2, 1}, - /* 2 */ { 0, 3, 1}, - /* 3 */ { 0, 4, 2}, - /* 4 */ { 0, 5, 3}, - /* 5 */ { 1, 6, 4}, - /* 6 */ { 1, 7, 5}, - /* 7 */ { 1, 8, 6}, - /* 8 */ { 1, 9, 7}, - /* 9 */ { 2, 10, 8}, - /* 10 */ { 2, 11, 9}, - /* 11 */ { 2, 12, 10}, - /* 12 */ { 2, 13, 11}, - /* 13 */ { 3, 14, 12}, - /* 14 */ { 3, 15, 13}, - /* 15 */ { 3, 16, 14}, - /* 16 */ { 3, 17, 15}, - /* 17 */ { 4, 18, 16}, - /* 18 */ { 4, 19, 17}, - /* 19 */ { 5, 20, 18}, - /* 20 */ { 5, 21, 19}, - /* 21 */ { 6, 22, 20}, - /* 22 */ { 6, 23, 21}, - /* 23 */ { 7, 24, 22}, - /* 24 */ { 7, 24, 23}, - /* 25 */ { 0, 26, 1}, - /* 26 */ { 1, 27, 2}, - /* 27 */ { 2, 28, 4}, - /* 28 */ { 3, 29, 8}, - /* 29 */ { 4, 30, 12}, - /* 30 */ { 5, 31, 16}, - /* 31 */ { 6, 32, 18}, - /* 32 */ { 7, 24, 22} + /* 0 */ { 0, 25, 25 }, + /* 1 */ { 0, 2, 1 }, + /* 2 */ { 0, 3, 1 }, + /* 3 */ { 0, 4, 2 }, + /* 4 */ { 0, 5, 3 }, + /* 5 */ { 1, 6, 4 }, + /* 6 */ { 1, 7, 5 }, + /* 7 */ { 1, 8, 6 }, + /* 8 */ { 1, 9, 7 }, + /* 9 */ { 2, 10, 8 }, + /* 10 */ { 2, 11, 9 }, + /* 11 */ { 2, 12, 10 }, + /* 12 */ { 2, 13, 11 }, + /* 13 */ { 3, 14, 12 }, + /* 14 */ { 3, 15, 13 }, + /* 15 */ { 3, 16, 14 }, + /* 16 */ { 3, 17, 15 }, + /* 17 */ { 4, 18, 16 }, + /* 18 */ { 4, 19, 17 }, + /* 19 */ { 5, 20, 18 }, + /* 20 */ { 5, 21, 19 }, + /* 21 */ { 6, 22, 20 }, + /* 22 */ { 6, 23, 21 }, + /* 23 */ { 7, 24, 22 }, + /* 24 */ { 7, 24, 23 }, + /* 25 */ { 0, 26, 1 }, + /* 26 */ { 1, 27, 2 }, + /* 27 */ { 2, 28, 4 }, + /* 28 */ { 3, 29, 8 }, + /* 29 */ { 4, 30, 12 }, + /* 30 */ { 5, 31, 16 }, + /* 31 */ { 6, 32, 18 }, + /* 32 */ { 7, 24, 22 } }; static uint8_t run_table[128] = { - 128, 64, 96, 32, 112, 48, 80, 16, 120, 56, 88, 24, 104, 40, 72, - 8, 124, 60, 92, 28, 108, 44, 76, 12, 116, 52, 84, 20, 100, 36, - 68, 4, 126, 62, 94, 30, 110, 46, 78, 14, 118, 54, 86, 22, 102, - 38, 70, 6, 122, 58, 90, 26, 106, 42, 74, 10, 114, 50, 82, 18, - 98, 34, 66, 2, 127, 63, 95, 31, 111, 47, 79, 15, 119, 55, 87, - 23, 103, 39, 71, 7, 123, 59, 91, 27, 107, 43, 75, 11, 115, 51, - 83, 19, 99, 35, 67, 3, 125, 61, 93, 29, 109, 45, 77, 13, 117, - 53, 85, 21, 101, 37, 69, 5, 121, 57, 89, 25, 105, 41, 73, 9, - 113, 49, 81, 17, 97, 33, 65, 1 + 128, 64, 96, 32, 112, 48, 80, 16, 120, 56, 88, 24, 104, 40, 72, + 8, 124, 60, 92, 28, 108, 44, 76, 12, 116, 52, 84, 20, 100, 36, + 68, 4, 126, 62, 94, 30, 110, 46, 78, 14, 118, 54, 86, 22, 102, + 38, 70, 6, 122, 58, 90, 26, 106, 42, 74, 10, 114, 50, 82, 18, + 98, 34, 66, 2, 127, 63, 95, 31, 111, 47, 79, 15, 119, 55, 87, + 23, 103, 39, 71, 7, 123, 59, 91, 27, 107, 43, 75, 11, 115, 51, + 83, 19, 99, 35, 67, 3, 125, 61, 93, 29, 109, 45, 77, 13, 117, + 53, 85, 21, 101, 37, 69, 5, 121, 57, 89, 25, 105, 41, 73, 9, + 113, 49, 81, 17, 97, 33, 65, 1 }; static inline uint8_t GetCodeword(int32_t bits) diff --git a/source/seta.h b/source/seta.h index 9c3e78b..339ba05 100644 --- a/source/seta.h +++ b/source/seta.h @@ -23,16 +23,16 @@ void S9xSetST011(uint32_t Address, uint8_t Byte); extern void (*SetSETA)(uint32_t, uint8_t); extern uint8_t(*GetSETA)(uint32_t); -typedef struct SETA_ST010_STRUCT +typedef struct { - uint8_t input_params[16]; + uint8_t input_params [16]; uint8_t output_params[16]; uint8_t op_reg; uint8_t execute; bool control_enable; } ST010_Regs; -typedef struct SETA_ST011_STRUCT +typedef struct { bool waiting4command; uint8_t status; @@ -42,10 +42,10 @@ typedef struct SETA_ST011_STRUCT uint32_t out_count; uint32_t out_index; uint8_t parameters [512]; - uint8_t output [512]; + uint8_t output [512]; } ST011_Regs; -typedef struct SETA_ST018_STRUCT +typedef struct { bool waiting4command; uint8_t status; @@ -57,7 +57,7 @@ typedef struct SETA_ST018_STRUCT uint32_t out_count; uint32_t out_index; uint8_t parameters [512]; - uint8_t output [512]; + uint8_t output [512]; } ST018_Regs; #endif diff --git a/source/seta010.c b/source/seta010.c index 89ae4f8..4e1a293 100644 --- a/source/seta010.c +++ b/source/seta010.c @@ -577,10 +577,8 @@ void S9xSetST010(uint32_t Address, uint8_t Byte) int16_t xpos_max = ST010_WORD(0x00C2); // current coordinates and direction - int32_t ypos = Memory.SRAM[0xC4] | (Memory.SRAM[0xC5] << 8) | - (Memory.SRAM[0xC6] << 16) | (Memory.SRAM[0xC7] << 24); - int32_t xpos = Memory.SRAM[0xC8] | (Memory.SRAM[0xC9] << 8) | - (Memory.SRAM[0xCA] << 16) | (Memory.SRAM[0xCB] << 24); + int32_t ypos = Memory.SRAM[0xC4] | (Memory.SRAM[0xC5] << 8) | (Memory.SRAM[0xC6] << 16) | (Memory.SRAM[0xC7] << 24); + int32_t xpos = Memory.SRAM[0xC8] | (Memory.SRAM[0xC9] << 8) | (Memory.SRAM[0xCA] << 16) | (Memory.SRAM[0xCB] << 24); uint16_t rot = Memory.SRAM[0xCC] | (Memory.SRAM[0xCD] << 8); // physics diff --git a/source/snes9x.h b/source/snes9x.h index 9ae1c1c..3107494 100644 --- a/source/snes9x.h +++ b/source/snes9x.h @@ -14,22 +14,12 @@ #define ROM_NAME_LEN 23 -#define STREAM FILE* -#define READ_STREAM(p,l,s) fread(p,1,l,s) -#define WRITE_STREAM(p,l,s) fwrite(p,1,l,s) -#define OPEN_STREAM(f,m) fopen(f,m) -#define REOPEN_STREAM(f,m) fdopen(f,m) -#define FIND_STREAM(f) ftell(f) -#define REVERT_STREAM(f,o,s) fseek(f,o,s) -#define CLOSE_STREAM(s) fclose(s) - - /* SNES screen width and height */ #define SNES_WIDTH 256 #define SNES_HEIGHT 224 #define SNES_HEIGHT_EXTENDED 239 -#define IMAGE_WIDTH (Settings.SupportHiRes ? SNES_WIDTH * 2 : SNES_WIDTH) -#define IMAGE_HEIGHT (Settings.SupportHiRes ? SNES_HEIGHT_EXTENDED * 2 : SNES_HEIGHT_EXTENDED) +#define IMAGE_WIDTH SNES_WIDTH * 2 +#define IMAGE_HEIGHT SNES_HEIGHT_EXTENDED * 2 #define SNES_MAX_NTSC_VCOUNTER 262 #define SNES_MAX_PAL_VCOUNTER 312 @@ -60,7 +50,6 @@ #define SLOW_ONE_CYCLE 8u #define TWO_CYCLES 12u - #define SNES_TR_MASK (1u << 4) #define SNES_TL_MASK (1u << 5) #define SNES_X_MASK (1u << 6) @@ -118,10 +107,10 @@ typedef struct long MemSpeed; // For savestate compatibility can't change to int32_t long MemSpeedx2; // For savestate compatibility can't change to int32_t long FastROMSpeed; // For savestate compatibility can't change to int32_t - uint32_t AutoSaveTimer; + uint32_t SaveStateVersion; bool SRAMModified; uint32_t NMITriggerPoint; - bool BRKTriggered; + bool UNUSED2; bool TriedInterleavedMode2; uint32_t NMICycleCount; uint32_t IRQCycleCount; @@ -136,27 +125,25 @@ typedef struct typedef struct { /* CPU options */ - bool APUEnabled; - bool Shutdown; - uint8_t SoundSkipMethod; - int32_t H_Max; - int32_t HBlankStart; - int32_t CyclesPercentage; - bool DisableIRQ; - bool Paused; - bool ForcedPause; - bool StopEmulation; - bool FrameAdvance; + bool APUEnabled; + bool Shutdown; + int32_t H_Max; + int32_t HBlankStart; + int32_t CyclesPercentage; + bool DisableIRQ; + bool Paused; + bool ForcedPause; + bool StopEmulation; /* Tracing options */ - bool TraceDMA; - bool TraceHDMA; - bool TraceVRAM; - bool TraceUnknownRegisters; - bool TraceDSP; + bool TraceDMA; + bool TraceHDMA; + bool TraceVRAM; + bool TraceUnknownRegisters; + bool TraceDSP; /* Joystick options */ - bool JoystickEnabled; + bool JoystickEnabled; /* ROM timing options (see also H_Max above) */ bool ForcePAL; @@ -168,15 +155,15 @@ typedef struct uint32_t SkipFrames; /* ROM image options */ - bool ForceLoROM; - bool ForceHiROM; - bool ForceHeader; - bool ForceNoHeader; - bool ForceInterleaved; - bool ForceInterleaved2; - bool ForceNotInterleaved; - - /* Peripherial options */ + bool ForceLoROM; + bool ForceHiROM; + bool ForceHeader; + bool ForceNoHeader; + bool ForceInterleaved; + bool ForceInterleaved2; + bool ForceNotInterleaved; + + /* Peripheral options */ bool ForceSuperFX; bool ForceNoSuperFX; bool ForceDSP1; @@ -192,54 +179,53 @@ typedef struct bool SuperScope; bool SRTC; uint32_t ControllerOption; + bool ShutdownMaster; + bool MultiPlayer5Master; + bool SuperScopeMaster; + bool MouseMaster; + + bool SuperFX; + bool DSP1Master; + bool SA1; + bool C4; + bool SDD1; + bool SPC7110; + bool SPC7110RTC; + bool OBC1; + uint8_t DSP; - bool ShutdownMaster; - bool MultiPlayer5Master; - bool SuperScopeMaster; - bool MouseMaster; - bool SuperFX; - bool DSP1Master; - bool SA1; - bool C4; - bool SDD1; - bool SPC7110; - bool SPC7110RTC; - bool OBC1; - uint8_t DSP; /* Sound options */ uint32_t SoundPlaybackRate; #ifdef USE_BLARGG_APU uint32_t SoundInputRate; #endif - bool TraceSoundDSP; - bool EightBitConsoleSound; // due to caching, this needs S9xSetEightBitConsoleSound() - int32_t SoundBufferSize; - int32_t SoundMixInterval; - bool SoundEnvelopeHeightReading; - bool DisableSoundEcho; - bool DisableMasterVolume; - bool SoundSync; - bool InterpolatedSound; - bool ThreadSound; - bool Mute; - bool NextAPUEnabled; + bool TraceSoundDSP; + bool EightBitConsoleSound; // due to caching, this needs S9xSetEightBitConsoleSound() + int32_t SoundBufferSize; + int32_t SoundMixInterval; + bool SoundEnvelopeHeightReading; + bool DisableSoundEcho; + bool DisableMasterVolume; + bool SoundSync; + bool InterpolatedSound; + bool ThreadSound; + bool Mute; + bool NextAPUEnabled; /* Graphics options */ - bool Transparency; - bool SupportHiRes; - bool Mode7Interpolate; + bool Transparency; + bool Mode7Interpolate; /* SNES graphics options */ - bool BGLayering; - bool DisableGraphicWindows; - bool ForceTransparency; - bool ForceNoTransparency; - bool DisableHDMA; - bool DisplayFrameRate; - bool DisableRangeTimeOver; /* XXX: unused */ + bool BGLayering; + bool DisableGraphicWindows; + bool ForceTransparency; + bool ForceNoTransparency; + bool DisableHDMA; + bool DisplayFrameRate; /* Others */ - bool ApplyCheats; + bool ApplyCheats; /* Fixes for individual games */ bool StarfoxHack; @@ -273,8 +259,6 @@ extern SCPUState CPU; extern SSNESGameFixes SNESGameFixes; extern char String [513]; -void S9xMessage(const char* message); - void S9xSetPause(uint32_t mask); void S9xClearPause(uint32_t mask); diff --git a/source/soundux.c b/source/soundux.c index 9a2839e..86db199 100644 --- a/source/soundux.c +++ b/source/soundux.c @@ -74,8 +74,6 @@ uint32_t IncreaseERate [32][10]; uint32_t DecreaseERateExp[32][10]; uint32_t KeyOffERate [10]; -static int32_t noise_gen; - #define FIXED_POINT 0x10000UL #define FIXED_POINT_REMAINDER 0xffffUL #define FIXED_POINT_SHIFT 16 @@ -113,7 +111,7 @@ void S9xAPUSetEndX(int32_t ch) APU.DSP [APU_ENDX] |= 1 << ch; } -void S9xSetEnvRate(Channel* ch, uint32_t rate, int32_t direction, int32_t target, uint32_t mode) +void S9xSetEnvRate(Channel* ch, uint32_t rate, int32_t direction, int32_t target, uint32_t mode) { ch->envx_target = target; @@ -186,7 +184,6 @@ void S9xSetEchoVolume(int16_t volume_left, int16_t volume_right) void S9xSetEchoEnable(uint8_t byte) { - SoundData.echo_channel_enable = byte; if (!SoundData.echo_write_enabled || Settings.DisableSoundEcho) byte = 0; if (byte && !SoundData.echo_enable) @@ -214,8 +211,7 @@ void S9xSetEchoFeedback(int32_t feedback) void S9xSetEchoDelay(int32_t delay) { - SoundData.echo_buffer_size = (512 * delay * so.playback_rate) >> 15; - SoundData.echo_buffer_size <<= 1; + SoundData.echo_buffer_size = (delay * so.playback_rate) >> 5; if (SoundData.echo_buffer_size) SoundData.echo_ptr %= SoundData.echo_buffer_size; else @@ -249,7 +245,6 @@ void S9xSetSoundKeyOff(int32_t channel) void S9xFixSoundAfterSnapshotLoad() { SoundData.echo_write_enabled = !(APU.DSP [APU_FLG] & 0x20); - SoundData.echo_channel_enable = APU.DSP [APU_EON]; S9xSetEchoDelay(APU.DSP [APU_EDL] & 0xf); S9xSetEchoFeedback((int8_t) APU.DSP [APU_EFB]); @@ -306,8 +301,7 @@ void S9xSetSoundADSR(int32_t channel, int32_t attack_ind, int32_t decay_ind, int S9xSetEnvRate(ch, attack_rate, 1, 127, 0); break; case SOUND_DECAY: - S9xSetEnvRate(ch, decay_rate, -1, - (MAX_ENVELOPE_HEIGHT * (sustain_level + 1)) >> 3, 1 << 28); + S9xSetEnvRate(ch, decay_rate, -1, (MAX_ENVELOPE_HEIGHT * (sustain_level + 1)) >> 3, 1 << 28); break; case SOUND_SUSTAIN: S9xSetEnvRate(ch, sustain_rate, -1, 0, 2 << 28); @@ -335,14 +329,12 @@ int32_t S9xGetEnvelopeHeight(int32_t channel) SNESGameFixes.SoundEnvelopeHeightReading2) && SoundData.channels[channel].state != SOUND_SILENT && SoundData.channels[channel].state != SOUND_GAIN) - return (SoundData.channels[channel].envx); + return SoundData.channels[channel].envx; - //siren fix from XPP - if (SNESGameFixes.SoundEnvelopeHeightReading2 && - SoundData.channels[channel].state != SOUND_SILENT) - return (SoundData.channels[channel].envx); + if (SNESGameFixes.SoundEnvelopeHeightReading2 && SoundData.channels[channel].state != SOUND_SILENT) + return SoundData.channels[channel].envx; - return (0); + return 0; } void S9xSetSoundFrequency(int32_t channel, int32_t hertz) // hertz [0~64K<<1] @@ -710,9 +702,9 @@ static inline void MixStereo(int32_t sample_count) else { // Snes9x 1.53's SPC_DSP.cpp, by blargg - int32_t feedback = (noise_gen << 13) ^ (noise_gen << 14); - noise_gen = (feedback & 0x4000) ^ (noise_gen >> 1); - ch->sample = (noise_gen << 17) >> 17; + int32_t feedback = (so.noise_gen << 13) ^ (so.noise_gen << 14); + so.noise_gen = (feedback & 0x4000) ^ (so.noise_gen >> 1); + ch->sample = (so.noise_gen << 17) >> 17; ch->interpolate = 0; } @@ -740,12 +732,11 @@ static inline void MixStereo(int32_t sample_count) if (!ch->echo_buf_ptr) continue; - + ch->echo_buf_ptr [I ] += VL; ch->echo_buf_ptr [I + 1] += VR; } -stereo_exit: - ; +stereo_exit:; } } @@ -862,13 +853,12 @@ void S9xResetSound(bool full) FilterTaps [6] = 0; FilterTaps [7] = 0; FilterTapDefinitionBitfield = 0; - noise_gen = 1; + so.noise_gen = 1; if (full) { SoundData.echo_enable = 0; SoundData.echo_write_enabled = 0; - SoundData.echo_channel_enable = 0; SoundData.pitch_mod = 0; SoundData.master_volume[0] = 0; SoundData.master_volume[1] = 0; diff --git a/source/soundux.h b/source/soundux.h index 72f00df..acf4664 100644 --- a/source/soundux.h +++ b/source/soundux.h @@ -5,17 +5,28 @@ #ifndef _SOUND_H_ #define _SOUND_H_ -enum { SOUND_SAMPLE = 0, SOUND_NOISE, SOUND_EXTRA_NOISE, SOUND_MUTE }; -enum { SOUND_SILENT, SOUND_ATTACK, SOUND_DECAY, SOUND_SUSTAIN, - SOUND_RELEASE, SOUND_GAIN, SOUND_INCREASE_LINEAR, - SOUND_INCREASE_BENT_LINE, SOUND_DECREASE_LINEAR, - SOUND_DECREASE_EXPONENTIAL - }; +enum +{ + SOUND_SAMPLE = 0, + SOUND_NOISE, + SOUND_EXTRA_NOISE, + SOUND_MUTE +}; -enum { MODE_NONE = SOUND_SILENT, MODE_ADSR, MODE_RELEASE = SOUND_RELEASE, - MODE_GAIN, MODE_INCREASE_LINEAR, MODE_INCREASE_BENT_LINE, - MODE_DECREASE_LINEAR, MODE_DECREASE_EXPONENTIAL - }; +enum +{ + SOUND_SILENT, SOUND_ATTACK, SOUND_DECAY, SOUND_SUSTAIN, + SOUND_RELEASE, SOUND_GAIN, SOUND_INCREASE_LINEAR, + SOUND_INCREASE_BENT_LINE, SOUND_DECREASE_LINEAR, + SOUND_DECREASE_EXPONENTIAL +}; + +enum +{ + MODE_NONE = SOUND_SILENT, MODE_ADSR, MODE_RELEASE = SOUND_RELEASE, + MODE_GAIN, MODE_INCREASE_LINEAR, MODE_INCREASE_BENT_LINE, + MODE_DECREASE_LINEAR, MODE_DECREASE_EXPONENTIAL +}; #define MAX_ENVELOPE_HEIGHT 127 #define ENVELOPE_SHIFT 7 @@ -32,7 +43,7 @@ enum { MODE_NONE = SOUND_SILENT, MODE_ADSR, MODE_RELEASE = SOUND_RELEASE, typedef struct { int32_t playback_rate; - int32_t buffer_size; + int32_t noise_gen; uint32_t freqbase; // notaz bool mute_sound; } SoundStatus; @@ -63,7 +74,6 @@ typedef struct uint32_t sustain_level; int16_t sample; int16_t decoded [16]; - int16_t previous16 [2]; int16_t* block; uint16_t sample_number; bool last_block; @@ -76,12 +86,9 @@ typedef struct int16_t next_sample; int32_t interpolate; int32_t previous [2]; - // notaz uint8_t env_ind_attack; uint8_t env_ind_decay; uint8_t env_ind_sustain; - // Just incase they are needed in the future, for snapshot compatibility. - uint8_t dummy [29]; } Channel; typedef struct @@ -91,13 +98,10 @@ typedef struct int32_t echo_ptr; int32_t echo_buffer_size; int32_t echo_write_enabled; - int32_t echo_channel_enable; int32_t pitch_mod; - // Just incase they are needed in the future, for snapshot compatibility. - uint32_t dummy [3]; Channel channels [NUM_CHANNELS]; int16_t master_volume [2]; /* range is -128 .. 127 */ - int16_t echo_volume [2]; /* range is -128 .. 127 */ + int16_t echo_volume [2]; /* range is -128 .. 127 */ int32_t noise_hertz; } SSoundData; @@ -131,8 +135,6 @@ void S9xFixEnvelope(int32_t channel, uint8_t gain, uint8_t adsr1, uint8_t adsr2) void S9xStartSample(int32_t channel); void S9xMixSamples(int16_t* buffer, int32_t sample_count); -bool S9xOpenSoundDevice(int32_t, bool, int32_t); void S9xSetPlaybackRate(uint32_t rate); #endif - #endif diff --git a/source/spc700.c b/source/spc700.c index 517f606..53bbb1b 100644 --- a/source/spc700.c +++ b/source/spc700.c @@ -8,20 +8,7 @@ #include "display.h" #include "cpuexec.h" #include "apu.h" - -// SPC700/Sound DSP chips have a 24.57MHz crystal on their PCB. - -#ifdef NO_INLINE_SET_GET -uint8_t S9xAPUGetByteZ(uint8_t address); -uint8_t S9xAPUGetByte(uint32_t address); -void S9xAPUSetByteZ(uint8_t, uint8_t address); -void S9xAPUSetByte(uint8_t, uint32_t address); - -#else -#undef INLINE -#define INLINE static inline #include "apumem.h" -#endif int8_t Int8 = 0; int16_t Int16 = 0; @@ -35,120 +22,115 @@ uint32_t Work32 = 0; #define OP1 (*(IAPU.PC + 1)) #define OP2 (*(IAPU.PC + 2)) -#ifdef SPC700_SHUTDOWN #define APUShutdown() \ if (Settings.Shutdown && (IAPU.PC == IAPU.WaitAddress1 || IAPU.PC == IAPU.WaitAddress2)) \ { \ - if (IAPU.WaitCounter == 0) \ - { \ - if (!ICPU.CPUExecuting) \ - APU.Cycles = CPU.Cycles = CPU.NextEvent; \ + if (IAPU.WaitCounter == 0) \ + { \ + if (!ICPU.CPUExecuting) \ + APU.Cycles = CPU.Cycles = CPU.NextEvent; \ + else \ + IAPU.APUExecuting = false; \ + } \ + else if (IAPU.WaitCounter >= 2) \ + IAPU.WaitCounter = 1; \ else \ - IAPU.APUExecuting = false; \ - } \ - else \ - if (IAPU.WaitCounter >= 2) \ - IAPU.WaitCounter = 1; \ - else \ - IAPU.WaitCounter--; \ + IAPU.WaitCounter--; \ } -#else -#define APUShutdown() -#endif -#define APUSetZN8(b)\ +#define APUSetZN8(b) \ IAPU._Zero = (b); -#define APUSetZN16(w)\ +#define APUSetZN16(w) \ IAPU._Zero = ((w) != 0) | ((w) >> 8); -#define TCALL(n)\ +#define TCALL(n) \ {\ SPC700_PushW (IAPU.PC - IAPU.RAM + 1); \ IAPU.PC = IAPU.RAM + S9xAPUGetByte(0xffc0 + ((15 - n) << 1)) + \ - (S9xAPUGetByte(0xffc1 + ((15 - n) << 1)) << 8); \ + (S9xAPUGetByte(0xffc1 + ((15 - n) << 1)) << 8); \ } -#define SBC(a,b)\ -Int16 = (int16_t) (a) - (int16_t) (b) + (int16_t) (APUCheckCarry ()) - 1;\ -IAPU._Carry = Int16 >= 0;\ -if ((((a) ^ (b)) & 0x80) && (((a) ^ (uint8_t) Int16) & 0x80))\ - APUSetOverflow ();\ -else \ - APUClearOverflow (); \ -APUSetHalfCarry ();\ -if(((a) ^ (b) ^ (uint8_t) Int16) & 0x10)\ - APUClearHalfCarry ();\ -(a) = (uint8_t) Int16;\ -APUSetZN8 ((uint8_t) Int16); - -#define ADC(a,b)\ -Work16 = (a) + (b) + APUCheckCarry();\ -IAPU._Carry = Work16 >= 0x100; \ -if (~((a) ^ (b)) & ((b) ^ (uint8_t) Work16) & 0x80)\ - APUSetOverflow ();\ -else \ - APUClearOverflow (); \ -APUClearHalfCarry ();\ -if(((a) ^ (b) ^ (uint8_t) Work16) & 0x10)\ - APUSetHalfCarry ();\ -(a) = (uint8_t) Work16;\ -APUSetZN8 ((uint8_t) Work16); - -#define CMP(a,b)\ -Int16 = (int16_t) (a) - (int16_t) (b);\ -IAPU._Carry = Int16 >= 0;\ -APUSetZN8 ((uint8_t) Int16); - -#define ASL(b)\ +#define SBC(a,b) \ + Int16 = (int16_t) (a) - (int16_t) (b) + (int16_t) (APUCheckCarry ()) - 1; \ + IAPU._Carry = Int16 >= 0; \ + if ((((a) ^ (b)) & 0x80) && (((a) ^ (uint8_t) Int16) & 0x80)) \ + APUSetOverflow (); \ + else \ + APUClearOverflow (); \ + APUSetHalfCarry (); \ + if(((a) ^ (b) ^ (uint8_t) Int16) & 0x10) \ + APUClearHalfCarry (); \ + (a) = (uint8_t) Int16; \ + APUSetZN8 ((uint8_t) Int16) + +#define ADC(a,b) \ + Work16 = (a) + (b) + APUCheckCarry(); \ + IAPU._Carry = Work16 >= 0x100; \ + if (~((a) ^ (b)) & ((b) ^ (uint8_t) Work16) & 0x80) \ + APUSetOverflow (); \ + else \ + APUClearOverflow (); \ + APUClearHalfCarry (); \ + if(((a) ^ (b) ^ (uint8_t) Work16) & 0x10) \ + APUSetHalfCarry (); \ + (a) = (uint8_t) Work16; \ + APUSetZN8 ((uint8_t) Work16) + +#define CMP(a,b) \ + Int16 = (int16_t) (a) - (int16_t) (b); \ + IAPU._Carry = Int16 >= 0; \ + APUSetZN8((uint8_t) Int16); + +#define ASL(b) \ IAPU._Carry = ((b) & 0x80) != 0; \ - (b) <<= 1;\ + (b) <<= 1; \ APUSetZN8 (b); -#define LSR(b)\ - IAPU._Carry = (b) & 1;\ - (b) >>= 1;\ +#define LSR(b) \ + IAPU._Carry = (b) & 1; \ + (b) >>= 1; \ APUSetZN8 (b); -#define ROL(b)\ +#define ROL(b) \ Work16 = ((b) << 1) | APUCheckCarry (); \ IAPU._Carry = Work16 >= 0x100; \ (b) = (uint8_t) Work16; \ APUSetZN8 (b); -#define ROR(b)\ +#define ROR(b) \ Work16 = (b) | ((uint16_t) APUCheckCarry () << 8); \ IAPU._Carry = (uint8_t) Work16 & 1; \ Work16 >>= 1; \ (b) = (uint8_t) Work16; \ APUSetZN8 (b); -#define Push(b)\ - *(IAPU.RAM + 0x100 + IAPU.Registers.S) = b;\ +#define Push(b) \ + *(IAPU.RAM + 0x100 + IAPU.Registers.S) = b; \ IAPU.Registers.S--; -#define Pop(b)\ - IAPU.Registers.S++;\ +#define Pop(b) \ + IAPU.Registers.S++; \ (b) = *(IAPU.RAM + 0x100 + IAPU.Registers.S); #ifdef FAST_LSB_WORD_ACCESS -#define SPC700_PushW(w)\ +#define SPC700_PushW(w) \ if (IAPU.Registers.S == 0) {\ - *(IAPU.RAM + 0x1ff) = (w);\ - *(IAPU.RAM + 0x100) = ((w) >> 8);\ + *(IAPU.RAM + 0x1ff) = (w); \ + *(IAPU.RAM + 0x100) = ((w) >> 8); \ } else { \ - *(uint16_t *) (IAPU.RAM + 0xff + IAPU.Registers.S) = w;\ + *(uint16_t *) (IAPU.RAM + 0xff + IAPU.Registers.S) = w; \ }\ IAPU.Registers.S -= 2; -#define PopW(w)\ - IAPU.Registers.S += 2;\ - if (IAPU.Registers.S == 0)\ - (w) = *(IAPU.RAM + 0x1ff) | (*(IAPU.RAM + 0x100) << 8);\ +#define PopW(w) \ + IAPU.Registers.S += 2; \ + if (IAPU.Registers.S == 0) \ + (w) = *(IAPU.RAM + 0x1ff) | (*(IAPU.RAM + 0x100) << 8); \ else \ (w) = *(uint16_t *) (IAPU.RAM + 0xff + IAPU.Registers.S); #else -#define SPC700_PushW(w)\ - *(IAPU.RAM + 0xff + IAPU.Registers.S) = w;\ - *(IAPU.RAM + 0x100 + IAPU.Registers.S) = ((w) >> 8);\ +#define SPC700_PushW(w) \ + *(IAPU.RAM + 0xff + IAPU.Registers.S) = w; \ + *(IAPU.RAM + 0x100 + IAPU.Registers.S) = ((w) >> 8); \ IAPU.Registers.S -= 2; -#define PopW(w)\ +#define PopW(w) \ IAPU.Registers.S += 2; \ if(IAPU.Registers.S == 0) \ (w) = *(IAPU.RAM + 0x1ff) | (*(IAPU.RAM + 0x100) << 8); \ @@ -156,56 +138,56 @@ APUSetZN8 ((uint8_t) Int16); (w) = *(IAPU.RAM + 0xff + IAPU.Registers.S) + (*(IAPU.RAM + 0x100 + IAPU.Registers.S) << 8); #endif -#define Relative()\ - Int8 = OP1;\ +#define Relative() \ + Int8 = OP1; \ Int16 = (int16_t) (IAPU.PC + 2 - IAPU.RAM) + Int8; -#define Relative2()\ - Int8 = OP2;\ +#define Relative2() \ + Int8 = OP2; \ Int16 = (int16_t) (IAPU.PC + 3 - IAPU.RAM) + Int8; #ifdef FAST_LSB_WORD_ACCESS -#define IndexedXIndirect()\ +#define IndexedXIndirect() \ IAPU.Address = *(uint16_t *) (IAPU.DirectPage + ((OP1 + IAPU.Registers.X) & 0xff)); -#define Absolute()\ +#define Absolute() \ IAPU.Address = *(uint16_t *) (IAPU.PC + 1); -#define AbsoluteX()\ +#define AbsoluteX() \ IAPU.Address = *(uint16_t *) (IAPU.PC + 1) + IAPU.Registers.X; -#define AbsoluteY()\ +#define AbsoluteY() \ IAPU.Address = *(uint16_t *) (IAPU.PC + 1) + IAPU.Registers.YA.B.Y; -#define MemBit()\ - IAPU.Address = *(uint16_t *) (IAPU.PC + 1);\ - IAPU.Bit = (uint8_t)(IAPU.Address >> 13);\ +#define MemBit() \ + IAPU.Address = *(uint16_t *) (IAPU.PC + 1); \ + IAPU.Bit = (uint8_t)(IAPU.Address >> 13); \ IAPU.Address &= 0x1fff; -#define IndirectIndexedY()\ +#define IndirectIndexedY() \ IAPU.Address = *(uint16_t *) (IAPU.DirectPage + OP1) + IAPU.Registers.YA.B.Y; #else -#define IndexedXIndirect()\ +#define IndexedXIndirect() \ IAPU.Address = *(IAPU.DirectPage + ((OP1 + IAPU.Registers.X) & 0xff)) + \ - (*(IAPU.DirectPage + ((OP1 + IAPU.Registers.X + 1) & 0xff)) << 8); -#define Absolute()\ + (*(IAPU.DirectPage + ((OP1 + IAPU.Registers.X + 1) & 0xff)) << 8); +#define Absolute() \ IAPU.Address = OP1 + (OP2 << 8); -#define AbsoluteX()\ +#define AbsoluteX() \ IAPU.Address = OP1 + (OP2 << 8) + IAPU.Registers.X; -#define AbsoluteY()\ +#define AbsoluteY() \ IAPU.Address = OP1 + (OP2 << 8) + IAPU.Registers.YA.B.Y; -#define MemBit()\ - IAPU.Address = OP1 + (OP2 << 8);\ - IAPU.Bit = (int8_t) (IAPU.Address >> 13);\ +#define MemBit() \ + IAPU.Address = OP1 + (OP2 << 8); \ + IAPU.Bit = (int8_t) (IAPU.Address >> 13); \ IAPU.Address &= 0x1fff; -#define IndirectIndexedY()\ +#define IndirectIndexedY() \ IAPU.Address = *(IAPU.DirectPage + OP1) + \ - (*(IAPU.DirectPage + OP1 + 1) << 8) + \ - IAPU.Registers.YA.B.Y; + (*(IAPU.DirectPage + OP1 + 1) << 8) + \ + IAPU.Registers.YA.B.Y; #endif void Apu00() @@ -819,7 +801,6 @@ void Apu4E() void Apu0F() { // BRK - SPC700_PushW(IAPU.PC + 1 - IAPU.RAM); S9xAPUPackStatus(); Push(IAPU.Registers.P); @@ -1436,11 +1417,7 @@ void Apu3D() // INC X IAPU.Registers.X++; APUSetZN8(IAPU.Registers.X); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC++; } @@ -1449,11 +1426,7 @@ void ApuFC() // INC Y IAPU.Registers.YA.B.Y++; APUSetZN8(IAPU.Registers.YA.B.Y); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC++; } @@ -1462,11 +1435,7 @@ void Apu1D() // DEC X IAPU.Registers.X--; APUSetZN8(IAPU.Registers.X); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC++; } @@ -1475,11 +1444,7 @@ void ApuDC() // DEC Y IAPU.Registers.YA.B.Y--; APUSetZN8(IAPU.Registers.YA.B.Y); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC++; } @@ -1489,11 +1454,7 @@ void ApuAB() Work8 = S9xAPUGetByteZ(OP1) + 1; S9xAPUSetByteZ(Work8, OP1); APUSetZN8(Work8); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC += 2; } @@ -1504,11 +1465,7 @@ void ApuAC() Work8 = S9xAPUGetByte(IAPU.Address) + 1; S9xAPUSetByte(Work8, IAPU.Address); APUSetZN8(Work8); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC += 3; } @@ -1518,11 +1475,7 @@ void ApuBB() Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X) + 1; S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X); APUSetZN8(Work8); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC += 2; } @@ -1531,11 +1484,7 @@ void ApuBC() // INC A IAPU.Registers.YA.B.A++; APUSetZN8(IAPU.Registers.YA.B.A); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC++; } @@ -1545,11 +1494,7 @@ void Apu8B() Work8 = S9xAPUGetByteZ(OP1) - 1; S9xAPUSetByteZ(Work8, OP1); APUSetZN8(Work8); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC += 2; } @@ -1560,11 +1505,7 @@ void Apu8C() Work8 = S9xAPUGetByte(IAPU.Address) - 1; S9xAPUSetByte(Work8, IAPU.Address); APUSetZN8(Work8); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC += 3; } @@ -1574,11 +1515,7 @@ void Apu9B() Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X) - 1; S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X); APUSetZN8(Work8); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC += 2; } @@ -1587,11 +1524,7 @@ void Apu9C() // DEC A IAPU.Registers.YA.B.A--; APUSetZN8(IAPU.Registers.YA.B.A); - -#ifdef SPC700_SHUTDOWN IAPU.WaitCounter++; -#endif - IAPU.PC++; } @@ -2008,7 +1941,7 @@ void Apu9E() if (yva >= x) yva ^= 1; - + if (yva & 1) yva = (yva - x) & 0x1ffff; } @@ -2459,12 +2392,6 @@ void ApuFB() IAPU.PC += 2; } -#ifdef NO_INLINE_SET_GET -#undef INLINE -#define INLINE -#include "apumem.h" -#endif - void (*S9xApuOpcodes[256])() = { Apu00, Apu01, Apu02, Apu03, Apu04, Apu05, Apu06, Apu07, @@ -2500,5 +2427,4 @@ void (*S9xApuOpcodes[256])() = ApuF0, ApuF1, ApuF2, ApuF3, ApuF4, ApuF5, ApuF6, ApuF7, ApuF8, ApuF9, ApuFA, ApuFB, ApuFC, ApuFD, ApuFE, ApuFF }; - #endif diff --git a/source/spc700.h b/source/spc700.h index cbe6637..53bc1b6 100644 --- a/source/spc700.h +++ b/source/spc700.h @@ -5,13 +5,6 @@ #ifndef _SPC700_H_ #define _SPC700_H_ -#ifdef SPCTOOL -#define NO_CHANNEL_STRUCT -#include "spctool/dsp.h" -#include "spctool/spc700.h" -#include "spctool/soundmod.h" -#endif - #define Carry 1 #define Zero 2 #define Interrupt 4 @@ -43,10 +36,6 @@ #define APUCheckOverflow() (IAPU._Overflow) #define APUCheckNegative() (IAPU._Zero & 0x80) -#define APUClearFlags(f) (IAPU.Registers.P &= ~(f)) -#define APUSetFlags(f) (IAPU.Registers.P |= (f)) -#define APUCheckFlag(f) (IAPU.Registers.P & (f)) - typedef union { struct @@ -73,21 +62,6 @@ typedef struct // Needed by ILLUSION OF GAIA #define ONE_APU_CYCLE 21 -#ifdef SPCTOOL -int32_t ESPC(int32_t); - -#define APU_EXECUTE() \ -{ \ - int32_t l = (CPU.Cycles - APU.Cycles) / 14; \ - if (l > 0) \ - { \ - l -= _EmuSPC(l); \ - APU.Cycles += l * 14; \ - } \ -} - -#else - #define APU_EXECUTE1() \ { \ APU.Cycles += S9xAPUCycles [*IAPU.PC]; \ @@ -100,8 +74,6 @@ if (IAPU.APUExecuting) \ while (APU.Cycles <= CPU.Cycles) \ APU_EXECUTE1(); \ } -#endif #endif - #endif diff --git a/source/spc7110.c b/source/spc7110.c index ffaf35f..fb8f280 100644 --- a/source/spc7110.c +++ b/source/spc7110.c @@ -46,7 +46,7 @@ void (*Copy7110)() = NULL; //size and offset of the pack data //offset and size of reads from pack -typedef struct SPC7110DecompressionLocationStruct +typedef struct { uint32_t offset; uint32_t size; @@ -55,7 +55,7 @@ typedef struct SPC7110DecompressionLocationStruct } Data7110; //this maps an index.bin table to the decompression pack -typedef struct SPC7110DecompressionIndexStruct +typedef struct { int32_t table; bool is_file; @@ -63,7 +63,7 @@ typedef struct SPC7110DecompressionIndexStruct } Index7110; //this contains all the data for the decompression pack. -typedef struct SPC7110DecompressionPackStructure +typedef struct { uint8_t* binfiles[MAX_TABLES]; Index7110 tableEnts[MAX_TABLES]; diff --git a/source/spc7110.h b/source/spc7110.h index 351f29d..8557071 100644 --- a/source/spc7110.h +++ b/source/spc7110.h @@ -32,7 +32,7 @@ void SPC7110Load(char*); void SPC7110Open(char*); void SPC7110Grab(char*); -typedef struct SPC7110RTC +typedef struct { uint8_t reg[16]; int16_t index; @@ -41,7 +41,7 @@ typedef struct SPC7110RTC time_t last_used; } S7RTC; -typedef struct SPC7110EmuVars +typedef struct { uint8_t reg4800; uint8_t reg4801; diff --git a/source/srtc.h b/source/srtc.h index 592a391..0688a54 100644 --- a/source/srtc.h +++ b/source/srtc.h @@ -15,32 +15,22 @@ #define COMMAND_LOAD_RTC 0 #define COMMAND_CLEAR_RTC 4 - /*** The format of the rtc_data structure is: - Index Description Range (nibble) ----- -------------- --------------------------------------- - 0 Seconds low 0-9 1 Seconds high 0-5 - 2 Minutes low 0-9 3 Minutes high 0-5 - 4 Hour low 0-9 5 Hour high 0-2 - 6 Day low 0-9 7 Day high 0-3 - 8 Month 1-C (0xC is December, 12th month) - 9 Year ones 0-9 A Year tens 0-9 B Year High 9-B (9=19xx, A=20xx, B=21xx) - C Day of week 0-6 (0=Sunday, 1=Monday,...,6=Saturday) - ***/ typedef struct @@ -51,10 +41,9 @@ typedef struct int8_t index; uint8_t mode; time_t system_timestamp; // Of latest RTC load time - uint32_t pad; } SRTC_DATA; -extern SRTC_DATA rtc; +extern SRTC_DATA rtc; void S9xUpdateSrtcTime(); void S9xSetSRTC(uint8_t data, uint16_t Address); @@ -66,4 +55,4 @@ void S9xHardResetSRTC(); #define SRTC_SRAM_PAD (4 + 8 + 1 + MAX_RTC_INDEX) -#endif // _srtc_h +#endif // _srtc_h diff --git a/source/tile.h b/source/tile.h index 6bc4e23..2a273f6 100644 --- a/source/tile.h +++ b/source/tile.h @@ -8,7 +8,7 @@ \ uint32_t TileAddr = BG.TileAddress + ((Tile & 0x3ff) << BG.TileShift); \ if ((Tile & 0x1ff) >= 256) \ - TileAddr += BG.NameSelect; \ + TileAddr += BG.NameSelect; \ \ TileAddr &= 0xffff; \ \ @@ -16,67 +16,67 @@ pCache = &BG.Buffer[(TileNumber = (TileAddr >> BG.TileShift)) << 6]; \ \ if (!BG.Buffered [TileNumber]) \ - BG.Buffered[TileNumber] = ConvertTile (pCache, TileAddr); \ + BG.Buffered[TileNumber] = ConvertTile (pCache, TileAddr); \ \ if (BG.Buffered [TileNumber] == BLANK_TILE) \ - return; \ + return; \ \ uint32_t l; \ uint16_t *ScreenColors; \ if (BG.DirectColourMode) \ { \ - if (IPPU.DirectColourMapsNeedRebuild) \ - S9xBuildDirectColourMaps (); \ - ScreenColors = DirectColourMaps [(Tile >> 10) & BG.PaletteMask]; \ + if (IPPU.DirectColourMapsNeedRebuild) \ + S9xBuildDirectColourMaps (); \ + ScreenColors = DirectColourMaps [(Tile >> 10) & BG.PaletteMask]; \ } \ else \ - ScreenColors = &IPPU.ScreenColors [(((Tile >> 10) & BG.PaletteMask) << BG.PaletteShift) + BG.StartPalette]; + ScreenColors = &IPPU.ScreenColors [(((Tile >> 10) & BG.PaletteMask) << BG.PaletteShift) + BG.StartPalette]; #define RENDER_TILE(NORMAL, FLIPPED, N) \ switch (Tile & (V_FLIP | H_FLIP)) \ { \ case 0: \ - bp = pCache + StartLine; \ - for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ - { \ - if (*(uint32_t *) bp) \ - NORMAL (Offset, bp, ScreenColors); \ - if (*(uint32_t *) (bp + 4)) \ - NORMAL (Offset + N, bp + 4, ScreenColors); \ - } \ - break; \ + bp = pCache + StartLine; \ + for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ + { \ + if (*(uint32_t *) bp) \ + NORMAL (Offset, bp, ScreenColors); \ + if (*(uint32_t *) (bp + 4)) \ + NORMAL (Offset + N, bp + 4, ScreenColors); \ + } \ + break; \ case H_FLIP: \ - bp = pCache + StartLine; \ - for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ - { \ - if (*(uint32_t *) (bp + 4)) \ - FLIPPED (Offset, bp + 4, ScreenColors); \ - if (*(uint32_t *) bp) \ - FLIPPED (Offset + N, bp, ScreenColors); \ - } \ - break; \ + bp = pCache + StartLine; \ + for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ + { \ + if (*(uint32_t *) (bp + 4)) \ + FLIPPED (Offset, bp + 4, ScreenColors); \ + if (*(uint32_t *) bp) \ + FLIPPED (Offset + N, bp, ScreenColors); \ + } \ + break; \ case H_FLIP | V_FLIP: \ - bp = pCache + 56 - StartLine; \ - for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ - { \ - if (*(uint32_t *) (bp + 4)) \ - FLIPPED (Offset, bp + 4, ScreenColors); \ - if (*(uint32_t *) bp) \ - FLIPPED (Offset + N, bp, ScreenColors); \ - } \ - break; \ + bp = pCache + 56 - StartLine; \ + for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ + { \ + if (*(uint32_t *) (bp + 4)) \ + FLIPPED (Offset, bp + 4, ScreenColors); \ + if (*(uint32_t *) bp) \ + FLIPPED (Offset + N, bp, ScreenColors); \ + } \ + break; \ case V_FLIP: \ - bp = pCache + 56 - StartLine; \ - for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ - { \ - if (*(uint32_t *) bp) \ - NORMAL (Offset, bp, ScreenColors); \ - if (*(uint32_t *) (bp + 4)) \ - NORMAL (Offset + N, bp + 4, ScreenColors); \ - } \ - break; \ + bp = pCache + 56 - StartLine; \ + for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ + { \ + if (*(uint32_t *) bp) \ + NORMAL (Offset, bp, ScreenColors); \ + if (*(uint32_t *) (bp + 4)) \ + NORMAL (Offset + N, bp + 4, ScreenColors); \ + } \ + break; \ default: \ - break; \ + break; \ } #define TILE_CLIP_PREAMBLE \ @@ -85,168 +85,176 @@ \ if (StartPixel < 4) \ { \ - d1 = HeadMask [StartPixel]; \ - if (StartPixel + Width < 4) \ - d1 &= TailMask [StartPixel + Width]; \ + d1 = HeadMask [StartPixel]; \ + if (StartPixel + Width < 4) \ + d1 &= TailMask [StartPixel + Width]; \ } \ else \ - d1 = 0; \ + d1 = 0; \ \ if (StartPixel + Width > 4) \ { \ - if (StartPixel > 4) \ - d2 = HeadMask [StartPixel - 4]; \ - else \ - d2 = 0xffffffff; \ + if (StartPixel > 4) \ + d2 = HeadMask [StartPixel - 4]; \ + else \ + d2 = 0xffffffff; \ \ - d2 &= TailMask [(StartPixel + Width - 4)]; \ + d2 &= TailMask [(StartPixel + Width - 4)]; \ } \ else \ - d2 = 0; + d2 = 0; #define RENDER_CLIPPED_TILE(NORMAL, FLIPPED, N) \ uint32_t dd; \ switch (Tile & (V_FLIP | H_FLIP)) \ { \ case 0: \ - bp = pCache + StartLine; \ - for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ - { \ - /* This is perfectly OK, regardless of endian. The tiles are \ - * cached in leftmost-endian order (when not horiz flipped) by \ - * the ConvertTile function. \ - */ \ - if ((dd = (*(uint32_t *) bp) & d1)) \ - NORMAL (Offset, (uint8_t *) &dd, ScreenColors); \ - if ((dd = (*(uint32_t *) (bp + 4)) & d2)) \ - NORMAL (Offset + N, (uint8_t *) &dd, ScreenColors); \ - } \ - break; \ + bp = pCache + StartLine; \ + for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ + { \ + /* This is perfectly OK, regardless of endianness. The tiles are \ + * cached in leftmost-endian order (when not horiz flipped) by \ + * the ConvertTile function. \ + */ \ + if ((dd = (*(uint32_t *) bp) & d1)) \ + NORMAL (Offset, (uint8_t *) &dd, ScreenColors); \ + if ((dd = (*(uint32_t *) (bp + 4)) & d2)) \ + NORMAL (Offset + N, (uint8_t *) &dd, ScreenColors); \ + } \ + break; \ case H_FLIP: \ - bp = pCache + StartLine; \ - SWAP_DWORD (d1); \ - SWAP_DWORD (d2); \ - for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ - { \ - if ((dd = *(uint32_t *) (bp + 4) & d1)) \ - FLIPPED (Offset, (uint8_t *) &dd, ScreenColors); \ - if ((dd = *(uint32_t *) bp & d2)) \ - FLIPPED (Offset + N, (uint8_t *) &dd, ScreenColors); \ - } \ - break; \ + bp = pCache + StartLine; \ + SWAP_DWORD (d1); \ + SWAP_DWORD (d2); \ + for (l = LineCount; l != 0; l--, bp += 8, Offset += GFX.PPL) \ + { \ + if ((dd = *(uint32_t *) (bp + 4) & d1)) \ + FLIPPED (Offset, (uint8_t *) &dd, ScreenColors); \ + if ((dd = *(uint32_t *) bp & d2)) \ + FLIPPED (Offset + N, (uint8_t *) &dd, ScreenColors); \ + } \ + break; \ case H_FLIP | V_FLIP: \ - bp = pCache + 56 - StartLine; \ - SWAP_DWORD (d1); \ - SWAP_DWORD (d2); \ - for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ - { \ - if ((dd = *(uint32_t *) (bp + 4) & d1)) \ - FLIPPED (Offset, (uint8_t *) &dd, ScreenColors); \ - if ((dd = *(uint32_t *) bp & d2)) \ - FLIPPED (Offset + N, (uint8_t *) &dd, ScreenColors); \ - } \ - break; \ + bp = pCache + 56 - StartLine; \ + SWAP_DWORD (d1); \ + SWAP_DWORD (d2); \ + for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ + { \ + if ((dd = *(uint32_t *) (bp + 4) & d1)) \ + FLIPPED (Offset, (uint8_t *) &dd, ScreenColors); \ + if ((dd = *(uint32_t *) bp & d2)) \ + FLIPPED (Offset + N, (uint8_t *) &dd, ScreenColors); \ + } \ + break; \ case V_FLIP: \ - bp = pCache + 56 - StartLine; \ - for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ - { \ - if ((dd = (*(uint32_t *) bp) & d1)) \ - NORMAL (Offset, (uint8_t *) &dd, ScreenColors); \ - if ((dd = (*(uint32_t *) (bp + 4)) & d2)) \ - NORMAL (Offset + N, (uint8_t *) &dd, ScreenColors); \ - } \ - break; \ + bp = pCache + 56 - StartLine; \ + for (l = LineCount; l != 0; l--, bp -= 8, Offset += GFX.PPL) \ + { \ + if ((dd = (*(uint32_t *) bp) & d1)) \ + NORMAL (Offset, (uint8_t *) &dd, ScreenColors); \ + if ((dd = (*(uint32_t *) (bp + 4)) & d2)) \ + NORMAL (Offset + N, (uint8_t *) &dd, ScreenColors); \ + } \ + break; \ default: \ - break; \ + break; \ } #define RENDER_TILE_LARGE(PIXEL, FUNCTION) \ switch (Tile & (V_FLIP | H_FLIP)) \ { \ case H_FLIP: \ - StartPixel = 7 - StartPixel; \ - /* fallthrough for no-flip case - above was a horizontal flip */ \ + StartPixel = 7 - StartPixel; \ + /* fallthrough for no-flip case - above was a horizontal flip */ \ case 0: \ - if ((pixel = *(pCache + StartLine + StartPixel))) \ - { \ - pixel = PIXEL; \ - for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ + if ((pixel = *(pCache + StartLine + StartPixel))) \ { \ - int32_t z; \ - for (z = Pixels - 1; z >= 0; z--) \ - if (GFX.Z1 > Depth [z]) \ + pixel = PIXEL; \ + for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ { \ - sp [z] = FUNCTION(sp + z, pixel); \ - Depth [z] = GFX.Z2; \ - }\ + int32_t z; \ + for (z = Pixels - 1; z >= 0; z--) \ + { \ + if (GFX.Z1 > Depth [z]) \ + { \ + sp [z] = FUNCTION(sp + z, pixel); \ + Depth [z] = GFX.Z2; \ + }\ + } \ + } \ } \ - } \ - break; \ + break; \ case H_FLIP | V_FLIP: \ - StartPixel = 7 - StartPixel; \ - /* fallthrough for V_FLIP-only case - above was a horizontal flip */ \ + StartPixel = 7 - StartPixel; \ + /* fallthrough for V_FLIP-only case - above was a horizontal flip */ \ case V_FLIP: \ - if ((pixel = *(pCache + 56 - StartLine + StartPixel))) \ - { \ - pixel = PIXEL; \ - for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ + if ((pixel = *(pCache + 56 - StartLine + StartPixel))) \ { \ - int32_t z; \ - for (z = Pixels - 1; z >= 0; z--) \ - if (GFX.Z1 > Depth [z]) \ + pixel = PIXEL; \ + for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ { \ - sp [z] = FUNCTION(sp + z, pixel); \ - Depth [z] = GFX.Z2; \ - }\ + int32_t z; \ + for (z = Pixels - 1; z >= 0; z--) \ + { \ + if (GFX.Z1 > Depth [z]) \ + { \ + sp [z] = FUNCTION(sp + z, pixel); \ + Depth [z] = GFX.Z2; \ + }\ + } \ + } \ } \ - } \ - break; \ + break; \ default: \ - break; \ + break; \ } #define RENDER_TILE_LARGE_HALFWIDTH(PIXEL, FUNCTION) \ switch (Tile & (V_FLIP | H_FLIP)) \ { \ case H_FLIP: \ - StartPixel = 7 - StartPixel; \ - /* fallthrough for no-flip case - above was a horizontal flip */ \ + StartPixel = 7 - StartPixel; \ + /* fallthrough for no-flip case - above was a horizontal flip */ \ case 0: \ - if ((pixel = *(pCache + StartLine + StartPixel))) \ - { \ - pixel = PIXEL; \ - for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ + if ((pixel = *(pCache + StartLine + StartPixel))) \ { \ - int32_t z; \ - for (z = Pixels - 2; z >= 0; z -= 2) \ - if (GFX.Z1 > Depth [z]) \ + pixel = PIXEL; \ + for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ { \ - sp [z >> 1] = FUNCTION(sp + z, pixel); \ - Depth [z >> 1] = GFX.Z2; \ - }\ + int32_t z; \ + for (z = Pixels - 2; z >= 0; z -= 2) \ + { \ + if (GFX.Z1 > Depth [z]) \ + { \ + sp [z >> 1] = FUNCTION(sp + z, pixel); \ + Depth [z >> 1] = GFX.Z2; \ + } \ + } \ + } \ } \ - } \ - break; \ + break; \ case H_FLIP | V_FLIP: \ - StartPixel = 7 - StartPixel; \ - /* fallthrough for V_FLIP-only case - above was a horizontal flip */ \ + StartPixel = 7 - StartPixel; \ + /* fallthrough for V_FLIP-only case - above was a horizontal flip */ \ case V_FLIP: \ - if ((pixel = *(pCache + 56 - StartLine + StartPixel))) \ - { \ - pixel = PIXEL; \ - for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ + if ((pixel = *(pCache + 56 - StartLine + StartPixel))) \ { \ - int32_t z; \ - for (z = Pixels - 2; z >= 0; z -= 2) \ - if (GFX.Z1 > Depth [z]) \ + pixel = PIXEL; \ + for (l = LineCount; l != 0; l--, sp += GFX.PPL, Depth += GFX.PPL) \ { \ - sp [z >> 1] = FUNCTION(sp + z, pixel); \ - Depth [z >> 1] = GFX.Z2; \ - }\ + int32_t z; \ + for (z = Pixels - 2; z >= 0; z -= 2) \ + { \ + if (GFX.Z1 > Depth [z]) \ + { \ + sp [z >> 1] = FUNCTION(sp + z, pixel); \ + Depth [z >> 1] = GFX.Z2; \ + } \ + } \ + } \ } \ - } \ - break; \ + break; \ default: \ - break; \ + break; \ } #endif |