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is to eventually move it from the resolved-address ops as well, reducing the number of memory stores.
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FAST_ALIGNED_LSB_WORD_ACCESS and use it to read absolute 24-bit addresses as either 1 byte & 1 halfword, or 1 halfword & 1 byte.
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memory addresses being loaded every opcode.
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store instructions in many SNES, SA1 and APU opcodes.
Fix the APU half-carry bug, which may be audible.
globals.cpp: Get rid of A1, A2, A3, A4, W1, W2, W3, W4, Int8, Int16, Int32, Work8, Work16, Work32, Ans8, Ans16, Ans32.
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Run the opcode as a tail call from the address calculation. This cuts on the needed return instructions.
Pass the opcode address as a parameter; this keeps it in a register most of the time and avoids memory stores.
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SNES Open Bus is a quirk of the memory subsystem that allow reads of invalid addresses to return the last byte read from memory. However, it is seldom needed by a game, and it costs 1 to 3 MIPS instructions per SNES instruction to emulate.
If you need SNES Open Bus, you can remove -DNO_OPEN_BUS from the Makefile.
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With the MIPS instruction cache, this means that two consecutive SNES CPU instructions using e.g. the same addressing style or the same opcode have a chance that the second one will use the first one's code and that it will be cached.
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