Age | Commit message (Collapse) | Author | |
---|---|---|---|
2017-08-26 | Still cleaning things up... | João Silva | |
2017-08-14 | Deleted several unused variables, code and files. | João Silva | |
2017-08-11 | Start making this suitable for MSVC and C89 | twinaphex | |
2017-06-18 | Support for savestate versioning. Plenty of cleanups. | João Silva | |
2017-02-12 | CPU and Memory Layout accuracy improvements from uosnes and optimizations ↵ | João Silva | |
from snes9x2002. | |||
2017-01-29 | Converted most types to stdint-style (fixing a few in the process). | João Silva | |
2017-01-16 | Many cleanups. | João Silva | |
2017-01-14 | Removed a LOT of useless stuff. | João Silva | |
2017-01-14 | Moved copyright information to copyright file. | João Silva | |
2016-10-15 | Add copyright notices since certain guys try to push their luck | twinaphex | |
and 'game off the system' - UNDER NO CIRCUMSTANCES WILL ANY COMMERCIAL RIGHTS EVER BE APPROPRIATED TO ANY ONE PARTY, REGARDLESS OF ANY E-MAILS, BRIBES, ETC. | |||
2014-11-03 | use stdint/stdbool | aliaspider | |
2014-10-30 | apply a facelift | aliaspider | |
2014-10-28 | 64-bit safer | aliaspider | |
2013-01-08 | Permanently remove NO_OPEN_BUS hacks. It was a premature optimisation. | Nebuleon Fumika | |
2013-01-04 | Move some CPU cycle calculation from address resolution to the opcodes. This ↵ | Nebuleon Fumika | |
is to eventually move it from the resolved-address ops as well, reducing the number of memory stores. | |||
2012-12-31 | MIPS requires 2-byte reads to be aligned to even addresses. #define ↵ | Nebuleon Fumika | |
FAST_ALIGNED_LSB_WORD_ACCESS and use it to read absolute 24-bit addresses as either 1 byte & 1 halfword, or 1 halfword & 1 byte. | |||
2012-12-26 | Merge Registers structures into their respective CPUs to avoid additional ↵ | Nebuleon Fumika | |
memory addresses being loaded every opcode. | |||
2012-12-24 | End the use of global variables for CPU emulation. This creates fewer memory ↵ | Nebuleon Fumika | |
store instructions in many SNES, SA1 and APU opcodes. Fix the APU half-carry bug, which may be audible. globals.cpp: Get rid of A1, A2, A3, A4, W1, W2, W3, W4, Int8, Int16, Int32, Work8, Work16, Work32, Ans8, Ans16, Ans32. | |||
2012-12-23 | Various optimisations in the CPU emulation. | Nebuleon Fumika | |
Run the opcode as a tail call from the address calculation. This cuts on the needed return instructions. Pass the opcode address as a parameter; this keeps it in a register most of the time and avoids memory stores. | |||
2012-12-20 | Remove the SNES Open Bus behaviour by default. Also simplify translation again. | Nebuleon Fumika | |
SNES Open Bus is a quirk of the memory subsystem that allow reads of invalid addresses to return the last byte read from memory. However, it is seldom needed by a game, and it costs 1 to 3 MIPS instructions per SNES instruction to emulate. If you need SNES Open Bus, you can remove -DNO_OPEN_BUS from the Makefile. | |||
2012-12-18 | Un-inline a bunch of stuff. | Nebuleon Fumika | |
With the MIPS instruction cache, this means that two consecutive SNES CPU instructions using e.g. the same addressing style or the same opcode have a chance that the second one will use the first one's code and that it will be cached. | |||
2011-03-05 | first commit | Kitty Draper | |