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2014-10-30apply a faceliftaliaspider
2013-01-04Move all CPU cycle calculations into cpuops.cpp.Nebuleon Fumika
2013-01-04Move some CPU cycle calculation from address resolution to the opcodes. This ↵Nebuleon Fumika
is to eventually move it from the resolved-address ops as well, reducing the number of memory stores.
2012-12-26Merge Registers structures into their respective CPUs to avoid additional ↵Nebuleon Fumika
memory addresses being loaded every opcode.
2012-12-24End the use of global variables for CPU emulation. This creates fewer memory ↵Nebuleon Fumika
store instructions in many SNES, SA1 and APU opcodes. Fix the APU half-carry bug, which may be audible. globals.cpp: Get rid of A1, A2, A3, A4, W1, W2, W3, W4, Int8, Int16, Int32, Work8, Work16, Work32, Ans8, Ans16, Ans32.
2012-12-23Various optimisations in the CPU emulation.Nebuleon Fumika
Run the opcode as a tail call from the address calculation. This cuts on the needed return instructions. Pass the opcode address as a parameter; this keeps it in a register most of the time and avoids memory stores.
2012-12-18Un-inline a bunch of stuff.Nebuleon Fumika
With the MIPS instruction cache, this means that two consecutive SNES CPU instructions using e.g. the same addressing style or the same opcode have a chance that the second one will use the first one's code and that it will be cached.
2011-03-05first commitKitty Draper