aboutsummaryrefslogtreecommitdiff
path: root/libpcsxcore/new_dynarec/assem_arm.h
diff options
context:
space:
mode:
authornotaz2012-07-29 20:47:10 +0300
committernotaz2012-07-30 00:08:17 +0300
commitc67af2ac1a8305c7377c7dda844257c5bc1545e3 (patch)
treee969568d3f4cd9343816d8a8e25b4bd913c796cb /libpcsxcore/new_dynarec/assem_arm.h
parent61bc6d40b4f6f846a0ae1b73ceecdca893c14df4 (diff)
downloadpcsx_rearmed-c67af2ac1a8305c7377c7dda844257c5bc1545e3.tar.gz
pcsx_rearmed-c67af2ac1a8305c7377c7dda844257c5bc1545e3.tar.bz2
pcsx_rearmed-c67af2ac1a8305c7377c7dda844257c5bc1545e3.zip
fix various fPIC issues
Diffstat (limited to 'libpcsxcore/new_dynarec/assem_arm.h')
-rw-r--r--libpcsxcore/new_dynarec/assem_arm.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2d9efe1..f4e36a9 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -66,5 +66,5 @@ extern char *invc_ptr;
#define BASE_ADDR 0x1000000
#else
extern char translation_cache[1 << TARGET_SIZE_2];
-#define BASE_ADDR translation_cache
+#define BASE_ADDR (u_int)translation_cache
#endif