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| author | notaz | 2010-12-21 15:46:24 +0200 |
|---|---|---|
| committer | notaz | 2010-12-22 01:24:05 +0200 |
| commit | d28b54b1d1d161b3f3acc3299c43106a022451e6 (patch) | |
| tree | 2ba7ad08ffdd0651100206931f99ece3dfa490b2 /libpcsxcore/new_dynarec/pcsxmem.c | |
| parent | 96d9fde1230e5ae6de069ff9e4a0f16185650ab5 (diff) | |
| download | pcsx_rearmed-d28b54b1d1d161b3f3acc3299c43106a022451e6.tar.gz pcsx_rearmed-d28b54b1d1d161b3f3acc3299c43106a022451e6.tar.bz2 pcsx_rearmed-d28b54b1d1d161b3f3acc3299c43106a022451e6.zip | |
core: update to newer interrupt code, seems to affect timings too
pcsxr-svn commit:
Author: weimingzhi
Date: Sat Aug 7 23:52:44 2010 +0000
refactored the interrupt scheduling code a bit to make it a little
more readable than using those "magic" numbers.
Diffstat (limited to 'libpcsxcore/new_dynarec/pcsxmem.c')
| -rw-r--r-- | libpcsxcore/new_dynarec/pcsxmem.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c index a526ac5..dc3ce69 100644 --- a/libpcsxcore/new_dynarec/pcsxmem.c +++ b/libpcsxcore/new_dynarec/pcsxmem.c @@ -134,7 +134,7 @@ static void io_write_imask16(u32 value) { psxHu16ref(0x1074) = value; if (psxHu16ref(0x1070) & value) - new_dyna_set_event(6, 1); + new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1); } static void io_write_ireg32(u32 value) @@ -148,7 +148,7 @@ static void io_write_imask32(u32 value) { psxHu32ref(0x1074) = value; if (psxHu32ref(0x1070) & value) - new_dyna_set_event(6, 1); + new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1); } static void io_write_dma_icr32(u32 value) |