core: update to newer interrupt code, seems to affect timings too

pcsxr-svn commit:
Author: weimingzhi
Date:   Sat Aug 7 23:52:44 2010 +0000

    refactored the interrupt scheduling code a bit to make it a little
    more readable than using those "magic" numbers.

1 files changed, 21 insertions, 19 deletions

diff --git a/libpcsxcore/sio.c b/libpcsxcore/sio.c
index b63f56b..8a30797 100644
--- a/libpcsxcore/sio.c
+++ b/libpcsxcore/sio.c
@@ -65,24 +65,26 @@ static unsigned int padst;
 
 char Mcd1Data[MCD_SIZE], Mcd2Data[MCD_SIZE];
 
+#define SIO_INT(eCycle) { \
+	if (!Config.Sio) { \
+		psxRegs.interrupt |= (1 << PSXINT_SIO); \
+		psxRegs.intCycle[PSXINT_SIO].cycle = eCycle; \
+		psxRegs.intCycle[PSXINT_SIO].sCycle = psxRegs.cycle; \
+		new_dyna_set_event(PSXINT_SIO, eCycle); \
+	} \
+}
+
 // clk cycle byte
 // 4us * 8bits = (PSXCLK / 1000000) * 32; (linuzappz)
 // TODO: add SioModePrescaler and BaudReg
-static inline void SIO_INT() {
-	if (!Config.Sio) {
-		psxRegs.interrupt |= 0x80;
-		psxRegs.intCycle[7 + 1] = 400;
-		psxRegs.intCycle[7] = psxRegs.cycle;
-		new_dyna_set_event(1, 400);
-	}
-}
+#define SIO_CYCLES		535
 
 void sioWrite8(unsigned char value) {
 #ifdef PAD_LOG
 	PAD_LOG("sio write8 %x\n", value);
 #endif
 	switch (padst) {
-		case 1: SIO_INT();
+		case 1: SIO_INT(SIO_CYCLES);
 			if ((value & 0x40) == 0x40) {
 				padst = 2; parp = 1;
 				if (!Config.UseNet) {
@@ -120,7 +122,7 @@ void sioWrite8(unsigned char value) {
 			parp++;
 /*			if (buf[1] == 0x45) {
 				buf[parp] = 0;
-				SIO_INT();
+				SIO_INT(SIO_CYCLES);
 				return;
 			}*/
 			if (!Config.UseNet) {
@@ -131,13 +133,13 @@ void sioWrite8(unsigned char value) {
 			}
 
 			if (parp == bufcount) { padst = 0; return; }
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 	}
 
 	switch (mcdst) {
 		case 1:
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			if (rdwr) { parp++; return; }
 			parp = 1;
 			switch (value) {
@@ -147,7 +149,7 @@ void sioWrite8(unsigned char value) {
 			}
 			return;
 		case 2: // address H
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			adrH = value;
 			*buf = 0;
 			parp = 0;
@@ -155,7 +157,7 @@ void sioWrite8(unsigned char value) {
 			mcdst = 3;
 			return;
 		case 3: // address L
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			adrL = value;
 			*buf = adrH;
 			parp = 0;
@@ -163,7 +165,7 @@ void sioWrite8(unsigned char value) {
 			mcdst = 4;
 			return;
 		case 4:
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			parp = 0;
 			switch (rdwr) {
 				case 1: // read
@@ -205,7 +207,7 @@ void sioWrite8(unsigned char value) {
 			if (rdwr == 2) {
 				if (parp < 128) buf[parp + 1] = value;
 			}
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 	}
 
@@ -253,7 +255,7 @@ void sioWrite8(unsigned char value) {
 			bufcount = 2;
 			parp = 0;
 			padst = 1;
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 		case 0x81: // start memcard
 			StatReg |= RX_RDY;
@@ -262,7 +264,7 @@ void sioWrite8(unsigned char value) {
 			bufcount = 3;
 			mcdst = 1;
 			rdwr = 0;
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 	}
 }
@@ -280,7 +282,7 @@ void sioWriteCtrl16(unsigned short value) {
 	if ((CtrlReg & SIO_RESET) || (!CtrlReg)) {
 		padst = 0; mcdst = 0; parp = 0;
 		StatReg = TX_RDY | TX_EMPTY;
-		psxRegs.interrupt &= ~0x80;
+		psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 	}
 }