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author | hizzlekizzle | 2020-02-29 17:23:57 -0600 |
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committer | GitHub | 2020-02-29 17:23:57 -0600 |
commit | 3f2f57c982ffead643957db5b26931df4913596f (patch) | |
tree | e87ebc1ef6ed9d4b93e399d4d9e2e003a0e3386b /3ds/3ds_cache_utils.S | |
parent | c513ecee59b088014369ab30af634a1cc06fda37 (diff) | |
parent | 6a50b8a68d5a0595dc78c90f5d0969021beb7ea1 (diff) | |
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Merge pull request #64 from justinweiss/3ds-fix-prefetch-abort
[3DS] Fix dynarec prefetch aborts
Diffstat (limited to '3ds/3ds_cache_utils.S')
-rw-r--r-- | 3ds/3ds_cache_utils.S | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/3ds/3ds_cache_utils.S b/3ds/3ds_cache_utils.S new file mode 100644 index 0000000..c8df651 --- /dev/null +++ b/3ds/3ds_cache_utils.S @@ -0,0 +1,25 @@ + .text + .arm + .balign 4 + + .func ctr_clear_cache_kernel +ctr_clear_cache_kernel: + cpsid aif + mov r0, #0 + mcr p15, 0, r0, c7, c10, 0 @ Clean entire data cache + mcr p15, 0, r0, c7, c10, 5 @ Data Memory Barrier + mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire instruction cache / Flush BTB + mcr p15, 0, r0, c7, c10, 4 @ Data Sync Barrier + bx lr + .endfunc + + @@ Clear the entire data cache / invalidate the instruction cache. Uses + @@ Rosalina svcCustomBackdoor to avoid svcBackdoor stack corruption + @@ during interrupts. + .global ctr_clear_cache + .func ctr_clear_cache +ctr_clear_cache: + ldr r0, =ctr_clear_cache_kernel + svc 0x80 @ svcCustomBackdoor + bx lr + .endfunc |