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| author | Autechre | 2021-03-27 00:31:51 +0100 |
|---|---|---|
| committer | GitHub | 2021-03-27 00:31:51 +0100 |
| commit | 08d2fa1ebe9e259da228dfa5e5086bd5b62c4347 (patch) | |
| tree | 73d1a6eba45d5ed80a698b254332c8e9de2b7bd2 /psp/mips_stub.S | |
| parent | 53cc4a2475ebc8cc510dc97fe8db95939230cee9 (diff) | |
| parent | 452ba76ba898c5fc6d176ae8f8e2d77cf15f64a2 (diff) | |
| download | picogpsp-08d2fa1ebe9e259da228dfa5e5086bd5b62c4347.tar.gz picogpsp-08d2fa1ebe9e259da228dfa5e5086bd5b62c4347.tar.bz2 picogpsp-08d2fa1ebe9e259da228dfa5e5086bd5b62c4347.zip | |
Merge pull request #120 from davidgfnet/master
Fixes and improvements for MIPS and ARM
Diffstat (limited to 'psp/mips_stub.S')
| -rw-r--r-- | psp/mips_stub.S | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/psp/mips_stub.S b/psp/mips_stub.S index 3d046d8..1c4ad4b 100644 --- a/psp/mips_stub.S +++ b/psp/mips_stub.S @@ -40,6 +40,7 @@ .global reg_check .global palette_ram .global palette_ram_converted +.global oam_ram .global init_emitter .global mips_lookup_pc .global smc_write @@ -52,6 +53,7 @@ .global reg .global spsr .global reg_mode +.global oam_update # MIPS register layout: @@ -116,13 +118,15 @@ .equ CPU_HALT_STATE, (30 * 4) .equ CHANGED_PC_STATUS, (31 * 4) .equ COMPLETED_FRAME, (32 * 4) -.equ GP_SAVE, (33 * 4) +.equ OAM_UPDATED, (33 * 4) +.equ GP_SAVE, (34 * 4) -.equ SPSR_BASE, (0x900) -.equ REGMODE_BASE, (0x900 + 24) +.equ SPSR_BASE, (0x100 + 0x400 * 3) +.equ REGMODE_BASE, (SPSR_BASE + 24) .equ SUPERVISOR_SPSR, (3 * 4 + SPSR_BASE) .equ SUPERVISOR_LR, ((3 * (7 * 4)) + (6 * 4) + REGMODE_BASE) -.equ FNPTRS_BASE, (0x900 + 220 + 960) +.equ FNPTRS_MEMOPS, (REGMODE_BASE + 196) +.equ FNPTRS_BASE, (FNPTRS_MEMOPS + 960) .set noat .set noreorder @@ -623,6 +627,8 @@ palette_ram: .space 0x400 palette_ram_converted: .space 0x400 +oam_ram: + .space 0x400 spsr: .space 24 # u32[6] reg_mode: |