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| author | David Guillen Fandos | 2021-07-01 12:04:48 +0200 |
|---|---|---|
| committer | David Guillen Fandos | 2021-07-01 12:06:57 +0200 |
| commit | 3d874ec5e3d5675ae9513264d857a3c6c9d2417c (patch) | |
| tree | b117b45e7faa4a9d19c012bcaca5d23491280fe3 /psp | |
| parent | 836e51b694f33d864cf4962d1dd3718bb56803c6 (diff) | |
| download | picogpsp-3d874ec5e3d5675ae9513264d857a3c6c9d2417c.tar.gz picogpsp-3d874ec5e3d5675ae9513264d857a3c6c9d2417c.tar.bz2 picogpsp-3d874ec5e3d5675ae9513264d857a3c6c9d2417c.zip | |
Add palette conversion routine for non-R2 MIPS
Gated MIPS_HAS_R2_INSTS not used at the moment. Tested with qemu.
Diffstat (limited to 'psp')
| -rw-r--r-- | psp/mips_emit.h | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/psp/mips_emit.h b/psp/mips_emit.h index 679c9e0..7f51b8f 100644 --- a/psp/mips_emit.h +++ b/psp/mips_emit.h @@ -2969,19 +2969,33 @@ static void emit_pmemst_stub( *tr_ptr = translation_ptr; } +// Palette conversion functions. a1 contains the palette value (16 LSB) +// Places the result in reg_temp, can use a0 as temporary register #ifdef USE_BGR_FORMAT - /* 0BGR to BGR565, for PSP */ + /* 0BGR to BGR565, only for PSP (uses ins) */ #define palette_convert() \ mips_emit_sll(reg_temp, reg_a1, 1); \ mips_emit_andi(reg_temp, reg_temp, 0xFFC0); \ mips_emit_ins(reg_temp, reg_a1, 0, 5); #else - /* 0BGR to RGB565 (clobbers a0!) */ - #define palette_convert() \ - mips_emit_ext(reg_temp, reg_a1, 10, 5); \ - mips_emit_ins(reg_temp, reg_a1, 11, 5); \ - mips_emit_ext(reg_a0, reg_a1, 5, 5); \ - mips_emit_ins(reg_temp, reg_a0, 6, 5); + /* 0BGR to RGB565 (clobbers a0) */ + #ifdef MIPS_HAS_R2_INSTS + #define palette_convert() \ + mips_emit_ext(reg_temp, reg_a1, 10, 5); \ + mips_emit_ins(reg_temp, reg_a1, 11, 5); \ + mips_emit_ext(reg_a0, reg_a1, 5, 5); \ + mips_emit_ins(reg_temp, reg_a0, 6, 5); + #else + #define palette_convert() \ + mips_emit_srl(reg_a0, reg_a1, 10); \ + mips_emit_andi(reg_temp, reg_a0, 0x1F); \ + mips_emit_sll(reg_a0, reg_a1, 1); \ + mips_emit_andi(reg_a0, reg_a0, 0x7C0); \ + mips_emit_or(reg_temp, reg_temp, reg_a0); \ + mips_emit_andi(reg_a0, reg_a1, 0x1F); \ + mips_emit_sll(reg_a0, reg_a0, 11); \ + mips_emit_or(reg_temp, reg_temp, reg_a0); + #endif #endif // Palette is accessed differently and stored in a decoded manner |