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authortwinaphex2014-12-10 01:17:37 +0100
committertwinaphex2014-12-10 01:17:37 +0100
commitfe19474dca84b5d00570e3fb5a04c8a359615f70 (patch)
tree97ea724a4515ae9bdb76dd1d72082f6ca3d16d5f /x86
parentafff31b5087e0e12a42c0301057ea56e7c6d2b75 (diff)
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Add macro parameter 'opcode' to some macros
Diffstat (limited to 'x86')
-rw-r--r--x86/x86_emit.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/x86/x86_emit.h b/x86/x86_emit.h
index efdceb5..1d4953c 100644
--- a/x86/x86_emit.h
+++ b/x86/x86_emit.h
@@ -1141,7 +1141,7 @@ typedef enum
#define rm_op_imm imm
#define arm_data_proc_reg_flags() \
- arm_decode_data_proc_reg(); \
+ arm_decode_data_proc_reg(opcode); \
if(flag_status & 0x02) \
{ \
generate_load_rm_sh(flags) \
@@ -1152,16 +1152,16 @@ typedef enum
} \
#define arm_data_proc_reg() \
- arm_decode_data_proc_reg(); \
+ arm_decode_data_proc_reg(opcode); \
generate_load_rm_sh(no_flags) \
#define arm_data_proc_imm() \
- arm_decode_data_proc_imm(); \
+ arm_decode_data_proc_imm(opcode); \
ror(imm, imm, imm_ror); \
generate_load_imm(a0, imm) \
#define arm_data_proc_imm_flags() \
- arm_decode_data_proc_imm(); \
+ arm_decode_data_proc_imm(opcode); \
if((flag_status & 0x02) && (imm_ror != 0)) \
{ \
/* Generate carry flag from integer rotation */ \
@@ -1319,7 +1319,7 @@ void function_cc execute_store_spsr(u32 new_spsr, u32 store_mask)
#define arm_psr(op_type, transfer_type, psr_reg) \
{ \
- arm_decode_psr_##op_type(); \
+ arm_decode_psr_##op_type(opcode); \
arm_psr_##transfer_type(op_type, psr_reg); \
} \
@@ -2196,7 +2196,7 @@ static void function_cc execute_swi(u32 pc)
generate_branch() \
#define arm_bx() \
- arm_decode_branchx(); \
+ arm_decode_branchx(opcode); \
generate_load_reg(a0, rn); \
generate_indirect_branch_dual(); \