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2021-03-16Remove old handlers from mips/stubDavid Guillen Fandos
2021-03-16Rewrite of the MIPS dynarec stubsDavid Guillen Fandos
This allows us to emit the handlers directly in a more efficient manner. At the same time it allows for an easy fix to emit PIC code, which is necessary for libretro. This also enables more platform specific optimizations and variations, perhaps even run-time multiplatform support.
2021-03-16Merge pull request #109 from jdgleaver/post-process-fixAutechre
Ensure post processing configuration is correctly reset in retro_deinit()
2021-03-16Ensure post processing configuration is correctly reset in retro_deinit()jdgleaver
2021-03-16Merge pull request #108 from davidgfnet/masterAutechre
Move a few more registers to context
2021-03-16Move a few more registers to contextDavid Guillen Fandos
This gets rid of some more absolute addrs in the MIPS dynarec. Tested on several platforms, we should be good.
2021-03-15Merge pull request #107 from davidgfnet/masterAutechre
Move palettes around to simplify MIPS dynarec
2021-03-15Move palettes around to simplify MIPS dynarecDavid Guillen Fandos
Will move also OAM structures to gain a few cycles per load/store. Loads can also be optimized for an extra instruction per access.
2021-03-12Merge pull request #105 from davidgfnet/masterAutechre
Fix typo
2021-03-12Fix typoDavid Guillen Fandos
2021-03-12Merge pull request #104 from davidgfnet/masterAutechre
Improve and simplify dynarec JIT area.
2021-03-12Improve and simplify dynarec JIT area.David Guillen Fandos
Also fix a regression on VITA. Use gcc/OS cache flushing routines for MIPS32 instead of synci
2021-03-12Merge pull request #103 from davidgfnet/cachestuffAutechre
Improve cache flush magic
2021-03-12Merge pull request #102 from davidgfnet/masterAutechre
Remove PSP-specific stuff from MIPS backend
2021-03-12Improve cache flush magicDavid Guillen Fandos
Make it better and more generic. Add support for MIPS32 and fix the messy PSP code.
2021-03-11Fix fd checkDavid Guillen Fandos
2021-03-10Remove PSP-specific stuff from MIPS backendDavid Guillen Fandos
This is unnecessary since newlib supports all file I/O. This is needed for other mips ports
2021-03-09Add osx-arm64 targettwinaphex
2021-03-09Merge pull request #101 from davidgfnet/masterAutechre
Remove libco
2021-03-09Add workaround for Android ARM buildsDavid Guillen Fandos
While we are at it, use ARM mode for better performance.
2021-03-09Add ios-arm64/tvos-arm64twinaphex
2021-03-08Remove libcoDavid Guillen Fandos
This removes libco and all the usages of it (+pthreads). Rewired all dynarecs and interpreter to return after every frame so that libretro can process events. This required to make dynarec re-entrant. Dynarecs were updated to check for new frame on every update (IRQ, cycle exhaustion, I/O write, etc). The performance impact of doing so should be minimal (and definitely outweight the libco gains). While at it, fixed small issues to get a bit more perf: arm dynarec was not idling correctly, mips was using stack when not needed, etc. Tested on PSP (mips), OGA (armv7), Linux (x86 and interpreter). Not tested on Android though.
2021-03-08Merge pull request #100 from davidgfnet/masterAutechre
Fix a ghost bug with some games
2021-03-08Fix a ghost bug with some gamesDavid Guillen Fandos
Affects at least SM Adv 4 on PSP, which doesn't load at all. I think the MIPS pipeline does not like invalidating the Icache and using it immediately after (seems to read an old value sometimes?). Rewired it to not do that and instead jump to the handler directly.
2021-03-06Merge pull request #99 from davidgfnet/masterAutechre
Fix x86 dynarec, broken by d10c4afe
2021-03-06Fix x86 dynarec, broken by d10c4afeDavid Guillen Fandos
The dynarec expects function args to be located in registers instead of the stack, which is not the default calling convetion in GCC/clang.
2021-03-05Merge pull request #98 from davidgfnet/masterAutechre
ARM dynarec: Do not use the stack at all
2021-03-05ARM dynarec: Do not use the stack at allDavid Guillen Fandos
Fix a C func call while at it. This is a prerequisite to make the dynarec re-entrant and get rid of libco
2021-03-05Merge pull request #97 from davidgfnet/masterAutechre
Minor ARM cleanup
2021-03-05Remove dead codeDavid Guillen Fandos
Turns out this was not even used! No need to fix it then!
2021-03-05Reduce executable size by 90%David Guillen Fandos
Turns out most of that file ends up in JIT section, which is RWX and not a very nice way to run code really (security issues aside). This also makes possible to build that file with -ggdb otherwise it complains about stuff.
2021-03-04Merge pull request #96 from davidgfnet/masterAutechre
Minor improvements in ARM stubs
2021-03-04Minor improvements in ARM stubsDavid Guillen Fandos
This gets rid of stack usage (except for callback invocations) in the dynarec execution code. A requirement to make the dynarec re-entrant.
2021-02-26Merge pull request #95 from davidgfnet/masterAutechre
Remove more dead code
2021-02-26Remove more dead codeDavid Guillen Fandos
2021-02-24Merge pull request #94 from davidgfnet/masterAutechre
Small fixes to division by zero
2021-02-23Small fixes to division by zeroDavid Guillen Fandos
This causes crashes in PSP quite often in many games. Other CPUs might (depending on the processor state) silently return zero or some undefined value. The fix is borrowed from ReGBA's codebase
2021-02-15Merge pull request #93 from davidgfnet/masterAutechre
More cleanups (mostly whitespace and unused stuff)
2021-02-15More cleanups (mostly whitespace and unused stuff)David Guillen Fandos
2021-02-13Merge pull request #92 from davidgfnet/masterAutechre
Minor cleanup in ARM and MIPS
2021-02-12Minor cleanup in ARM and MIPSDavid Guillen Fandos
Fix some small issues, mainly associated with undefined behaviour expressions
2021-02-10Merge pull request #91 from davidgfnet/masterAutechre
Fix ARM dynarec
2021-02-10Move r15 to reg_a0 (instead of reg_mem)David Guillen Fandos
I think this does not make a difference at all in the code, since PC is treated in a special way anyway (reloaded with an immediate when read and treated as an indirect branch when written). However for the sake of completeness I'm undoing what I did. (The comma fix stays :P)
2021-02-10Fix ARM dynarecDavid Guillen Fandos
Turns out there were a couple of very interesting and hard to track bugs. A missing comma made the reg list too short, leaving the 31th element at the mercy of the linker ordering algorithm, which seems to work in some cases depending on the compiler version. Also the cache flush code seemed not to work on my machine (OGA), not sure why it wored in the past :/
2021-01-27Fix libco for arm64twinaphex
2021-01-09Update .gitlab-ci.ymlAutechre
2021-01-09Update .gitlab-ci.ymlAutechre
2021-01-03Update .gitlab-ci.ymlAutechre
2020-12-19Updatetwinaphex
2020-12-06Updatetwinaphex