| Age | Commit message (Collapse) | Author |
|---|
|
Added a more thorough cache cleanup for reset/mode-change too.
Fixed the mmap initialization that ends up leaking memory.
Minor x86 asm fixes for Android.
|
|
Also rewrite a bit memory handlers for smaller functions.
|
|
This gets rid of some more absolute addrs in the MIPS dynarec.
Tested on several platforms, we should be good.
|
|
Will move also OAM structures to gain a few cycles per load/store.
Loads can also be optimized for an extra instruction per access.
|
|
This removes libco and all the usages of it (+pthreads).
Rewired all dynarecs and interpreter to return after every frame so that
libretro can process events. This required to make dynarec re-entrant.
Dynarecs were updated to check for new frame on every update (IRQ, cycle
exhaustion, I/O write, etc). The performance impact of doing so should
be minimal (and definitely outweight the libco gains). While at it,
fixed small issues to get a bit more perf: arm dynarec was not idling
correctly, mips was using stack when not needed, etc.
Tested on PSP (mips), OGA (armv7), Linux (x86 and interpreter). Not
tested on Android though.
|
|
The dynarec expects function args to be located in registers instead of
the stack, which is not the default calling convetion in GCC/clang.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
