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authorJoão Silva2017-02-12 14:46:44 +0000
committerJoão Silva2017-02-12 14:46:44 +0000
commitfb2517282da2fdfc26e58207bbb8e0a8bca35be2 (patch)
treecb331b665bc5d53ad180d5500bf37e2dfbf683d8
parentfa04c025a2108be9bd0432d3d56606e2ef3027f4 (diff)
downloadsnes9x2005-fb2517282da2fdfc26e58207bbb8e0a8bca35be2.tar.gz
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Minor SuperFX optimization. Fixed broken graphics caused by All-Stars SMW speedhack.
-rw-r--r--source/fxemu.c93
-rw-r--r--source/fxinst.c665
-rw-r--r--source/memmap.c101
-rw-r--r--source/ppu.c13
4 files changed, 525 insertions, 347 deletions
diff --git a/source/fxemu.c b/source/fxemu.c
index a92e3df..d9c5082 100644
--- a/source/fxemu.c
+++ b/source/fxemu.c
@@ -32,23 +32,30 @@ void fx_flushCache()
void fx_updateRamBank(uint8_t Byte)
{
// Update BankReg and Bank pointer
- GSU.vRamBankReg = (uint32_t)Byte & (FX_RAM_BANKS - 1);
+ GSU.vRamBankReg = (uint32_t) Byte & (FX_RAM_BANKS - 1);
GSU.pvRamBank = GSU.apvRamBank[Byte & 0x3];
}
+static void fx_readRegisterSpaceForCheck()
+{
+ R15 = GSU.pvRegisters[30];
+ R15 |= ((uint32_t) GSU.pvRegisters[31]) << 8;
+ GSU.vStatusReg = (uint32_t) GSU.pvRegisters[GSU_SFR];
+ GSU.vStatusReg |= ((uint32_t) GSU.pvRegisters[GSU_SFR + 1]) << 8;
+ GSU.vPrgBankReg = (uint32_t) GSU.pvRegisters[GSU_PBR];
+}
-static void fx_readRegisterSpace()
+static void fx_readRegisterSpaceForUse()
{
- int32_t i;
- uint8_t* p;
static uint32_t avHeight[] = { 128, 160, 192, 256 };
static uint32_t avMult[] = { 16, 32, 32, 64 };
+ int32_t i;
+ uint8_t* p = GSU.pvRegisters;
GSU.vErrorCode = 0;
- /* Update R0-R15 */
- p = GSU.pvRegisters;
- for (i = 0; i < 16; i++)
+ /* Update R0 - R14 */
+ for (i = 0; i < 15; i++)
{
GSU.avReg[i] = *p++;
GSU.avReg[i] += ((uint32_t)(*p++)) << 8;
@@ -56,9 +63,6 @@ static void fx_readRegisterSpace()
/* Update other registers */
p = GSU.pvRegisters;
- GSU.vStatusReg = (uint32_t)p[GSU_SFR];
- GSU.vStatusReg |= ((uint32_t)p[GSU_SFR + 1]) << 8;
- GSU.vPrgBankReg = (uint32_t)p[GSU_PBR];
GSU.vRomBankReg = (uint32_t)p[GSU_ROMBR];
GSU.vRamBankReg = ((uint32_t)p[GSU_RAMBR]) & (FX_RAM_BANKS - 1);
GSU.vCacheBaseReg = (uint32_t)p[GSU_CBR];
@@ -208,16 +212,14 @@ void fx_computeScreenPointers()
case 0:
for (i = 0; i < 32; i++)
{
- GSU.apvScreen[i] = GSU.pvScreenBase +
- ((i & 0x10) << 9) + ((i & 0xf) << 8);
+ GSU.apvScreen[i] = GSU.pvScreenBase + ((i & 0x10) << 9) + ((i & 0xf) << 8);
GSU.x[i] = ((i & 0x10) << 8) + ((i & 0xf) << 4);
}
break;
case 1:
for (i = 0; i < 32; i++)
{
- GSU.apvScreen[i] = GSU.pvScreenBase +
- ((i & 0x10) << 10) + ((i & 0xf) << 9);
+ GSU.apvScreen[i] = GSU.pvScreenBase + ((i & 0x10) << 10) + ((i & 0xf) << 9);
GSU.x[i] = ((i & 0x10) << 9) + ((i & 0xf) << 5);
}
break;
@@ -225,8 +227,7 @@ void fx_computeScreenPointers()
case 3:
for (i = 0; i < 32; i++)
{
- GSU.apvScreen[i] = GSU.pvScreenBase +
- ((i & 0x10) << 11) + ((i & 0xf) << 10);
+ GSU.apvScreen[i] = GSU.pvScreenBase + ((i & 0x10) << 11) + ((i & 0xf) << 10);
GSU.x[i] = ((i & 0x10) << 10) + ((i & 0xf) << 6);
}
break;
@@ -238,32 +239,44 @@ void fx_computeScreenPointers()
}
}
-static void fx_writeRegisterSpace()
+static void fx_writeRegisterSpaceAfterCheck()
{
- int32_t i;
- uint8_t* p;
+ GSU.pvRegisters[30] = (uint8_t) R15;
+ GSU.pvRegisters[31] = (uint8_t) (R15 >> 8);
+ GSU.pvRegisters[GSU_SFR] = (uint8_t) GSU.vStatusReg;
+ GSU.pvRegisters[GSU_SFR + 1] = (uint8_t) (GSU.vStatusReg >> 8);
+ GSU.pvRegisters[GSU_PBR] = (uint8_t) GSU.vPrgBankReg;
+}
- p = GSU.pvRegisters;
- for (i = 0; i < 16; i++)
+static void fx_writeRegisterSpaceAfterUse()
+{
+ int32_t i;
+ uint8_t* p = GSU.pvRegisters;
+ for (i = 0; i < 15; i++)
{
*p++ = (uint8_t)GSU.avReg[i];
*p++ = (uint8_t)(GSU.avReg[i] >> 8);
}
/* Update status register */
- if (USEX16(GSU.vZero) == 0) SF(Z);
- else CF(Z);
- if (GSU.vSign & 0x8000) SF(S);
- else CF(S);
- if (GSU.vOverflow >= 0x8000 || GSU.vOverflow < -0x8000) SF(OV);
- else CF(OV);
- if (GSU.vCarry) SF(CY);
- else CF(CY);
+ if (USEX16(GSU.vZero) == 0)
+ SF(Z);
+ else
+ CF(Z);
+ if (GSU.vSign & 0x8000)
+ SF(S);
+ else
+ CF(S);
+ if (GSU.vOverflow >= 0x8000 || GSU.vOverflow < -0x8000)
+ SF(OV);
+ else
+ CF(OV);
+ if (GSU.vCarry)
+ SF(CY);
+ else
+ CF(CY);
p = GSU.pvRegisters;
- p[GSU_SFR] = (uint8_t)GSU.vStatusReg;
- p[GSU_SFR + 1] = (uint8_t)(GSU.vStatusReg >> 8);
- p[GSU_PBR] = (uint8_t)GSU.vPrgBankReg;
p[GSU_ROMBR] = (uint8_t)GSU.vRomBankReg;
p[GSU_RAMBR] = (uint8_t)GSU.vRamBankReg;
p[GSU_CBR] = (uint8_t)GSU.vCacheBaseReg;
@@ -305,12 +318,12 @@ void FxReset(struct FxInit_s* psFxInfo)
uint32_t b = i & 0x7f;
if (b >= 0x40)
{
- if (GSU.nRomBanks > 1)
+ if (GSU.nRomBanks > 2)
b %= GSU.nRomBanks;
else
b &= 1;
- GSU.apvRomBank[i] = &GSU.pvRom[ b << 16 ];
+ GSU.apvRomBank[i] = &GSU.pvRom[b << 16];
}
else
{
@@ -332,7 +345,8 @@ void FxReset(struct FxInit_s* psFxInfo)
/* Set pointer to GSU cache */
GSU.pvCache = &GSU.pvRegisters[0x100];
- fx_readRegisterSpace();
+ fx_readRegisterSpaceForCheck();
+ fx_readRegisterSpaceForUse();
}
static bool fx_checkStartAddress()
@@ -364,23 +378,26 @@ int32_t FxEmulate(uint32_t nInstructions)
uint32_t vCount;
/* Read registers and initialize GSU session */
- fx_readRegisterSpace();
+ fx_readRegisterSpaceForCheck();
/* Check if the start address is valid */
if (!fx_checkStartAddress())
{
CF(G);
- fx_writeRegisterSpace();
+ fx_writeRegisterSpaceAfterCheck();
return 0;
}
+ fx_readRegisterSpaceForUse();
+
/* Execute GSU session */
CF(IRQ);
vCount = fx_run(nInstructions);
/* Store GSU registers */
- fx_writeRegisterSpace();
+ fx_writeRegisterSpaceAfterCheck();
+ fx_writeRegisterSpaceAfterUse();
/* Check for error code */
if (GSU.vErrorCode)
diff --git a/source/fxinst.c b/source/fxinst.c
index 4ec1e01..86ccd38 100644
--- a/source/fxinst.c
+++ b/source/fxinst.c
@@ -12,7 +12,7 @@ int32_t gsu_bank [512] = {0};
/* Codes used:
*
- * rn = a GSU register (r0-r15)
+ * rn = a GSU register (r0 - r15)
* #n = 4 bit immediate value
* #pp = 8 bit immediate value
* (yy) = 8 bit word address (0x0000 - 0x01fe)
@@ -57,8 +57,8 @@ static void fx_cache()
GSU.vCacheBaseReg = c;
GSU.bCacheActive = true;
}
- R15++;
CLRFLAGS;
+ R15++;
}
/* 03 - lsr - logic shift right */
@@ -98,7 +98,14 @@ static void fx_bra()
}
/* Branch on condition */
-#define BRA_COND(cond) uint8_t v = PIPE; R15++; FETCHPIPE; if(cond) R15 += SEX8(v); else R15++;
+#define BRA_COND(cond) \
+ uint8_t v = PIPE; \
+ R15++; \
+ FETCHPIPE; \
+ if (cond) \
+ R15 += SEX8(v); \
+ else \
+ R15++
#define TEST_S (GSU.vSign & 0x8000)
#define TEST_Z (USEX16(GSU.vZero) == 0)
@@ -168,14 +175,38 @@ static void fx_bvs()
/* 10-1f - to rn - set register n as destination register */
/* 10-1f(B) - move rn - move one register to another (if B flag is set) */
#define FX_TO(reg) \
-if(TF(B)) { GSU.avReg[(reg)] = SREG; CLRFLAGS; } \
-else { GSU.pvDreg = &GSU.avReg[reg]; } R15++;
+ if (TF(B)) \
+ { \
+ GSU.avReg[(reg)] = SREG; \
+ CLRFLAGS; \
+ } \
+ else \
+ GSU.pvDreg = &GSU.avReg[reg]; \
+ R15++
+
#define FX_TO_R14(reg) \
-if(TF(B)) { GSU.avReg[(reg)] = SREG; CLRFLAGS; READR14; } \
-else { GSU.pvDreg = &GSU.avReg[reg]; } R15++;
+ if (TF(B)) \
+ { \
+ GSU.avReg[(reg)] = SREG; \
+ CLRFLAGS; \
+ READR14; \
+ } \
+ else \
+ GSU.pvDreg = &GSU.avReg[reg]; \
+ R15++
+
#define FX_TO_R15(reg) \
-if(TF(B)) { GSU.avReg[(reg)] = SREG; CLRFLAGS; } \
-else { GSU.pvDreg = &GSU.avReg[reg]; R15++; }
+ if (TF(B)) \
+ { \
+ GSU.avReg[(reg)] = SREG; \
+ CLRFLAGS; \
+ } \
+ else \
+ { \
+ GSU.pvDreg = &GSU.avReg[reg]; \
+ R15++; \
+ }
+
static void fx_to_r0()
{
FX_TO(0);
@@ -242,7 +273,11 @@ static void fx_to_r15()
}
/* 20-2f - to rn - set register n as source and destination register */
-#define FX_WITH(reg) SF(B); GSU.pvSreg = GSU.pvDreg = &GSU.avReg[reg]; R15++;
+#define FX_WITH(reg) \
+ SF(B); \
+ GSU.pvSreg = GSU.pvDreg = &GSU.avReg[reg]; \
+ R15++
+
static void fx_with_r0()
{
FX_WITH(0);
@@ -310,10 +345,12 @@ static void fx_with_r15()
/* 30-3b - stw (rn) - store word */
#define FX_STW(reg) \
-GSU.vLastRamAdr = GSU.avReg[reg]; \
-RAM(GSU.avReg[reg]) = (uint8_t)SREG; \
-RAM(GSU.avReg[reg]^1) = (uint8_t)(SREG>>8); \
-CLRFLAGS; R15++
+ GSU.vLastRamAdr = GSU.avReg[reg]; \
+ RAM(GSU.avReg[reg]) = (uint8_t) SREG; \
+ RAM(GSU.avReg[reg] ^ 1) = (uint8_t) (SREG >> 8); \
+ CLRFLAGS; \
+ R15++
+
static void fx_stw_r0()
{
FX_STW(0);
@@ -365,9 +402,11 @@ static void fx_stw_r11()
/* 30-3b(ALT1) - stb (rn) - store byte */
#define FX_STB(reg) \
-GSU.vLastRamAdr = GSU.avReg[reg]; \
-RAM(GSU.avReg[reg]) = (uint8_t)SREG; \
-CLRFLAGS; R15++
+ GSU.vLastRamAdr = GSU.avReg[reg]; \
+ RAM(GSU.avReg[reg]) = (uint8_t) SREG; \
+ CLRFLAGS; \
+ R15++
+
static void fx_stb_r0()
{
FX_STB(0);
@@ -425,7 +464,6 @@ static void fx_loop()
R15 = R13;
else
R15++;
-
CLRFLAGS;
}
@@ -455,13 +493,16 @@ static void fx_alt3()
}
/* 40-4b - ldw (rn) - load word from RAM */
-#define FX_LDW(reg) uint32_t v; \
-GSU.vLastRamAdr = GSU.avReg[reg]; \
-v = (uint32_t)RAM(GSU.avReg[reg]); \
-v |= ((uint32_t)RAM(GSU.avReg[reg]^1))<<8; \
-R15++; DREG = v; \
-TESTR14; \
-CLRFLAGS
+#define FX_LDW(reg) \
+ uint32_t v; \
+ GSU.vLastRamAdr = GSU.avReg[reg]; \
+ v = (uint32_t) RAM(GSU.avReg[reg]); \
+ v |= ((uint32_t) RAM(GSU.avReg[reg] ^ 1)) << 8; \
+ R15++; \
+ DREG = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_ldw_r0()
{
FX_LDW(0);
@@ -512,12 +553,15 @@ static void fx_ldw_r11()
}
/* 40-4b(ALT1) - ldb (rn) - load byte */
-#define FX_LDB(reg) uint32_t v; \
-GSU.vLastRamAdr = GSU.avReg[reg]; \
-v = (uint32_t)RAM(GSU.avReg[reg]); \
-R15++; DREG = v; \
-TESTR14; \
-CLRFLAGS
+#define FX_LDB(reg) \
+ uint32_t v; \
+ GSU.vLastRamAdr = GSU.avReg[reg]; \
+ v = (uint32_t) RAM(GSU.avReg[reg]); \
+ R15++; \
+ DREG = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_ldb_r0()
{
FX_LDB(0);
@@ -580,18 +624,23 @@ static void fx_plot_2bit()
R1++;
if (GSU.vPlotOptionReg & 0x02)
- c = (x ^ y) & 1 ? (uint8_t)(GSU.vColorReg >> 4) : (uint8_t)GSU.vColorReg;
+ c = (x ^ y) & 1 ? (uint8_t) (GSU.vColorReg >> 4) : (uint8_t)GSU.vColorReg;
else
- c = (uint8_t)GSU.vColorReg;
+ c = (uint8_t) GSU.vColorReg;
- if (!(GSU.vPlotOptionReg & 0x01) && !(c & 0xf)) return;
+ if (!(GSU.vPlotOptionReg & 0x01) && !(c & 0xf))
+ return;
a = GSU.apvScreen[y >> 3] + GSU.x[x >> 3] + ((y & 7) << 1);
v = 128 >> (x & 7);
- if (c & 0x01) a[0] |= v;
- else a[0] &= ~v;
- if (c & 0x02) a[1] |= v;
- else a[1] &= ~v;
+ if (c & 0x01)
+ a[0] |= v;
+ else
+ a[0] &= ~v;
+ if (c & 0x02)
+ a[1] |= v;
+ else
+ a[1] &= ~v;
}
/* 2c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */
@@ -636,14 +685,22 @@ static void fx_plot_4bit()
a = GSU.apvScreen[y >> 3] + GSU.x[x >> 3] + ((y & 7) << 1);
v = 128 >> (x & 7);
- if (c & 0x01) a[0x00] |= v;
- else a[0x00] &= ~v;
- if (c & 0x02) a[0x01] |= v;
- else a[0x01] &= ~v;
- if (c & 0x04) a[0x10] |= v;
- else a[0x10] &= ~v;
- if (c & 0x08) a[0x11] |= v;
- else a[0x11] &= ~v;
+ if (c & 0x01)
+ a[0x00] |= v;
+ else
+ a[0x00] &= ~v;
+ if (c & 0x02)
+ a[0x01] |= v;
+ else
+ a[0x01] &= ~v;
+ if (c & 0x04)
+ a[0x10] |= v;
+ else
+ a[0x10] &= ~v;
+ if (c & 0x08)
+ a[0x11] |= v;
+ else
+ a[0x11] &= ~v;
}
/* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */
@@ -683,29 +740,47 @@ static void fx_plot_8bit()
c = (uint8_t)GSU.vColorReg;
if (!(GSU.vPlotOptionReg & 0x10))
{
- if (!(GSU.vPlotOptionReg & 0x01) && !(c & 0xf)) return;
+ if (!(GSU.vPlotOptionReg & 0x01) && !(c & 0xf))
+ return;
}
- else if (!(GSU.vPlotOptionReg & 0x01) && !c) return;
+ else if (!(GSU.vPlotOptionReg & 0x01) && !c)
+ return;
a = GSU.apvScreen[y >> 3] + GSU.x[x >> 3] + ((y & 7) << 1);
v = 128 >> (x & 7);
- if (c & 0x01) a[0x00] |= v;
- else a[0x00] &= ~v;
- if (c & 0x02) a[0x01] |= v;
- else a[0x01] &= ~v;
- if (c & 0x04) a[0x10] |= v;
- else a[0x10] &= ~v;
- if (c & 0x08) a[0x11] |= v;
- else a[0x11] &= ~v;
- if (c & 0x10) a[0x20] |= v;
- else a[0x20] &= ~v;
- if (c & 0x20) a[0x21] |= v;
- else a[0x21] &= ~v;
- if (c & 0x40) a[0x30] |= v;
- else a[0x30] &= ~v;
- if (c & 0x80) a[0x31] |= v;
- else a[0x31] &= ~v;
+ if (c & 0x01)
+ a[0x00] |= v;
+ else
+ a[0x00] &= ~v;
+ if (c & 0x02)
+ a[0x01] |= v;
+ else
+ a[0x01] &= ~v;
+ if (c & 0x04)
+ a[0x10] |= v;
+ else
+ a[0x10] &= ~v;
+ if (c & 0x08)
+ a[0x11] |= v;
+ else
+ a[0x11] &= ~v;
+ if (c & 0x10)
+ a[0x20] |= v;
+ else
+ a[0x20] &= ~v;
+ if (c & 0x20)
+ a[0x21] |= v;
+ else
+ a[0x21] &= ~v;
+ if (c & 0x40)
+ a[0x30] |= v;
+ else
+ a[0x30] &= ~v;
+ if (c & 0x80)
+ a[0x31] |= v;
+ else
+ a[0x31] &= ~v;
}
/* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */
@@ -778,10 +853,7 @@ static void fx_cmode()
GSU.vPlotOptionReg = SREG;
if (GSU.vPlotOptionReg & 0x10)
- {
- /* OBJ Mode (for drawing into sprites) */
- GSU.vScreenHeight = 256;
- }
+ GSU.vScreenHeight = 256; // OBJ Mode (for drawing into sprites)
else
GSU.vScreenHeight = GSU.vScreenRealHeight;
@@ -804,14 +876,16 @@ static void fx_not()
/* 50-5f - add rn - add, register + register */
#define FX_ADD(reg) \
-int32_t s = SUSEX16(SREG) + SUSEX16(GSU.avReg[reg]); \
-GSU.vCarry = s >= 0x10000; \
-GSU.vOverflow = ~(SREG ^ GSU.avReg[reg]) & (GSU.avReg[reg] ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; DREG = s; \
-TESTR14; \
-CLRFLAGS
+ int32_t s = SUSEX16(SREG) + SUSEX16(GSU.avReg[reg]); \
+ GSU.vCarry = s >= 0x10000; \
+ GSU.vOverflow = ~(SREG ^ GSU.avReg[reg]) & (GSU.avReg[reg] ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ DREG = s; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_add_r0()
{
FX_ADD(0);
@@ -879,14 +953,16 @@ static void fx_add_r15()
/* 50-5f(ALT1) - adc rn - add with carry, register + register */
#define FX_ADC(reg) \
-int32_t s = SUSEX16(SREG) + SUSEX16(GSU.avReg[reg]) + SEX16(GSU.vCarry); \
-GSU.vCarry = s >= 0x10000; \
-GSU.vOverflow = ~(SREG ^ GSU.avReg[reg]) & (GSU.avReg[reg] ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; DREG = s; \
-TESTR14; \
-CLRFLAGS
+ int32_t s = SUSEX16(SREG) + SUSEX16(GSU.avReg[reg]) + SEX16(GSU.vCarry); \
+ GSU.vCarry = s >= 0x10000; \
+ GSU.vOverflow = ~(SREG ^ GSU.avReg[reg]) & (GSU.avReg[reg] ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ DREG = s; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_adc_r0()
{
FX_ADC(0);
@@ -954,14 +1030,16 @@ static void fx_adc_r15()
/* 50-5f(ALT2) - add #n - add, register + immediate */
#define FX_ADD_I(imm) \
-int32_t s = SUSEX16(SREG) + imm; \
-GSU.vCarry = s >= 0x10000; \
-GSU.vOverflow = ~(SREG ^ imm) & (imm ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; DREG = s; \
-TESTR14; \
-CLRFLAGS
+ int32_t s = SUSEX16(SREG) + imm; \
+ GSU.vCarry = s >= 0x10000; \
+ GSU.vOverflow = ~(SREG ^ imm) & (imm ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ DREG = s; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_add_i0()
{
FX_ADD_I(0);
@@ -1029,14 +1107,16 @@ static void fx_add_i15()
/* 50-5f(ALT3) - adc #n - add with carry, register + immediate */
#define FX_ADC_I(imm) \
-int32_t s = SUSEX16(SREG) + imm + SUSEX16(GSU.vCarry); \
-GSU.vCarry = s >= 0x10000; \
-GSU.vOverflow = ~(SREG ^ imm) & (imm ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; DREG = s; \
-TESTR14; \
-CLRFLAGS
+ int32_t s = SUSEX16(SREG) + imm + SUSEX16(GSU.vCarry); \
+ GSU.vCarry = s >= 0x10000; \
+ GSU.vOverflow = ~(SREG ^ imm) & (imm ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ DREG = s; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_adc_i0()
{
FX_ADC_I(0);
@@ -1104,14 +1184,16 @@ static void fx_adc_i15()
/* 60-6f - sub rn - subtract, register - register */
#define FX_SUB(reg) \
-int32_t s = SUSEX16(SREG) - SUSEX16(GSU.avReg[reg]); \
-GSU.vCarry = s >= 0; \
-GSU.vOverflow = (SREG ^ GSU.avReg[reg]) & (SREG ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; DREG = s; \
-TESTR14; \
-CLRFLAGS
+ int32_t s = SUSEX16(SREG) - SUSEX16(GSU.avReg[reg]); \
+ GSU.vCarry = s >= 0; \
+ GSU.vOverflow = (SREG ^ GSU.avReg[reg]) & (SREG ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ DREG = s; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_sub_r0()
{
FX_SUB(0);
@@ -1179,14 +1261,16 @@ static void fx_sub_r15()
/* 60-6f(ALT1) - sbc rn - subtract with carry, register - register */
#define FX_SBC(reg) \
-int32_t s = SUSEX16(SREG) - SUSEX16(GSU.avReg[reg]) - (SUSEX16(GSU.vCarry^1)); \
-GSU.vCarry = s >= 0; \
-GSU.vOverflow = (SREG ^ GSU.avReg[reg]) & (SREG ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; DREG = s; \
-TESTR14; \
-CLRFLAGS
+ int32_t s = SUSEX16(SREG) - SUSEX16(GSU.avReg[reg]) - (SUSEX16(GSU.vCarry ^ 1)); \
+ GSU.vCarry = s >= 0; \
+ GSU.vOverflow = (SREG ^ GSU.avReg[reg]) & (SREG ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ DREG = s; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_sbc_r0()
{
FX_SBC(0);
@@ -1254,14 +1338,16 @@ static void fx_sbc_r15()
/* 60-6f(ALT2) - sub #n - subtract, register - immediate */
#define FX_SUB_I(imm) \
-int32_t s = SUSEX16(SREG) - imm; \
-GSU.vCarry = s >= 0; \
-GSU.vOverflow = (SREG ^ imm) & (SREG ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; DREG = s; \
-TESTR14; \
-CLRFLAGS
+ int32_t s = SUSEX16(SREG) - imm; \
+ GSU.vCarry = s >= 0; \
+ GSU.vOverflow = (SREG ^ imm) & (SREG ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ DREG = s; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_sub_i0()
{
FX_SUB_I(0);
@@ -1329,13 +1415,14 @@ static void fx_sub_i15()
/* 60-6f(ALT3) - cmp rn - compare, register, register */
#define FX_CMP(reg) \
-int32_t s = SUSEX16(SREG) - SUSEX16(GSU.avReg[reg]); \
-GSU.vCarry = s >= 0; \
-GSU.vOverflow = (SREG ^ GSU.avReg[reg]) & (SREG ^ s) & 0x8000; \
-GSU.vSign = s; \
-GSU.vZero = s; \
-R15++; \
-CLRFLAGS;
+ int32_t s = SUSEX16(SREG) - SUSEX16(GSU.avReg[reg]); \
+ GSU.vCarry = s >= 0; \
+ GSU.vOverflow = (SREG ^ GSU.avReg[reg]) & (SREG ^ s) & 0x8000; \
+ GSU.vSign = s; \
+ GSU.vZero = s; \
+ R15++; \
+ CLRFLAGS
+
static void fx_cmp_r0()
{
FX_CMP(0);
@@ -1417,12 +1504,14 @@ static void fx_merge()
/* 71-7f - and rn - reister & register */
#define FX_AND(reg) \
-uint32_t v = SREG & GSU.avReg[reg]; \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG & GSU.avReg[reg]; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_and_r1()
{
FX_AND(1);
@@ -1486,12 +1575,14 @@ static void fx_and_r15()
/* 71-7f(ALT1) - bic rn - reister & ~register */
#define FX_BIC(reg) \
-uint32_t v = SREG & ~GSU.avReg[reg]; \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG & ~GSU.avReg[reg]; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_bic_r1()
{
FX_BIC(1);
@@ -1555,12 +1646,14 @@ static void fx_bic_r15()
/* 71-7f(ALT2) - and #n - reister & immediate */
#define FX_AND_I(imm) \
-uint32_t v = SREG & imm; \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG & imm; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_and_i1()
{
FX_AND_I(1);
@@ -1624,12 +1717,14 @@ static void fx_and_i15()
/* 71-7f(ALT3) - bic #n - reister & ~immediate */
#define FX_BIC_I(imm) \
-uint32_t v = SREG & ~imm; \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG & ~imm; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_bic_i1()
{
FX_BIC_I(1);
@@ -1693,12 +1788,14 @@ static void fx_bic_i15()
/* 80-8f - mult rn - 8 bit to 16 bit signed multiply, register * register */
#define FX_MULT(reg) \
-uint32_t v = (uint32_t)(SEX8(SREG) * SEX8(GSU.avReg[reg])); \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = (uint32_t) (SEX8(SREG) * SEX8(GSU.avReg[reg])); \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_mult_r0()
{
FX_MULT(0);
@@ -1766,12 +1863,14 @@ static void fx_mult_r15()
/* 80-8f(ALT1) - umult rn - 8 bit to 16 bit unsigned multiply, register * register */
#define FX_UMULT(reg) \
-uint32_t v = USEX8(SREG) * USEX8(GSU.avReg[reg]); \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = USEX8(SREG) * USEX8(GSU.avReg[reg]); \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_umult_r0()
{
FX_UMULT(0);
@@ -1839,12 +1938,14 @@ static void fx_umult_r15()
/* 80-8f(ALT2) - mult #n - 8 bit to 16 bit signed multiply, register * immediate */
#define FX_MULT_I(imm) \
-uint32_t v = (uint32_t) (SEX8(SREG) * ((int32_t)imm)); \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = (uint32_t) (SEX8(SREG) * ((int32_t) imm)); \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_mult_i0()
{
FX_MULT_I(0);
@@ -1912,12 +2013,14 @@ static void fx_mult_i15()
/* 80-8f(ALT3) - umult #n - 8 bit to 16 bit unsigned multiply, register * immediate */
#define FX_UMULT_I(imm) \
-uint32_t v = USEX8(SREG) * ((uint32_t)imm); \
-R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = USEX8(SREG) * ((uint32_t) imm); \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_umult_i0()
{
FX_UMULT_I(0);
@@ -1993,7 +2096,11 @@ static void fx_sbk()
}
/* 91-94 - link #n - R11 = R15 + immediate */
-#define FX_LINK_I(lkn) R11 = R15 + lkn; CLRFLAGS; R15++
+#define FX_LINK_I(lkn) \
+ R11 = R15 + lkn; \
+ CLRFLAGS; \
+ R15++
+
static void fx_link_i1()
{
FX_LINK_I(1);
@@ -2070,8 +2177,9 @@ static void fx_ror()
/* 98-9d - jmp rn - jump to address of register */
#define FX_JMP(reg) \
-R15 = GSU.avReg[reg]; \
-CLRFLAGS;
+ R15 = GSU.avReg[reg]; \
+ CLRFLAGS
+
static void fx_jmp_r8()
{
FX_JMP(8);
@@ -2099,10 +2207,13 @@ static void fx_jmp_r13()
/* 98-9d(ALT1) - ljmp rn - set program bank to source register and jump to address of register */
#define FX_LJMP(reg) \
-GSU.vPrgBankReg = GSU.avReg[reg] & 0x7f; \
-GSU.pvPrgBank = GSU.apvRomBank[GSU.vPrgBankReg]; \
-R15 = SREG; \
-GSU.bCacheActive = false; fx_cache(); R15--;
+ GSU.vPrgBankReg = GSU.avReg[reg] & 0x7f; \
+ GSU.pvPrgBank = GSU.apvRomBank[GSU.vPrgBankReg]; \
+ R15 = SREG; \
+ GSU.bCacheActive = false; \
+ fx_cache(); \
+ R15--
+
static void fx_ljmp_r8()
{
FX_LJMP(8);
@@ -2174,10 +2285,13 @@ static void fx_lmult()
/* a0-af - ibt rn,#pp - immediate byte transfer */
#define FX_IBT(reg) \
-uint8_t v = PIPE; R15++; \
-FETCHPIPE; R15++; \
-GSU.avReg[reg] = SEX8(v); \
-CLRFLAGS;
+ uint8_t v = PIPE; \
+ R15++; \
+ FETCHPIPE; \
+ R15++; \
+ GSU.avReg[reg] = SEX8(v); \
+ CLRFLAGS
+
static void fx_ibt_r0()
{
FX_IBT(0);
@@ -2246,11 +2360,14 @@ static void fx_ibt_r15()
/* a0-af(ALT1) - lms rn,(yy) - load word from RAM (short address) */
#define FX_LMS(reg) \
-GSU.vLastRamAdr = ((uint32_t)PIPE) << 1; \
-R15++; FETCHPIPE; R15++; \
-GSU.avReg[reg] = (uint32_t)RAM(GSU.vLastRamAdr); \
-GSU.avReg[reg] |= ((uint32_t)RAM(GSU.vLastRamAdr+1))<<8; \
-CLRFLAGS;
+ GSU.vLastRamAdr = ((uint32_t) PIPE) << 1; \
+ R15++; \
+ FETCHPIPE; \
+ R15++; \
+ GSU.avReg[reg] = (uint32_t) RAM(GSU.vLastRamAdr); \
+ GSU.avReg[reg] |= ((uint32_t) RAM(GSU.vLastRamAdr + 1)) << 8; \
+ CLRFLAGS
+
static void fx_lms_r0()
{
FX_LMS(0);
@@ -2320,12 +2437,15 @@ static void fx_lms_r15()
/* a0-af(ALT2) - sms (yy),rn - store word in RAM (short address) */
/* If rn == r15, is the value of r15 before or after the extra byte is read? */
#define FX_SMS(reg) \
-uint32_t v = GSU.avReg[reg]; \
-GSU.vLastRamAdr = ((uint32_t)PIPE) << 1; \
-R15++; FETCHPIPE; \
-RAM(GSU.vLastRamAdr) = (uint8_t)v; \
-RAM(GSU.vLastRamAdr+1) = (uint8_t)(v>>8); \
-CLRFLAGS; R15++;
+ uint32_t v = GSU.avReg[reg]; \
+ GSU.vLastRamAdr = ((uint32_t) PIPE) << 1; \
+ R15++; \
+ FETCHPIPE; \
+ RAM(GSU.vLastRamAdr) = (uint8_t) v; \
+ RAM(GSU.vLastRamAdr + 1) = (uint8_t) (v >> 8); \
+ CLRFLAGS; \
+ R15++
+
static void fx_sms_r0()
{
FX_SMS(0);
@@ -2394,9 +2514,23 @@ static void fx_sms_r15()
/* b0-bf - from rn - set source register */
/* b0-bf(B) - moves rn - move register to register, and set flags, (if B flag is set) */
#define FX_FROM(reg) \
-if(TF(B)) { uint32_t v = GSU.avReg[reg]; R15++; DREG = v; \
-GSU.vOverflow = (v&0x80) << 16; GSU.vSign = v; GSU.vZero = v; TESTR14; CLRFLAGS; } \
-else { GSU.pvSreg = &GSU.avReg[reg]; R15++; }
+ if (TF(B)) \
+ { \
+ uint32_t v = GSU.avReg[reg]; \
+ R15++; \
+ DREG = v; \
+ GSU.vOverflow = (v & 0x80) << 16; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS; \
+ } \
+ else \
+ { \
+ GSU.pvSreg = &GSU.avReg[reg]; \
+ R15++; \
+ }
+
static void fx_from_r0()
{
FX_FROM(0);
@@ -2476,11 +2610,14 @@ static void fx_hib()
/* c1-cf - or rn */
#define FX_OR(reg) \
-uint32_t v = SREG | GSU.avReg[reg]; R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG | GSU.avReg[reg]; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_or_r1()
{
FX_OR(1);
@@ -2544,11 +2681,14 @@ static void fx_or_r15()
/* c1-cf(ALT1) - xor rn */
#define FX_XOR(reg) \
-uint32_t v = SREG ^ GSU.avReg[reg]; R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG ^ GSU.avReg[reg]; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_xor_r1()
{
FX_XOR(1);
@@ -2612,11 +2752,14 @@ static void fx_xor_r15()
/* c1-cf(ALT2) - or #n */
#define FX_OR_I(imm) \
-uint32_t v = SREG | imm; R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG | imm; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_or_i1()
{
FX_OR_I(1);
@@ -2680,11 +2823,14 @@ static void fx_or_i15()
/* c1-cf(ALT3) - xor #n */
#define FX_XOR_I(imm) \
-uint32_t v = SREG ^ imm; R15++; DREG = v; \
-GSU.vSign = v; \
-GSU.vZero = v; \
-TESTR14; \
-CLRFLAGS;
+ uint32_t v = SREG ^ imm; \
+ R15++; \
+ DREG = v; \
+ GSU.vSign = v; \
+ GSU.vZero = v; \
+ TESTR14; \
+ CLRFLAGS
+
static void fx_xor_i1()
{
FX_XOR_I(1);
@@ -2748,10 +2894,12 @@ static void fx_xor_i15()
/* d0-de - inc rn - increase by one */
#define FX_INC(reg) \
-GSU.avReg[reg] += 1; \
-GSU.vSign = GSU.avReg[reg]; \
-GSU.vZero = GSU.avReg[reg]; \
-CLRFLAGS; R15++;
+ GSU.avReg[reg] += 1; \
+ GSU.vSign = GSU.avReg[reg]; \
+ GSU.vZero = GSU.avReg[reg]; \
+ CLRFLAGS; \
+ R15++
+
static void fx_inc_r0()
{
FX_INC(0);
@@ -2856,10 +3004,12 @@ static void fx_romb()
/* e0-ee - dec rn - decrement by one */
#define FX_DEC(reg) \
-GSU.avReg[reg] -= 1; \
-GSU.vSign = GSU.avReg[reg]; \
-GSU.vZero = GSU.avReg[reg]; \
-CLRFLAGS; R15++;
+ GSU.avReg[reg] -= 1; \
+ GSU.vSign = GSU.avReg[reg]; \
+ GSU.vZero = GSU.avReg[reg]; \
+ CLRFLAGS; \
+ R15++
+
static void fx_dec_r0()
{
FX_DEC(0);
@@ -2959,8 +3109,7 @@ static void fx_getbl()
{
uint32_t v;
#ifndef FX_DO_ROMBUFFER
- uint32_t c;
- c = (uint32_t)ROM(R14);
+ uint32_t c = (uint32_t)ROM(R14);
#else
uint32_t c = USEX8(GSU.vRomBuffer);
#endif
@@ -2990,10 +3139,16 @@ static void fx_getbs()
/* f0-ff - iwt rn,#xx - immediate word transfer to register */
#define FX_IWT(reg) \
-uint32_t v = PIPE; R15++; FETCHPIPE; R15++; \
-v |= USEX8(PIPE) << 8; FETCHPIPE; R15++; \
-GSU.avReg[reg] = v; \
-CLRFLAGS;
+ uint32_t v = PIPE; \
+ R15++; \
+ FETCHPIPE; \
+ R15++; \
+ v |= USEX8(PIPE) << 8; \
+ FETCHPIPE; \
+ R15++; \
+ GSU.avReg[reg] = v; \
+ CLRFLAGS
+
static void fx_iwt_r0()
{
FX_IWT(0);
@@ -3062,11 +3217,17 @@ static void fx_iwt_r15()
/* f0-ff(ALT1) - lm rn,(xx) - load word from RAM */
#define FX_LM(reg) \
-GSU.vLastRamAdr = PIPE; R15++; FETCHPIPE; R15++; \
-GSU.vLastRamAdr |= USEX8(PIPE) << 8; FETCHPIPE; R15++; \
-GSU.avReg[reg] = RAM(GSU.vLastRamAdr); \
-GSU.avReg[reg] |= USEX8(RAM(GSU.vLastRamAdr^1)) << 8; \
-CLRFLAGS;
+ GSU.vLastRamAdr = PIPE; \
+ R15++; \
+ FETCHPIPE; \
+ R15++; \
+ GSU.vLastRamAdr |= USEX8(PIPE) << 8; \
+ FETCHPIPE; \
+ R15++; \
+ GSU.avReg[reg] = RAM(GSU.vLastRamAdr); \
+ GSU.avReg[reg] |= USEX8(RAM(GSU.vLastRamAdr ^ 1)) << 8; \
+ CLRFLAGS
+
static void fx_lm_r0()
{
FX_LM(0);
@@ -3136,12 +3297,18 @@ static void fx_lm_r15()
/* f0-ff(ALT2) - sm (xx),rn - store word in RAM */
/* If rn == r15, is the value of r15 before or after the extra bytes are read? */
#define FX_SM(reg) \
-uint32_t v = GSU.avReg[reg]; \
-GSU.vLastRamAdr = PIPE; R15++; FETCHPIPE; R15++; \
-GSU.vLastRamAdr |= USEX8(PIPE) << 8; FETCHPIPE; \
-RAM(GSU.vLastRamAdr) = (uint8_t)v; \
-RAM(GSU.vLastRamAdr^1) = (uint8_t)(v>>8); \
-CLRFLAGS; R15++;
+ uint32_t v = GSU.avReg[reg]; \
+ GSU.vLastRamAdr = PIPE; \
+ R15++; \
+ FETCHPIPE; \
+ R15++; \
+ GSU.vLastRamAdr |= USEX8(PIPE) << 8; \
+ FETCHPIPE; \
+ RAM(GSU.vLastRamAdr) = (uint8_t) v; \
+ RAM(GSU.vLastRamAdr ^ 1) = (uint8_t) (v >> 8); \
+ CLRFLAGS; \
+ R15++
+
static void fx_sm_r0()
{
FX_SM(0);
diff --git a/source/memmap.c b/source/memmap.c
index 75d1b9f..3e2d392 100644
--- a/source/memmap.c
+++ b/source/memmap.c
@@ -673,7 +673,6 @@ again:
Memory.ROM[0x107505] = 0x42; Memory.ROM[0x107506] = 0x5B;
Memory.ROM[0x107539] = 0x42; Memory.ROM[0x10753A] = 0x5B;
Memory.ROM[0x107563] = 0x42; Memory.ROM[0x107564] = 0x5B;
- Memory.ROM[0x1801D4] = 0x42; Memory.ROM[0x1801D5] = 0x10;
Memory.ROM[0x18041D] = 0x42; Memory.ROM[0x18041E] = 0x79;
}
#endif
@@ -2737,7 +2736,7 @@ void ApplyROMFixes()
*/
//not MAD-1 compliant
- if (strcmp(Memory.ROMName, "WANDERERS FROM YS") == 0)
+ if (match_na("WANDERERS FROM YS"))
{
int32_t c;
for (c = 0; c < 0xE0; c++)
@@ -2758,19 +2757,19 @@ void ApplyROMFixes()
//NMI hacks
CPU.NMITriggerPoint = 4;
- if (strcmp(Memory.ROMName, "CACOMA KNIGHT") == 0)
+ if (match_na("CACOMA KNIGHT"))
CPU.NMITriggerPoint = 25;
//Disabling a speed-up
// Games which spool sound samples between the SNES and sound CPU using
// H-DMA as the sample is playing.
- if (strcmp(Memory.ROMName, "EARTHWORM JIM 2") == 0 ||
- strcmp(Memory.ROMName, "PRIMAL RAGE") == 0 ||
- strcmp(Memory.ROMName, "CLAY FIGHTER") == 0 ||
- strcmp(Memory.ROMName, "ClayFighter 2") == 0 ||
+ if (match_na("EARTHWORM JIM 2") ||
+ match_na("PRIMAL RAGE") ||
+ match_na("CLAY FIGHTER") ||
+ match_na("ClayFighter 2") ||
strncasecmp(Memory.ROMName, "MADDEN", 6) == 0 ||
strncmp(Memory.ROMName, "NHL", 3) == 0 ||
- strcmp(Memory.ROMName, "WeaponLord") == 0 ||
+ match_na("WeaponLord") ||
strncmp(Memory.ROMName, "WAR 2410", 8) == 0)
Settings.Shutdown = false;
@@ -2778,15 +2777,15 @@ void ApplyROMFixes()
#ifndef USE_BLARGG_APU
// Stunt Racer FX
- if (strcmp(Memory.ROMId, "CQ ") == 0 ||
+ if (match_id("CQ ") ||
// Illusion of Gaia
strncmp(Memory.ROMId, "JG", 2) == 0 ||
- strcmp(Memory.ROMName, "GAIA GENSOUKI 1 JPN") == 0)
+ match_na("GAIA GENSOUKI 1 JPN"))
IAPU.OneCycle = 13;
else if (strcmp (Memory.ROMName, "UMIHARAKAWASE") == 0)
IAPU.OneCycle = 20;
// RENDERING RANGER R2
- else if (strcmp(Memory.ROMId, "AVCJ") == 0 ||
+ else if (match_id("AVCJ") ||
//Mark Davis
strncmp(Memory.ROMName, "THE FISHING MASTER", 18) == 0 || //needs >= actual APU timing. (21 is .002 Mhz slower)
// Star Ocean
@@ -2796,13 +2795,13 @@ void ApplyROMFixes()
// Act Raiser 1 & 2
strncasecmp(Memory.ROMName, "ActRaiser", 9) == 0 ||
// Soulblazer
- strcmp(Memory.ROMName, "SOULBLAZER - 1 USA") == 0 ||
- strcmp(Memory.ROMName, "SOULBLADER - 1") == 0 ||
+ match_na("SOULBLAZER - 1 USA") ||
+ match_na("SOULBLADER - 1") ||
// Terranigma
strncmp(Memory.ROMId, "AQT", 3) == 0 ||
// Robotrek
strncmp(Memory.ROMId, "E9 ", 3) == 0 ||
- strcmp(Memory.ROMName, "SLAP STICK 1 JPN") == 0 ||
+ match_na("SLAP STICK 1 JPN") ||
// ZENNIHON PURORESU2
strncmp(Memory.ROMId, "APR", 3) == 0 ||
// Bomberman 4
@@ -2813,34 +2812,34 @@ void ApplyROMFixes()
// Panic Bomber World
strncmp(Memory.ROMId, "APB", 3) == 0 ||
((strncmp(Memory.ROMName, "Parlor", 6) == 0 ||
- strcmp(Memory.ROMName, "HEIWA Parlor!Mini8") == 0 ||
+ match_na("HEIWA Parlor!Mini8") ||
strncmp(Memory.ROMName, "SANKYO Fever! \xCC\xA8\xB0\xCA\xDE\xB0!", 21) == 0) &&
strcmp(Memory.CompanyId, "A0") == 0) ||
- strcmp(Memory.ROMName, "DARK KINGDOM") == 0 ||
- strcmp(Memory.ROMName, "ZAN3 SFC") == 0 ||
- strcmp(Memory.ROMName, "HIOUDEN") == 0 ||
- strcmp(Memory.ROMName, "\xC3\xDD\xBC\xC9\xB3\xC0") == 0 || //Tenshi no Uta
- strcmp(Memory.ROMName, "FORTUNE QUEST") == 0 ||
- strcmp(Memory.ROMName, "FISHING TO BASSING") == 0 ||
+ match_na("DARK KINGDOM") ||
+ match_na("ZAN3 SFC") ||
+ match_na("HIOUDEN") ||
+ match_na("\xC3\xDD\xBC\xC9\xB3\xC0") || //Tenshi no Uta
+ match_na("FORTUNE QUEST") ||
+ match_na("FISHING TO BASSING") ||
strncmp(Memory.ROMName, "TokyoDome '95Battle 7", 21) == 0 ||
- strcmp(Memory.ROMName, "OHMONO BLACKBASS") == 0 ||
+ match_na("OHMONO BLACKBASS") ||
strncmp(Memory.ROMName, "SWORD WORLD SFC", 15) == 0 ||
- strcmp(Memory.ROMName, "MASTERS") == 0 || //Augusta 2 J
- strcmp(Memory.ROMName, "SFC \xB6\xD2\xDD\xD7\xB2\xC0\xDE\xB0") == 0 || //Kamen Rider
+ match_na("MASTERS") || //Augusta 2 J
+ match_na("SFC \xB6\xD2\xDD\xD7\xB2\xC0\xDE\xB0") || //Kamen Rider
strncmp(Memory.ROMName, "LETs PACHINKO(", 14) == 0) //A set of BS games
IAPU.OneCycle = 15;
#endif
//Specific game fixes
- Settings.StarfoxHack = strcmp(Memory.ROMName, "STAR FOX") == 0 ||
- strcmp(Memory.ROMName, "STAR WING") == 0;
- Settings.WinterGold = strcmp(Memory.ROMName, "FX SKIING NINTENDO 96") == 0 ||
- strcmp(Memory.ROMName, "DIRT RACER") == 0 ||
+ Settings.StarfoxHack = match_na("STAR FOX") ||
+ match_na("STAR WING");
+ Settings.WinterGold = match_na("FX SKIING NINTENDO 96") ||
+ match_na("DIRT RACER") ||
Settings.StarfoxHack;
- if((strcmp(Memory.ROMName, "LEGEND") == 0 && !Settings.PAL)||
- strcmp(Memory.ROMName, "King Arthurs World") == 0)
+ if((match_na("LEGEND") && !Settings.PAL)||
+ match_na("King Arthurs World"))
SNESGameFixes.EchoOnlyOutput = true;
Settings.HBlankStart = (256 * Settings.H_Max) / SNES_HCOUNTER_MAX;
@@ -2848,26 +2847,26 @@ void ApplyROMFixes()
//OAM hacks because we don't fully understand the
//behavior of the SNES.
- if (strcmp(Memory.ROMName, "\xBD\xB0\xCA\xDF\xB0\xCC\xA7\xD0\xBD\xC0") == 0 || //Super Famista
- strcmp(Memory.ROMName, "\xBD\xB0\xCA\xDF\xB0\xCC\xA7\xD0\xBD\xC0 2") == 0 || //Super Famista 2
- strcmp(Memory.ROMName, "ZENKI TENCHIMEIDOU") == 0 ||
- strcmp(Memory.ROMName, "GANBA LEAGUE") == 0)
+ if (match_na("\xBD\xB0\xCA\xDF\xB0\xCC\xA7\xD0\xBD\xC0") || //Super Famista
+ match_na("\xBD\xB0\xCA\xDF\xB0\xCC\xA7\xD0\xBD\xC0 2") || //Super Famista 2
+ match_na("ZENKI TENCHIMEIDOU") ||
+ match_na("GANBA LEAGUE"))
SNESGameFixes.APU_OutPorts_ReturnValueFix = true;
- else if (strcmp(Memory.ROMName, "FURAI NO SIREN") == 0)
+ else if (match_na("FURAI NO SIREN"))
SNESGameFixes.SoundEnvelopeHeightReading2 = true;
//CPU timing hacks
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * Settings.CyclesPercentage) / 100;
// A Couple of HDMA related hacks - Lantus
- if ((strcmp(Memory.ROMName, "SFX SUPERBUTOUDEN2") == 0) ||
- (strcmp(Memory.ROMName, "ALIEN vs. PREDATOR") == 0) ||
- (strcmp(Memory.ROMName, "STONE PROTECTORS") == 0) ||
- (strcmp(Memory.ROMName, "SUPER BATTLETANK 2") == 0))
+ if ((match_na("SFX SUPERBUTOUDEN2")) ||
+ (match_na("ALIEN vs. PREDATOR")) ||
+ (match_na("STONE PROTECTORS")) ||
+ (match_na("SUPER BATTLETANK 2")))
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 130) / 100;
- else if (strcmp(Memory.ROMName, "HOME IMPROVEMENT") == 0)
+ else if (match_na("HOME IMPROVEMENT"))
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 200) / 100;
- else if (strcmp(Memory.ROMId, "ASRJ") == 0 && Settings.CyclesPercentage == 100)
+ else if (match_id("ASRJ") && Settings.CyclesPercentage == 100)
// Street Racer
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 95) / 100;
// Power Rangers Fight
@@ -2878,13 +2877,13 @@ void ApplyROMFixes()
else if (strncmp(Memory.ROMId, "A3M", 3) == 0 && Settings.CyclesPercentage == 100)
// Mortal Kombat 3. Fixes cut off speech sample
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 110) / 100;
- else if (strcmp(Memory.ROMName, "\x0bd\x0da\x0b2\x0d4\x0b0\x0bd\x0de") == 0 &&
+ else if (match_na("\x0bd\x0da\x0b2\x0d4\x0b0\x0bd\x0de") &&
Settings.CyclesPercentage == 100)
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 101) / 100;
- else if (strcmp(Memory.ROMName, "WILD TRAX") == 0 ||
- strcmp(Memory.ROMName, "STAR FOX 2") == 0 ||
- strcmp(Memory.ROMName, "YOSSY'S ISLAND") == 0 ||
- strcmp(Memory.ROMName, "YOSHI'S ISLAND") == 0)
+ else if (match_na("WILD TRAX") ||
+ match_na("STAR FOX 2") ||
+ match_na("YOSSY'S ISLAND") ||
+ match_na("YOSHI'S ISLAND"))
CPU.TriedInterleavedMode2 = true;
// Start Trek: Deep Sleep 9
else if (strncmp(Memory.ROMId, "A9D", 3) == 0 && Settings.CyclesPercentage == 100)
@@ -3069,7 +3068,7 @@ void ApplyROMFixes()
// Additional game fixes by sanmaiwashi ...
// Gundam Knight Story
- if (strcmp(Memory.ROMName, "SFX \xC5\xB2\xC4\xB6\xDE\xDD\xC0\xDE\xD1\xD3\xC9\xB6\xDE\xC0\xD8 1") == 0)
+ if (match_na("SFX \xC5\xB2\xC4\xB6\xDE\xDD\xC0\xDE\xD1\xD3\xC9\xB6\xDE\xC0\xD8 1"))
{
bytes0x2000 [0xb18] = 0x4c;
bytes0x2000 [0xb19] = 0x4b;
@@ -3078,13 +3077,13 @@ void ApplyROMFixes()
}
//sram value fixes
- if (strcmp(Memory.ROMName, "SUPER DRIFT OUT") == 0 ||
- strcmp(Memory.ROMName, "SATAN IS OUR FATHER!") == 0 ||
- strcmp(Memory.ROMName, "goemon 4") == 0)
+ if (match_na("SUPER DRIFT OUT") ||
+ match_na("SATAN IS OUR FATHER!") ||
+ match_na("goemon 4"))
SNESGameFixes.SRAMInitialValue = 0x00;
if(Settings.BS && Memory.LoROM &&
- strcmp(Memory.ROMName, "F-ZERO") == 0 &&
+ match_na("F-ZERO") &&
Memory.ROMChecksum == 0xb10d &&
Memory.ROMComplementChecksum == 0x4ef2)
Memory.ROM[0x7fd0] = 0xFF; // fix memory pack position bits
diff --git a/source/ppu.c b/source/ppu.c
index bf1aa8a..80920b1 100644
--- a/source/ppu.c
+++ b/source/ppu.c
@@ -1165,8 +1165,8 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
CPU.Flags |= NMI_FLAG;
CPU.NMIActive = true;
CPU.NMICycleCount = CPU.Cycles + TWO_CYCLES;
+ break;
}
- break;
case 0x4201:
if ((byte & 0x80) == 0 && (Memory.FillRAM[0x4213] & 0x80) == 0x80)
S9xLatchCounters(1);
@@ -2363,20 +2363,15 @@ void S9xSuperFXExec()
{
if (Settings.SuperFX)
{
- if ((Memory.FillRAM [0x3000 + GSU_SFR] & FLG_G) &&
- (Memory.FillRAM [0x3000 + GSU_SCMR] & 0x18) == 0x18)
+ if ((Memory.FillRAM [0x3000 + GSU_SFR] & FLG_G) && (Memory.FillRAM [0x3000 + GSU_SCMR] & 0x18) == 0x18)
{
if (!Settings.WinterGold || Settings.StarfoxHack)
FxEmulate(~0);
else
FxEmulate((Memory.FillRAM [0x3000 + GSU_CLSR] & 1) ? 700 : 350);
- int32_t GSUStatus = Memory.FillRAM [0x3000 + GSU_SFR] |
- (Memory.FillRAM [0x3000 + GSU_SFR + 1] << 8);
+ int32_t GSUStatus = Memory.FillRAM [0x3000 + GSU_SFR] | (Memory.FillRAM [0x3000 + GSU_SFR + 1] << 8);
if ((GSUStatus & (FLG_G | FLG_IRQ)) == FLG_IRQ)
- {
- // Trigger a GSU IRQ.
- S9xSetIRQ(GSU_IRQ_SOURCE);
- }
+ S9xSetIRQ(GSU_IRQ_SOURCE); // Trigger a GSU IRQ.
}
}
}