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author | Twinaphex | 2017-06-18 18:41:06 +0200 |
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committer | GitHub | 2017-06-18 18:41:06 +0200 |
commit | 1aecedc999445e9a27e04f665fd562b576775d08 (patch) | |
tree | c526c7d332be548a42364eea9113b6d33345b840 /source/apu.h | |
parent | dc596c886e0ec2728dc353dd7862cdf1e5a5ff44 (diff) | |
parent | bcaf44c511efaad9d803dde9b0fdbb046498c66f (diff) | |
download | snes9x2005-1aecedc999445e9a27e04f665fd562b576775d08.tar.gz snes9x2005-1aecedc999445e9a27e04f665fd562b576775d08.tar.bz2 snes9x2005-1aecedc999445e9a27e04f665fd562b576775d08.zip |
Merge pull request #36 from jamsilva/master
Compatibility fixes.
Diffstat (limited to 'source/apu.h')
-rw-r--r-- | source/apu.h | 107 |
1 files changed, 56 insertions, 51 deletions
diff --git a/source/apu.h b/source/apu.h index 57ff79d..3e034c1 100644 --- a/source/apu.h +++ b/source/apu.h @@ -23,8 +23,8 @@ typedef struct uint8_t _Carry; uint8_t _Zero; uint8_t _Overflow; - uint32_t TimerErrorCounter; - uint32_t Scanline; + uint32_t UNUSED1; + uint32_t UNUSED2; int32_t OneCycle; int32_t TwoCycles; } SIAPU; @@ -33,75 +33,80 @@ typedef struct { int32_t Cycles; bool ShowROM; - uint8_t Flags; + uint8_t UNUSED1; uint8_t KeyedChannels; - uint8_t OutPorts [4]; - uint8_t DSP [0x80]; - uint8_t ExtraRAM [64]; - uint16_t Timer [3]; - uint16_t TimerTarget [3]; + uint8_t OutPorts [4]; + uint8_t DSP [0x80]; + uint8_t ExtraRAM [64]; + uint16_t Timer [3]; + uint16_t TimerTarget [3]; bool TimerEnabled [3]; - bool TimerValueWritten [3]; + bool UNUSED2 [3]; } SAPU; SAPU APU; SIAPU IAPU; -static inline void S9xAPUUnpackStatus() +static inline void S9xAPUUnpackStatus(void) { - IAPU._Zero = ((IAPU.Registers.P & Zero) == 0) | (IAPU.Registers.P & Negative); - IAPU._Carry = (IAPU.Registers.P & Carry); - IAPU._Overflow = (IAPU.Registers.P & Overflow) >> 6; + IAPU._Zero = ((IAPU.Registers.P & Zero) == 0) | (IAPU.Registers.P & Negative); + IAPU._Carry = (IAPU.Registers.P & Carry); + IAPU._Overflow = IAPU.Registers.P & Overflow; } -static inline void S9xAPUPackStatus() +static inline void S9xAPUPackStatus(void) { IAPU.Registers.P &= ~(Zero | Negative | Carry | Overflow); - IAPU.Registers.P |= IAPU._Carry | ((IAPU._Zero == 0) << 1) | - (IAPU._Zero & 0x80) | (IAPU._Overflow << 6); + if (IAPU._Carry) + IAPU.Registers.P |= Carry; + if (!IAPU._Zero) + IAPU.Registers.P |= Zero; + if (IAPU._Overflow) + IAPU.Registers.P |= Overflow; + if (IAPU._Zero & 0x80) + IAPU.Registers.P |= Negative; } -void S9xResetAPU(); -bool S9xInitAPU(); -void S9xDeinitAPU(); -void S9xDecacheSamples(); +void S9xResetAPU(void); +bool S9xInitAPU(void); +void S9xDeinitAPU(void); +void S9xDecacheSamples(void); void S9xSetAPUControl(uint8_t byte); void S9xSetAPUDSP(uint8_t byte); -uint8_t S9xGetAPUDSP(); -bool S9xInitSound(); -void S9xOpenCloseSoundTracingFile(bool); -void S9xPrintAPUState(); +uint8_t S9xGetAPUDSP(void); +bool S9xInitSound(void); +void S9xPrintAPUState(void); extern uint16_t S9xAPUCycles [256]; // Scaled cycle lengths extern uint16_t S9xAPUCycleLengths [256]; // Raw data. -extern void (*S9xApuOpcodes [256])(); +extern void (*S9xApuOpcodes [256])(void); -#define APU_VOL_LEFT 0x00 +#define APU_VOL_LEFT 0x00 #define APU_VOL_RIGHT 0x01 -#define APU_P_LOW 0x02 -#define APU_P_HIGH 0x03 -#define APU_SRCN 0x04 -#define APU_ADSR1 0x05 -#define APU_ADSR2 0x06 -#define APU_GAIN 0x07 -#define APU_ENVX 0x08 -#define APU_OUTX 0x09 - -#define APU_MVOL_LEFT 0x0c +#define APU_P_LOW 0x02 +#define APU_P_HIGH 0x03 +#define APU_SRCN 0x04 +#define APU_ADSR1 0x05 +#define APU_ADSR2 0x06 +#define APU_GAIN 0x07 +#define APU_ENVX 0x08 +#define APU_OUTX 0x09 + +#define APU_MVOL_LEFT 0x0c #define APU_MVOL_RIGHT 0x1c -#define APU_EVOL_LEFT 0x2c +#define APU_EVOL_LEFT 0x2c #define APU_EVOL_RIGHT 0x3c -#define APU_KON 0x4c -#define APU_KOFF 0x5c -#define APU_FLG 0x6c -#define APU_ENDX 0x7c +#define APU_KON 0x4c +#define APU_KOFF 0x5c +#define APU_FLG 0x6c +#define APU_ENDX 0x7c -#define APU_EFB 0x0d +#define APU_EFB 0x0d #define APU_PMON 0x2d -#define APU_NON 0x3d -#define APU_EON 0x4d -#define APU_DIR 0x5d -#define APU_ESA 0x6d -#define APU_EDL 0x7d +#define APU_NON 0x3d +#define APU_EON 0x4d +#define APU_DIR 0x5d +#define APU_ESA 0x6d +#define APU_EDL 0x7d #define APU_C0 0x0f #define APU_C1 0x1f @@ -112,8 +117,8 @@ extern void (*S9xApuOpcodes [256])(); #define APU_C6 0x6f #define APU_C7 0x7f -#define APU_SOFT_RESET 0x80 -#define APU_MUTE 0x40 +#define APU_SOFT_RESET 0x80 +#define APU_MUTE 0x40 #define APU_ECHO_DISABLED 0x20 #define FREQUENCY_MASK 0x3fff @@ -122,7 +127,7 @@ extern void (*S9xApuOpcodes [256])(); #else #include "apu_blargg.h" #define ONE_APU_CYCLE 21 -#define APU_EXECUTE1() do{}while(0) -#define APU_EXECUTE() do{}while(0) +#define APU_EXECUTE1() do {} while(0) +#define APU_EXECUTE() do {} while(0) #endif |