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authorNebuleon Fumika2012-12-26 14:42:02 -0500
committerNebuleon Fumika2012-12-26 14:42:02 -0500
commite5869adc4469115c7eac9abf70145fc178e017de (patch)
tree552805b1c150fea2f5e905e550d034f71c03fb75 /source/cpu.cpp
parent139c793b584a76acd42d72ec019d2cabab7d3ee7 (diff)
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Merge Registers structures into their respective CPUs to avoid additional memory addresses being loaded every opcode.
Diffstat (limited to 'source/cpu.cpp')
-rw-r--r--source/cpu.cpp20
1 files changed, 10 insertions, 10 deletions
diff --git a/source/cpu.cpp b/source/cpu.cpp
index 80e387f..d6e8f53 100644
--- a/source/cpu.cpp
+++ b/source/cpu.cpp
@@ -117,15 +117,15 @@ void S9xResetSuperFX ()
void S9xResetCPU ()
{
- Registers.PB = 0;
- Registers.PC = S9xGetWord (0xFFFC);
- Registers.D.W = 0;
- Registers.DB = 0;
- Registers.SH = 1;
- Registers.SL = 0xFF;
- Registers.XH = 0;
- Registers.YH = 0;
- Registers.P.W = 0;
+ ICPU.Registers.PB = 0;
+ ICPU.Registers.PC = S9xGetWord (0xFFFC);
+ ICPU.Registers.D.W = 0;
+ ICPU.Registers.DB = 0;
+ ICPU.Registers.SH = 1;
+ ICPU.Registers.SL = 0xFF;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
+ ICPU.Registers.P.W = 0;
ICPU.ShiftedPB = 0;
ICPU.ShiftedDB = 0;
@@ -157,7 +157,7 @@ void S9xResetCPU ()
//CPU.TriedInterleavedMode2 = FALSE; // Reset when ROM image loaded
CPU.NMICycleCount = 0;
CPU.IRQCycleCount = 0;
- S9xSetPCBase (Registers.PC);
+ S9xSetPCBase (ICPU.Registers.PC);
ICPU.S9xOpcodes = S9xOpcodesE1;
ICPU.CPUExecuting = TRUE;