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authorNebuleon Fumika2012-12-31 13:46:47 -0500
committerNebuleon Fumika2012-12-31 13:46:47 -0500
commitc5d385d6643e157d6f90d3608004f0f37b64ab75 (patch)
tree1f703aa40e11aded99b4e0a4476a21bd25074d61 /source/cpuaddr.h
parent22fa90a3b3383cc5ba24ce61a7de1d9c64b6601b (diff)
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MIPS requires 2-byte reads to be aligned to even addresses. #define FAST_ALIGNED_LSB_WORD_ACCESS and use it to read absolute 24-bit addresses as either 1 byte & 1 halfword, or 1 halfword & 1 byte.
Diffstat (limited to 'source/cpuaddr.h')
-rw-r--r--source/cpuaddr.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/source/cpuaddr.h b/source/cpuaddr.h
index 34fb41b..91a0347 100644
--- a/source/cpuaddr.h
+++ b/source/cpuaddr.h
@@ -256,6 +256,11 @@ static void AbsoluteLong (AccessMode a, InternalOp op)
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
Addr = (*(uint32 *) CPU.PC) & 0xffffff;
+#elif defined FAST_ALIGNED_LSB_WORD_ACCESS
+ if (((int) CPU.PC & 1) == 0)
+ Addr = (*(uint16 *) CPU.PC) + (*(CPU.PC + 2) << 16);
+ else
+ Addr = *CPU.PC + ((*(uint16 *) (CPU.PC + 1)) << 8);
#else
Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16);
#endif
@@ -434,6 +439,11 @@ static void AbsoluteLongIndexedX (AccessMode a, InternalOp op)
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
Addr = (*(uint32 *) CPU.PC + ICPU.Registers.X.W) & 0xffffff;
+#elif defined FAST_ALIGNED_LSB_WORD_ACCESS
+ if (((int) CPU.PC & 1) == 0)
+ Addr = ((*(uint16 *) CPU.PC) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xFFFFFF;
+ else
+ Addr = (*CPU.PC + ((*(uint16 *) (CPU.PC + 1)) << 8) + ICPU.Registers.X.W) & 0xFFFFFF;
#else
Addr = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xffffff;
#endif