aboutsummaryrefslogtreecommitdiff
path: root/source
diff options
context:
space:
mode:
authorTwinaphex2017-08-14 15:48:28 +0200
committerGitHub2017-08-14 15:48:28 +0200
commit4b70a73bcdb09e7f96a1e5696a512f4d33667f40 (patch)
tree4e02083a3f6716359480d073e0f752c558a32b25 /source
parent4b0bf2bc68a317b98382823ea2b7dd2e77ec8d37 (diff)
parent5f1565662cef6e024536fad743a4dca0aa1d14bb (diff)
downloadsnes9x2005-4b70a73bcdb09e7f96a1e5696a512f4d33667f40.tar.gz
snes9x2005-4b70a73bcdb09e7f96a1e5696a512f4d33667f40.tar.bz2
snes9x2005-4b70a73bcdb09e7f96a1e5696a512f4d33667f40.zip
Merge pull request #40 from jamsilva/master
CPU emulation fixes.
Diffstat (limited to 'source')
-rw-r--r--source/cpumacro.h139
-rw-r--r--source/cpuops.c112
2 files changed, 124 insertions, 127 deletions
diff --git a/source/cpumacro.h b/source/cpumacro.h
index 77d569f..902f332 100644
--- a/source/cpumacro.h
+++ b/source/cpumacro.h
@@ -22,32 +22,33 @@ static INLINE void SetZN8(uint8_t Work)
static INLINE void ADC8(void)
{
uint8_t Work8 = S9xGetByte(OpAddress);
-
if (CheckDecimal())
{
- uint8_t Ans8;
- uint8_t A1 = (ICPU.Registers.A.W) & 0x0f;
- uint8_t A2 = (ICPU.Registers.A.W) & 0xf0;
- uint8_t W1 = Work8 & 0x0f;
- uint8_t W2 = Work8 & 0xf0;
+ int8_t Ans8;
+ uint8_t A1 = (ICPU.Registers.A.W) & 0xf;
+ uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xf;
+ uint8_t W1 = Work8 & 0xf;
+ uint8_t W2 = (Work8 >> 4) & 0xf;
A1 += W1 + CheckCarry();
- if (A1 >= 0x0a)
+ if (A1 > 9)
{
- A1 -= 0x0a;
- A2 += 0x10;
+ A1 -= 10;
+ A1 &= 0xf;
+ A2++;
}
A2 += W2;
- if (A2 >= 0xa0)
+ if (A2 > 9)
{
- A2 -= 0xa0;
+ A2 -= 10;
+ A2 &= 0xf;
SetCarry();
}
else
ClearCarry();
- Ans8 = A2 | A1;
+ Ans8 = (A2 << 4) | A1;
if (~(ICPU.Registers.AL ^ Work8) & (Work8 ^ Ans8) & 0x80)
SetOverflow();
else
@@ -56,7 +57,7 @@ static INLINE void ADC8(void)
}
else
{
- uint16_t Ans16 = ICPU.Registers.AL + Work8 + CheckCarry();
+ int16_t Ans16 = ICPU.Registers.AL + Work8 + CheckCarry();
ICPU._Carry = Ans16 > 0xff;
if (~(ICPU.Registers.AL ^ Work8) & (Work8 ^ (uint8_t) Ans16) & 0x80)
SetOverflow();
@@ -70,50 +71,53 @@ static INLINE void ADC8(void)
static INLINE void ADC16(void)
{
uint16_t Work16 = S9xGetWord(OpAddress);
-
if (CheckDecimal())
{
uint16_t Ans16;
- uint16_t A1 = ICPU.Registers.A.W & 0x000f;
- uint16_t A2 = ICPU.Registers.A.W & 0x00f0;
- uint16_t A3 = ICPU.Registers.A.W & 0x0f00;
- uint16_t A4 = ICPU.Registers.A.W & 0xf000;
- uint16_t W1 = Work16 & 0x000f;
- uint16_t W2 = Work16 & 0x00f0;
- uint16_t W3 = Work16 & 0x0f00;
- uint16_t W4 = Work16 & 0xf000;
+ uint8_t A1 = (ICPU.Registers.A.W) & 0xf;
+ uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xf;
+ uint8_t A3 = (ICPU.Registers.A.W >> 8) & 0xf;
+ uint8_t A4 = (ICPU.Registers.A.W >> 12) & 0xf;
+ uint8_t W1 = Work16 & 0xf;
+ uint8_t W2 = (Work16 >> 4) & 0xf;
+ uint8_t W3 = (Work16 >> 8) & 0xf;
+ uint8_t W4 = (Work16 >> 12) & 0xf;
A1 += W1 + CheckCarry();
- if (A1 >= 0x000a)
+ if (A1 > 9)
{
- A1 -= 0x000a;
- A2 += 0x0010;
+ A1 -= 10;
+ A1 &= 0xf;
+ A2++;
}
A2 += W2;
- if (A2 >= 0x00a0)
+ if (A2 > 9)
{
- A2 -= 0x00a0;
- A3 += 0x0100;
+ A2 -= 10;
+ A2 &= 0xf;
+ A3++;
}
A3 += W3;
- if (A3 >= 0x0a00)
+ if (A3 > 9)
{
- A3 -= 0x0a00;
- A4 += 0x1000;
+ A3 -= 10;
+ A3 &= 0xf;
+ A4++;
}
A4 += W4;
- if (A4 >= 0xa000)
+ if (A4 > 9)
{
- A4 -= 0xa000;
+ A4 -= 10;
+ A4 &= 0xf;
SetCarry();
}
else
ClearCarry();
- Ans16 = A4 | A3 | A2 | A1;
+ Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
if (~(ICPU.Registers.A.W ^ Work16) & (Work16 ^ Ans16) & 0x8000)
SetOverflow();
else
@@ -562,51 +566,46 @@ static INLINE void ROR8(void)
static INLINE void SBC16(void)
{
uint16_t Work16 = S9xGetWord(OpAddress);
-
if (CheckDecimal())
{
uint16_t Ans16;
- uint16_t A1 = ICPU.Registers.A.W & 0x000f;
- uint16_t A2 = ICPU.Registers.A.W & 0x00f0;
- uint16_t A3 = ICPU.Registers.A.W & 0x0f00;
- uint16_t A4 = ICPU.Registers.A.W & 0xf000;
- uint16_t W1 = Work16 & 0x000f;
- uint16_t W2 = Work16 & 0x00f0;
- uint16_t W3 = Work16 & 0x0f00;
- uint16_t W4 = Work16 & 0xf000;
+ uint8_t A1 = (ICPU.Registers.A.W) & 0xf;
+ uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xf;
+ uint8_t A3 = (ICPU.Registers.A.W >> 8) & 0xf;
+ uint8_t A4 = (ICPU.Registers.A.W >> 12) & 0xf;
+ uint8_t W1 = Work16 & 0xf;
+ uint8_t W2 = (Work16 >> 4) & 0xf;
+ uint8_t W3 = (Work16 >> 8) & 0xf;
+ uint8_t W4 = (Work16 >> 12) & 0xf;
A1 -= W1 + !CheckCarry();
A2 -= W2;
A3 -= W3;
A4 -= W4;
- if (A1 > 0x000f)
+ if (A1 > 9)
{
- A1 += 0x000a;
- A1 &= 0x000f;
- A2 -= 0x0010;
+ A1 += 10;
+ A2--;
}
- if (A2 > 0x00f0)
+ if (A2 > 9)
{
- A2 += 0x00a0;
- A2 &= 0x00f0;
- A3 -= 0x0100;
+ A2 += 10;
+ A3--;
}
- if (A3 > 0x0f00)
+ if (A3 > 9)
{
- A3 += 0x0a00;
- A3 &= 0x0f00;
- A4 -= 0x1000;
+ A3 += 10;
+ A4--;
}
- if (A4 > 0xf000)
+ if (A4 > 9)
{
- A4 += 0xa000;
- A4 &= 0xf000;
+ A4 += 10;
ClearCarry();
}
else
SetCarry();
- Ans16 = A4 | A3 | A2 | A1;
+ Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
if ((ICPU.Registers.A.W ^ Work16) & (ICPU.Registers.A.W ^ Ans16) & 0x8000)
SetOverflow();
else
@@ -632,29 +631,27 @@ static INLINE void SBC8(void)
if (CheckDecimal())
{
uint8_t Ans8;
- uint8_t A1 = ICPU.Registers.A.W & 0x0f;
- uint8_t A2 = ICPU.Registers.A.W & 0xf0;
- uint8_t W1 = Work8 & 0x0f;
- uint8_t W2 = Work8 & 0xf0;
+ uint8_t A1 = (ICPU.Registers.A.W) & 0xf;
+ uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xf;
+ uint8_t W1 = Work8 & 0xf;
+ uint8_t W2 = (Work8 >> 4) & 0xf;
A1 -= W1 + !CheckCarry();
A2 -= W2;
- if (A1 > 0x0f)
+ if (A1 > 9)
{
- A1 += 0x0a;
- A1 &= 0x0f;
- A2 -= 0x10;
+ A1 += 10;
+ A2--;
}
- if (A2 > 0xf0)
+ if (A2 > 9)
{
- A2 += 0xa0;
- A2 &= 0xf0;
+ A2 += 10;
ClearCarry();
}
else
SetCarry();
- Ans8 = A2 | A1;
+ Ans8 = (A2 << 4) | A1;
if ((ICPU.Registers.AL ^ Work8) & (ICPU.Registers.AL ^ Ans8) & 0x80)
SetOverflow();
else
diff --git a/source/cpuops.c b/source/cpuops.c
index e529e98..129ffef 100644
--- a/source/cpuops.c
+++ b/source/cpuops.c
@@ -406,49 +406,49 @@ static void Op0AM0(void)
static void Op06M1(void)
{
- Direct(false);
+ Direct(true);
ASL8();
}
static void Op06M0(void)
{
- Direct(false);
+ Direct(true);
ASL16();
}
static void Op16M1(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
ASL8();
}
static void Op16M0(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
ASL16();
}
static void Op0EM1(void)
{
- Absolute(false);
+ Absolute(true);
ASL8();
}
static void Op0EM0(void)
{
- Absolute(false);
+ Absolute(true);
ASL16();
}
static void Op1EM1(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
ASL8();
}
static void Op1EM0(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
ASL16();
}
@@ -829,49 +829,49 @@ static void Op3AM0(void)
static void OpC6M1(void)
{
- Direct(false);
+ Direct(true);
DEC8();
}
static void OpC6M0(void)
{
- Direct(false);
+ Direct(true);
DEC16();
}
static void OpD6M1(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
DEC8();
}
static void OpD6M0(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
DEC16();
}
static void OpCEM1(void)
{
- Absolute(false);
+ Absolute(true);
DEC8();
}
static void OpCEM0(void)
{
- Absolute(false);
+ Absolute(true);
DEC16();
}
static void OpDEM1(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
DEC8();
}
static void OpDEM0(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
DEC16();
}
@@ -1080,49 +1080,49 @@ static void Op1AM0(void)
static void OpE6M1(void)
{
- Direct(false);
+ Direct(true);
INC8();
}
static void OpE6M0(void)
{
- Direct(false);
+ Direct(true);
INC16();
}
static void OpF6M1(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
INC8();
}
static void OpF6M0(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
INC16();
}
static void OpEEM1(void)
{
- Absolute(false);
+ Absolute(true);
INC8();
}
static void OpEEM0(void)
{
- Absolute(false);
+ Absolute(true);
INC16();
}
static void OpFEM1(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
INC8();
}
static void OpFEM0(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
INC16();
}
@@ -1477,49 +1477,49 @@ static void Op4AM0(void)
static void Op46M1(void)
{
- Direct(false);
+ Direct(true);
LSR8();
}
static void Op46M0(void)
{
- Direct(false);
+ Direct(true);
LSR16();
}
static void Op56M1(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
LSR8();
}
static void Op56M0(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
LSR16();
}
static void Op4EM1(void)
{
- Absolute(false);
+ Absolute(true);
LSR8();
}
static void Op4EM0(void)
{
- Absolute(false);
+ Absolute(true);
LSR16();
}
static void Op5EM1(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
LSR8();
}
static void Op5EM0(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
LSR16();
}
@@ -1728,49 +1728,49 @@ static void Op2AM0(void)
static void Op26M1(void)
{
- Direct(false);
+ Direct(true);
ROL8();
}
static void Op26M0(void)
{
- Direct(false);
+ Direct(true);
ROL16();
}
static void Op36M1(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
ROL8();
}
static void Op36M0(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
ROL16();
}
static void Op2EM1(void)
{
- Absolute(false);
+ Absolute(true);
ROL8();
}
static void Op2EM0(void)
{
- Absolute(false);
+ Absolute(true);
ROL16();
}
static void Op3EM1(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
ROL8();
}
static void Op3EM0(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
ROL16();
}
@@ -1787,49 +1787,49 @@ static void Op6AM0(void)
static void Op66M1(void)
{
- Direct(false);
+ Direct(true);
ROR8();
}
static void Op66M0(void)
{
- Direct(false);
+ Direct(true);
ROR16();
}
static void Op76M1(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
ROR8();
}
static void Op76M0(void)
{
- DirectIndexedX(false);
+ DirectIndexedX(true);
ROR16();
}
static void Op6EM1(void)
{
- Absolute(false);
+ Absolute(true);
ROR8();
}
static void Op6EM0(void)
{
- Absolute(false);
+ Absolute(true);
ROR16();
}
static void Op7EM1(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
ROR8();
}
static void Op7EM0(void)
{
- AbsoluteIndexedX(false);
+ AbsoluteIndexedX(true);
ROR16();
}
@@ -2317,50 +2317,50 @@ static void Op9EM0(void)
/* TRB */
static void Op14M1(void)
{
- Direct(false);
+ Direct(true);
TRB8();
}
static void Op14M0(void)
{
- Direct(false);
+ Direct(true);
TRB16();
}
static void Op1CM1(void)
{
- Absolute(false);
+ Absolute(true);
TRB8();
}
static void Op1CM0(void)
{
- Absolute(false);
+ Absolute(true);
TRB16();
}
/* TSB */
static void Op04M1(void)
{
- Direct(false);
+ Direct(true);
TSB8();
}
static void Op04M0(void)
{
- Direct(false);
+ Direct(true);
TSB16();
}
static void Op0CM1(void)
{
- Absolute(false);
+ Absolute(true);
TSB8();
}
static void Op0CM0(void)
{
- Absolute(false);
+ Absolute(true);
TSB16();
}