aboutsummaryrefslogtreecommitdiff
path: root/source/cpuaddr.h
diff options
context:
space:
mode:
Diffstat (limited to 'source/cpuaddr.h')
-rw-r--r--source/cpuaddr.h390
1 files changed, 196 insertions, 194 deletions
diff --git a/source/cpuaddr.h b/source/cpuaddr.h
index 6335495..3ca6dbf 100644
--- a/source/cpuaddr.h
+++ b/source/cpuaddr.h
@@ -1,6 +1,6 @@
/*******************************************************************************
Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
-
+
(c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and
Jerremy Koot (jkoot@snes9x.com)
@@ -43,46 +43,46 @@
S-DD1 C emulator code
(c) Copyright 2003 Brad Jorsch with research by
Andreas Naive and John Weidman
-
+
S-RTC C emulator code
(c) Copyright 2001 John Weidman
-
+
ST010 C++ emulator code
(c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora
- Super FX x86 assembler emulator code
- (c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault
+ Super FX x86 assembler emulator code
+ (c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault
- Super FX C emulator code
+ Super FX C emulator code
(c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman
SH assembler code partly based on x86 assembler code
- (c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
+ (c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
+
-
Specific ports contains the works of other authors. See headers in
individual files.
-
+
Snes9x homepage: http://www.snes9x.com
-
+
Permission to use, copy, modify and distribute Snes9x in both binary and
source form, for non-commercial purposes, is hereby granted without fee,
providing that this license information and copyright notice appear with
all copies and any derived work.
-
+
This software is provided 'as-is', without any express or implied
warranty. In no event shall the authors be held liable for any damages
arising from the use of this software.
-
+
Snes9x is freeware for PERSONAL USE only. Commercial users should
seek permission of the copyright holders first. Commercial use includes
charging money for Snes9x or software derived from Snes9x.
-
+
The copyright holders request that bug fixes and improvements to the code
should be forwarded to them so everyone can benefit from the modifications
in future versions.
-
+
Super NES and Super Nintendo Entertainment System are trademarks of
Nintendo Co., Limited and its subsidiary companies.
*******************************************************************************/
@@ -90,291 +90,293 @@
#ifndef _CPUADDR_H_
#define _CPUADDR_H_
-typedef enum {
- NONE = 0,
- READ = 1,
- WRITE = 2,
- MODIFY = 3,
- JUMP = 4
+typedef enum
+{
+ NONE = 0,
+ READ = 1,
+ WRITE = 2,
+ MODIFY = 3,
+ JUMP = 4
} AccessMode;
// The type for a function that can run after the addressing mode is resolved:
// void NAME (long Addr) {...}
-typedef void (*InternalOp) (long);
+typedef void (*InternalOp)(long);
-static void Immediate8 (AccessMode a, InternalOp op)
+static void Immediate8(AccessMode a, InternalOp op)
{
- long Addr = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
- CPU.PC++;
- (*op)(Addr);
+ long Addr = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
+ CPU.PC++;
+ (*op)(Addr);
}
-static void Immediate16 (AccessMode a, InternalOp op)
+static void Immediate16(AccessMode a, InternalOp op)
{
- long Addr = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
- CPU.PC += 2;
- (*op)(Addr);
+ long Addr = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
+ CPU.PC += 2;
+ (*op)(Addr);
}
-static void Relative (AccessMode a, InternalOp op)
+static void Relative(AccessMode a, InternalOp op)
{
- int8 Int8 = *CPU.PC++;
- long Addr = ((intptr_t) (CPU.PC - CPU.PCBase) + Int8) & 0xffff;
- (*op)(Addr);
+ int8 Int8 = *CPU.PC++;
+ long Addr = ((intptr_t)(CPU.PC - CPU.PCBase) + Int8) & 0xffff;
+ (*op)(Addr);
}
-static void RelativeLong (AccessMode a, InternalOp op)
+static void RelativeLong(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = *(uint16 *) CPU.PC;
+ Addr = *(uint16*) CPU.PC;
#else
- Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
+ Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
- CPU.PC += 2;
- Addr += (CPU.PC - CPU.PCBase);
- Addr &= 0xffff;
- (*op)(Addr);
+ CPU.PC += 2;
+ Addr += (CPU.PC - CPU.PCBase);
+ Addr &= 0xffff;
+ (*op)(Addr);
}
-static void AbsoluteIndexedIndirect (AccessMode a, InternalOp op)
+static void AbsoluteIndexedIndirect(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = (ICPU.Registers.X.W + *(uint16 *) CPU.PC) & 0xffff;
+ Addr = (ICPU.Registers.X.W + * (uint16*) CPU.PC) & 0xffff;
#else
- Addr = (ICPU.Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff;
+ Addr = (ICPU.Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff;
#endif
- OpenBus = *(CPU.PC + 1);
- CPU.PC += 2;
- Addr = S9xGetWord (ICPU.ShiftedPB + Addr);
- if(a&READ) OpenBus = (uint8)(Addr>>8);
- (*op)(Addr);
+ OpenBus = *(CPU.PC + 1);
+ CPU.PC += 2;
+ Addr = S9xGetWord(ICPU.ShiftedPB + Addr);
+ if (a & READ) OpenBus = (uint8)(Addr >> 8);
+ (*op)(Addr);
}
-static void AbsoluteIndirectLong (AccessMode a, InternalOp op)
+static void AbsoluteIndirectLong(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = *(uint16 *) CPU.PC;
+ Addr = *(uint16*) CPU.PC;
#else
- Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
+ Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
- OpenBus = *(CPU.PC + 1);
- CPU.PC += 2;
- if(a&READ) {
- Addr = S9xGetWord (Addr) | ((OpenBus=S9xGetByte (Addr + 2)) << 16);
- } else {
- Addr = S9xGetWord (Addr) | (S9xGetByte (Addr + 2) << 16);
- }
- (*op)(Addr);
+ OpenBus = *(CPU.PC + 1);
+ CPU.PC += 2;
+ if (a & READ)
+ Addr = S9xGetWord(Addr) | ((OpenBus = S9xGetByte(Addr + 2)) << 16);
+ else
+ Addr = S9xGetWord(Addr) | (S9xGetByte(Addr + 2) << 16);
+ (*op)(Addr);
}
-static void AbsoluteIndirect (AccessMode a, InternalOp op)
+static void AbsoluteIndirect(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = *(uint16 *) CPU.PC;
+ Addr = *(uint16*) CPU.PC;
#else
- Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
+ Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
- OpenBus = *(CPU.PC + 1);
- CPU.PC += 2;
- Addr = S9xGetWord (Addr);
- if(a&READ) OpenBus = (uint8)(Addr>>8);
- Addr += ICPU.ShiftedPB;
- (*op)(Addr);
+ OpenBus = *(CPU.PC + 1);
+ CPU.PC += 2;
+ Addr = S9xGetWord(Addr);
+ if (a & READ) OpenBus = (uint8)(Addr >> 8);
+ Addr += ICPU.ShiftedPB;
+ (*op)(Addr);
}
-static void Absolute (AccessMode a, InternalOp op)
+static void Absolute(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = *(uint16 *) CPU.PC + ICPU.ShiftedDB;
+ Addr = *(uint16*) CPU.PC + ICPU.ShiftedDB;
#else
- Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.ShiftedDB;
+ Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.ShiftedDB;
#endif
- if(a&READ) OpenBus = *(CPU.PC+1);
- CPU.PC += 2;
- (*op)(Addr);
+ if (a & READ) OpenBus = *(CPU.PC + 1);
+ CPU.PC += 2;
+ (*op)(Addr);
}
-static void AbsoluteLong (AccessMode a, InternalOp op)
+static void AbsoluteLong(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = (*(uint32 *) CPU.PC) & 0xffffff;
+ Addr = (*(uint32*) CPU.PC) & 0xffffff;
#elif defined FAST_ALIGNED_LSB_WORD_ACCESS
- if (((intptr_t) CPU.PC & 1) == 0)
- Addr = (*(uint16 *) CPU.PC) + (*(CPU.PC + 2) << 16);
- else
- Addr = *CPU.PC + ((*(uint16 *) (CPU.PC + 1)) << 8);
+ if (((intptr_t) CPU.PC & 1) == 0)
+ Addr = (*(uint16*) CPU.PC) + (*(CPU.PC + 2) << 16);
+ else
+ Addr = *CPU.PC + ((*(uint16*)(CPU.PC + 1)) << 8);
#else
- Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16);
+ Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16);
#endif
- if(a&READ) OpenBus = *(CPU.PC+2);
- CPU.PC += 3;
- (*op)(Addr);
+ if (a & READ) OpenBus = *(CPU.PC + 2);
+ CPU.PC += 3;
+ (*op)(Addr);
}
static void Direct(AccessMode a, InternalOp op)
{
- if(a&READ) OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
-// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
- (*op)(Addr);
+ if (a & READ) OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+ // if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+ (*op)(Addr);
}
-static void DirectIndirectIndexed (AccessMode a, InternalOp op)
+static void DirectIndirectIndexed(AccessMode a, InternalOp op)
{
- OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+ OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
- Addr = S9xGetWord (Addr);
- if(a&READ) OpenBus = (uint8)(Addr>>8);
- Addr += ICPU.ShiftedDB + ICPU.Registers.Y.W;
+ Addr = S9xGetWord(Addr);
+ if (a & READ) OpenBus = (uint8)(Addr >> 8);
+ Addr += ICPU.ShiftedDB + ICPU.Registers.Y.W;
-// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
- // XXX: always add one if STA
- // XXX: else Add one cycle if crosses page boundary
- (*op)(Addr);
+ // if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+ // XXX: always add one if STA
+ // XXX: else Add one cycle if crosses page boundary
+ (*op)(Addr);
}
-static void DirectIndirectIndexedLong (AccessMode a, InternalOp op)
+static void DirectIndirectIndexedLong(AccessMode a, InternalOp op)
{
- OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
-
- if(a&READ){
- Addr = S9xGetWord (Addr) + ((OpenBus = S9xGetByte (Addr + 2)) << 16) + ICPU.Registers.Y.W;
- } else {
- Addr = S9xGetWord (Addr) + (S9xGetByte (Addr + 2) << 16) + ICPU.Registers.Y.W;
- }
-// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
- (*op)(Addr);
+ OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+
+ if (a & READ)
+ Addr = S9xGetWord(Addr) + ((OpenBus = S9xGetByte(Addr + 2)) << 16) +
+ ICPU.Registers.Y.W;
+ else
+ Addr = S9xGetWord(Addr) + (S9xGetByte(Addr + 2) << 16) + ICPU.Registers.Y.W;
+ // if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+ (*op)(Addr);
}
static void DirectIndexedIndirect(AccessMode a, InternalOp op)
{
- OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W) & 0xffff;
+ OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W) & 0xffff;
- Addr = S9xGetWord (Addr);
- if(a&READ) OpenBus = (uint8)(Addr>>8);
- Addr += ICPU.ShiftedDB;
- (*op)(Addr);
+ Addr = S9xGetWord(Addr);
+ if (a & READ) OpenBus = (uint8)(Addr >> 8);
+ Addr += ICPU.ShiftedDB;
+ (*op)(Addr);
}
-static void DirectIndexedX (AccessMode a, InternalOp op)
+static void DirectIndexedX(AccessMode a, InternalOp op)
{
- if(a&READ) OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W);
- Addr &= CheckEmulation() ? 0xff : 0xffff;
+ if (a & READ) OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W);
+ Addr &= CheckEmulation() ? 0xff : 0xffff;
- (*op)(Addr);
+ (*op)(Addr);
}
-static void DirectIndexedY (AccessMode a, InternalOp op)
+static void DirectIndexedY(AccessMode a, InternalOp op)
{
- if(a&READ) OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.Y.W);
- Addr &= CheckEmulation() ? 0xff : 0xffff;
- (*op)(Addr);
+ if (a & READ) OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.Y.W);
+ Addr &= CheckEmulation() ? 0xff : 0xffff;
+ (*op)(Addr);
}
-static void AbsoluteIndexedX (AccessMode a, InternalOp op)
+static void AbsoluteIndexedX(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = ICPU.ShiftedDB + *(uint16 *) CPU.PC + ICPU.Registers.X.W;
+ Addr = ICPU.ShiftedDB + *(uint16*) CPU.PC + ICPU.Registers.X.W;
#else
- Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
- ICPU.Registers.X.W;
+ Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
+ ICPU.Registers.X.W;
#endif
- if(a&READ) OpenBus = *(CPU.PC+1);
- CPU.PC += 2;
- // XXX: always add one cycle for ROL, LSR, etc
- // XXX: else is cross page boundary add one cycle
- (*op)(Addr);
+ if (a & READ) OpenBus = *(CPU.PC + 1);
+ CPU.PC += 2;
+ // XXX: always add one cycle for ROL, LSR, etc
+ // XXX: else is cross page boundary add one cycle
+ (*op)(Addr);
}
-static void AbsoluteIndexedY (AccessMode a, InternalOp op)
+static void AbsoluteIndexedY(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = ICPU.ShiftedDB + *(uint16 *) CPU.PC + ICPU.Registers.Y.W;
+ Addr = ICPU.ShiftedDB + *(uint16*) CPU.PC + ICPU.Registers.Y.W;
#else
- Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
- ICPU.Registers.Y.W;
-#endif
- if(a&READ) OpenBus = *(CPU.PC+1);
- CPU.PC += 2;
- // XXX: always add cycle for STA
- // XXX: else is cross page boundary add one cycle
- (*op)(Addr);
+ Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
+ ICPU.Registers.Y.W;
+#endif
+ if (a & READ) OpenBus = *(CPU.PC + 1);
+ CPU.PC += 2;
+ // XXX: always add cycle for STA
+ // XXX: else is cross page boundary add one cycle
+ (*op)(Addr);
}
-static void AbsoluteLongIndexedX (AccessMode a, InternalOp op)
+static void AbsoluteLongIndexedX(AccessMode a, InternalOp op)
{
- long Addr;
+ long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = (*(uint32 *) CPU.PC + ICPU.Registers.X.W) & 0xffffff;
+ Addr = (*(uint32*) CPU.PC + ICPU.Registers.X.W) & 0xffffff;
#elif defined FAST_ALIGNED_LSB_WORD_ACCESS
- if (((intptr_t) CPU.PC & 1) == 0)
- Addr = ((*(uint16 *) CPU.PC) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xFFFFFF;
- else
- Addr = (*CPU.PC + ((*(uint16 *) (CPU.PC + 1)) << 8) + ICPU.Registers.X.W) & 0xFFFFFF;
+ if (((intptr_t) CPU.PC & 1) == 0)
+ Addr = ((*(uint16*) CPU.PC) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) &
+ 0xFFFFFF;
+ else
+ Addr = (*CPU.PC + ((*(uint16*)(CPU.PC + 1)) << 8) + ICPU.Registers.X.W) &
+ 0xFFFFFF;
#else
- Addr = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xffffff;
+ Addr = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) +
+ ICPU.Registers.X.W) & 0xffffff;
#endif
- if(a&READ) OpenBus = *(CPU.PC+2);
- CPU.PC += 3;
- (*op)(Addr);
+ if (a & READ) OpenBus = *(CPU.PC + 2);
+ CPU.PC += 3;
+ (*op)(Addr);
}
-static void DirectIndirect (AccessMode a, InternalOp op)
+static void DirectIndirect(AccessMode a, InternalOp op)
{
- OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
- Addr = S9xGetWord (Addr);
- if(a&READ) OpenBus = (uint8)(Addr>>8);
- Addr += ICPU.ShiftedDB;
-
-// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
- (*op)(Addr);
+ OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+ Addr = S9xGetWord(Addr);
+ if (a & READ) OpenBus = (uint8)(Addr >> 8);
+ Addr += ICPU.ShiftedDB;
+
+ // if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+ (*op)(Addr);
}
-static void DirectIndirectLong (AccessMode a, InternalOp op)
+static void DirectIndirectLong(AccessMode a, InternalOp op)
{
- OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
- if(a&READ){
- Addr = S9xGetWord (Addr) + ((OpenBus=S9xGetByte (Addr + 2)) << 16);
- } else {
- Addr = S9xGetWord (Addr) + (S9xGetByte (Addr + 2) << 16);
- }
-// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
- (*op)(Addr);
+ OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+ if (a & READ)
+ Addr = S9xGetWord(Addr) + ((OpenBus = S9xGetByte(Addr + 2)) << 16);
+ else
+ Addr = S9xGetWord(Addr) + (S9xGetByte(Addr + 2) << 16);
+ // if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+ (*op)(Addr);
}
-static void StackRelative (AccessMode a, InternalOp op)
+static void StackRelative(AccessMode a, InternalOp op)
{
- if(a&READ) OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
- (*op)(Addr);
+ if (a & READ) OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
+ (*op)(Addr);
}
-static void StackRelativeIndirectIndexed (AccessMode a, InternalOp op)
+static void StackRelativeIndirectIndexed(AccessMode a, InternalOp op)
{
- OpenBus = *CPU.PC;
- long Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
- Addr = S9xGetWord (Addr);
- if(a&READ) OpenBus = (uint8)(Addr>>8);
- Addr = (Addr + ICPU.ShiftedDB +
- ICPU.Registers.Y.W) & 0xffffff;
- (*op)(Addr);
+ OpenBus = *CPU.PC;
+ long Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
+ Addr = S9xGetWord(Addr);
+ if (a & READ) OpenBus = (uint8)(Addr >> 8);
+ Addr = (Addr + ICPU.ShiftedDB +
+ ICPU.Registers.Y.W) & 0xffffff;
+ (*op)(Addr);
}
#endif
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 00:51:45 +0000