diff options
Diffstat (limited to 'source/ppu.c')
| -rw-r--r-- | source/ppu.c | 227 |
1 files changed, 113 insertions, 114 deletions
diff --git a/source/ppu.c b/source/ppu.c index 4ef83ad..07d32f4 100644 --- a/source/ppu.c +++ b/source/ppu.c @@ -47,7 +47,7 @@ void S9xUpdateHTimer() { if (PPU.HTimerPosition < CPU.Cycles) { - // Missed the IRQ on this line already + /* Missed the IRQ on this line already */ if (CPU.WhichEvent == HBLANK_END_EVENT || CPU.WhichEvent == HTIMER_AFTER_EVENT) { CPU.WhichEvent = HBLANK_END_EVENT; @@ -65,7 +65,7 @@ void S9xUpdateHTimer() { if (PPU.HTimerPosition > Settings.HBlankStart) { - // HTimer was to trigger before h-blank start, now triggers after start of h-blank + /* HTimer was to trigger before h-blank start, now triggers after start of h-blank */ CPU.NextEvent = Settings.HBlankStart; CPU.WhichEvent = HBLANK_START_EVENT; } @@ -113,7 +113,7 @@ static void S9xSetSuperFX(uint8_t Byte, uint16_t Address) if ((old_fill_ram ^ Byte) & FLG_G) { Memory.FillRAM [Address] = Byte; - if (Byte & FLG_G) // Go flag has been changed + if (Byte & FLG_G) /* Go flag has been changed */ S9xSuperFXExec(); else FxFlushCache(); @@ -148,7 +148,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) { switch (Address) { - case 0x2100: // Brightness and screen blank bit + case 0x2100: /* Brightness and screen blank bit */ if (Byte != Memory.FillRAM [0x2100]) { FLUSH_REDRAW(); @@ -166,7 +166,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) } } break; - case 0x2101: // Sprite (OBJ) tile address + case 0x2101: /* Sprite (OBJ) tile address */ if (Byte != Memory.FillRAM [0x2101]) { FLUSH_REDRAW(); @@ -176,7 +176,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) IPPU.OBJChanged = true; } break; - case 0x2102: // Sprite write address (low) + case 0x2102: /* Sprite write address (low) */ PPU.OAMAddr = ((Memory.FillRAM[0x2103] & 1) << 8) | Byte; PPU.OAMFlip = 2; PPU.SavedOAMAddr = PPU.OAMAddr; @@ -186,7 +186,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) IPPU.OBJChanged = true; } break; - case 0x2103: // Sprite register write address (high), sprite priority rotation bit. + case 0x2103: /* Sprite register write address (high), sprite priority rotation bit. */ PPU.OAMAddr = ((Byte & 1) << 8) | Memory.FillRAM[0x2102]; PPU.OAMPriorityRotation = (Byte & 0x80) ? 1 : 0; @@ -209,10 +209,10 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.OAMFlip = 0; PPU.SavedOAMAddr = PPU.OAMAddr; break; - case 0x2104: // Sprite register write + case 0x2104: /* Sprite register write */ REGISTER_2104(Byte); break; - case 0x2105: // Screen mode (0 - 7), background tile sizes and background 3 priority + case 0x2105: /* Screen mode (0 - 7), background tile sizes and background 3 priority */ if (Byte != Memory.FillRAM [0x2105]) { FLUSH_REDRAW(); @@ -221,13 +221,13 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.BG[2].BGSize = (Byte >> 6) & 1; PPU.BG[3].BGSize = (Byte >> 7) & 1; PPU.BGMode = Byte & 7; - // BJ: BG3Priority only takes effect if BGMode==1 and the bit is set + /* BJ: BG3Priority only takes effect if BGMode==1 and the bit is set */ PPU.BG3Priority = ((Byte & 0x0f) == 0x09); if (PPU.BGMode == 5 || PPU.BGMode == 6) IPPU.Interlace = (bool) (Memory.FillRAM[0x2133] & 1); } break; - case 0x2106: // Mosaic pixel size and enable + case 0x2106: /* Mosaic pixel size and enable */ if (Byte != Memory.FillRAM [0x2106]) { FLUSH_REDRAW(); @@ -238,10 +238,10 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.BGMosaic [3] = (Byte & 8) && PPU.Mosaic > 1; } break; - case 0x2107: // [BG0SC] - case 0x2108: // [BG1SC] - case 0x2109: // [BG2SC] - case 0x210A: // [BG3SC] + case 0x2107: /* [BG0SC] */ + case 0x2108: /* [BG1SC] */ + case 0x2109: /* [BG2SC] */ + case 0x210A: /* [BG3SC] */ if (Byte != Memory.FillRAM [Address]) { FLUSH_REDRAW(); @@ -249,7 +249,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.BG[Address - 0x2107].SCBase = (Byte & 0x7c) << 8; } break; - case 0x210B: // [BG01NBA] + case 0x210B: /* [BG01NBA] */ if (Byte != Memory.FillRAM [0x210b]) { FLUSH_REDRAW(); @@ -257,7 +257,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.BG[1].NameBase = ((Byte >> 4) & 7) << 12; } break; - case 0x210C: // [BG23NBA] + case 0x210C: /* [BG23NBA] */ if (Byte != Memory.FillRAM [0x210c]) { FLUSH_REDRAW(); @@ -297,7 +297,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.BG[3].VOffset = (Byte << 8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; break; - case 0x2115: // VRAM byte/word access flag and increment + case 0x2115: /* VRAM byte/word access flag and increment */ PPU.VMA.High = (bool) (Byte & 0x80); switch (Byte & 3) { @@ -324,26 +324,25 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) else PPU.VMA.FullGraphicCount = 0; break; - case 0x2116: // VRAM read/write address (low) + case 0x2116: /* VRAM read/write address (low) */ PPU.VMA.Address &= 0xFF00; PPU.VMA.Address |= Byte; IPPU.FirstVRAMRead = true; break; - case 0x2117: // VRAM read/write address (high) + case 0x2117: /* VRAM read/write address (high) */ PPU.VMA.Address &= 0x00FF; PPU.VMA.Address |= Byte << 8; IPPU.FirstVRAMRead = true; break; - case 0x2118: - // VRAM write data (low) + case 0x2118: /* VRAM write data (low) */ IPPU.FirstVRAMRead = true; REGISTER_2118(Byte); break; - case 0x2119: // VRAM write data (high) + case 0x2119: /* VRAM write data (high) */ IPPU.FirstVRAMRead = true; REGISTER_2119(Byte); break; - case 0x211a: // Mode 7 outside rotation area display mode and flipping + case 0x211a: /* Mode 7 outside rotation area display mode and flipping */ if (Byte != Memory.FillRAM [0x211a]) { FLUSH_REDRAW(); @@ -354,27 +353,27 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.Mode7HFlip = (bool) (Byte & 1); } break; - case 0x211b: // Mode 7 matrix A (low & high) + case 0x211b: /* Mode 7 matrix A (low & high) */ PPU.MatrixA = ((PPU.MatrixA >> 8) & 0xff) | (Byte << 8); PPU.Need16x8Multiply = true; break; - case 0x211c: // Mode 7 matrix B (low & high) + case 0x211c: /* Mode 7 matrix B (low & high) */ PPU.MatrixB = ((PPU.MatrixB >> 8) & 0xff) | (Byte << 8); PPU.Need16x8Multiply = true; break; - case 0x211d: // Mode 7 matrix C (low & high) + case 0x211d: /* Mode 7 matrix C (low & high) */ PPU.MatrixC = ((PPU.MatrixC >> 8) & 0xff) | (Byte << 8); break; - case 0x211e: // Mode 7 matrix D (low & high) + case 0x211e: /* Mode 7 matrix D (low & high) */ PPU.MatrixD = ((PPU.MatrixD >> 8) & 0xff) | (Byte << 8); break; - case 0x211f: // Mode 7 centre of rotation X (low & high) + case 0x211f: /* Mode 7 centre of rotation X (low & high) */ PPU.CentreX = ((PPU.CentreX >> 8) & 0xff) | (Byte << 8); break; - case 0x2120: // Mode 7 centre of rotation Y (low & high) + case 0x2120: /* Mode 7 centre of rotation Y (low & high) */ PPU.CentreY = ((PPU.CentreY >> 8) & 0xff) | (Byte << 8); break; - case 0x2121: // CG-RAM address + case 0x2121: /* CG-RAM address */ PPU.CGFLIP = false; PPU.CGFLIPRead = false; PPU.CGADD = Byte; @@ -382,7 +381,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) case 0x2122: REGISTER_2122(Byte); break; - case 0x2123: // Window 1 and 2 enable for backgrounds 1 and 2 + case 0x2123: /* Window 1 and 2 enable for backgrounds 1 and 2 */ if (Byte != Memory.FillRAM [0x2123]) { FLUSH_REDRAW(); @@ -397,7 +396,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x2124: // Window 1 and 2 enable for backgrounds 3 and 4 + case 0x2124: /* Window 1 and 2 enable for backgrounds 3 and 4 */ if (Byte != Memory.FillRAM [0x2124]) { FLUSH_REDRAW(); @@ -412,7 +411,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x2125: // Window 1 and 2 enable for objects and colour window + case 0x2125: /* Window 1 and 2 enable for objects and colour window */ if (Byte != Memory.FillRAM [0x2125]) { FLUSH_REDRAW(); @@ -427,7 +426,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x2126: // Window 1 left position + case 0x2126: /* Window 1 left position */ if (Byte != Memory.FillRAM [0x2126]) { FLUSH_REDRAW(); @@ -435,7 +434,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x2127: // Window 1 right position + case 0x2127: /* Window 1 right position */ if (Byte != Memory.FillRAM [0x2127]) { FLUSH_REDRAW(); @@ -443,7 +442,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x2128: // Window 2 left position + case 0x2128: /* Window 2 left position */ if (Byte != Memory.FillRAM [0x2128]) { FLUSH_REDRAW(); @@ -451,7 +450,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x2129: // Window 2 right position + case 0x2129: /* Window 2 right position */ if (Byte != Memory.FillRAM [0x2129]) { FLUSH_REDRAW(); @@ -459,7 +458,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x212a: // Windows 1 & 2 overlap logic for backgrounds 1 - 4 + case 0x212a: /* Windows 1 & 2 overlap logic for backgrounds 1 - 4 */ if (Byte != Memory.FillRAM [0x212a]) { FLUSH_REDRAW(); @@ -470,7 +469,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x212b: // Windows 1 & 2 overlap logic for objects and colour window + case 0x212b: /* Windows 1 & 2 overlap logic for objects and colour window */ if (Byte != Memory.FillRAM [0x212b]) { FLUSH_REDRAW(); @@ -479,7 +478,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.RecomputeClipWindows = true; } break; - case 0x212c: // Main screen designation (backgrounds 1 - 4 and objects) + case 0x212c: /* Main screen designation (backgrounds 1 - 4 and objects) */ if (Byte != Memory.FillRAM [0x212c]) { FLUSH_REDRAW(); @@ -488,7 +487,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) return; } break; - case 0x212d: // Sub-screen designation (backgrounds 1 - 4 and objects) + case 0x212d: /* Sub-screen designation (backgrounds 1 - 4 and objects) */ if (Byte != Memory.FillRAM [0x212d]) { FLUSH_REDRAW(); @@ -497,20 +496,20 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) return; } break; - case 0x212e: // Window mask designation for main screen ? - case 0x212f: // Window mask designation for sub-screen ? - case 0x2130: // Fixed colour addition or screen addition + case 0x212e: /* Window mask designation for main screen ? */ + case 0x212f: /* Window mask designation for sub-screen ? */ + case 0x2130: /* Fixed colour addition or screen addition */ if (Byte != Memory.FillRAM [Address]) { FLUSH_REDRAW(); PPU.RecomputeClipWindows = true; } break; - case 0x2131: // Colour addition or subtraction select + case 0x2131: /* Colour addition or subtraction select */ if (Byte != Memory.FillRAM[0x2131]) { FLUSH_REDRAW(); - // Backgrounds 1 - 4, objects and backdrop colour add/sub enable + /* Backgrounds 1 - 4, objects and backdrop colour add/sub enable */ Memory.FillRAM[0x2131] = Byte; } break; @@ -518,7 +517,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) if (Byte != Memory.FillRAM [0x2132]) { FLUSH_REDRAW(); - // Colour data for fixed colour addition/subtraction + /* Colour data for fixed colour addition/subtraction */ if (Byte & 0x80) PPU.FixedColourBlue = Byte & 0x1f; if (Byte & 0x40) @@ -527,7 +526,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) PPU.FixedColourRed = Byte & 0x1f; } break; - case 0x2133: // Screen settings + case 0x2133: /* Screen settings */ if (Byte != Memory.FillRAM [0x2133]) { if (Byte & 0x04) @@ -553,16 +552,16 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) break; case 0x2134: case 0x2135: - case 0x2136: // Matrix 16bit x 8bit multiply result (read-only) - case 0x2137: // Software latch for horizontal and vertical timers (read-only) - case 0x2138: // OAM read data (read-only) + case 0x2136: /* Matrix 16bit x 8bit multiply result (read-only) */ + case 0x2137: /* Software latch for horizontal and vertical timers (read-only) */ + case 0x2138: /* OAM read data (read-only) */ case 0x2139: - case 0x213a: // VRAM read data (read-only) - case 0x213b: // CG-RAM read data (read-only) + case 0x213a: /* VRAM read data (read-only) */ + case 0x213b: /* CG-RAM read data (read-only) */ case 0x213c: - case 0x213d: // Horizontal and vertical (low/high) read counter (read-only) - case 0x213e: // PPU status (time over and range over) - case 0x213f: // NTSC/PAL select and field (read-only) + case 0x213d: /* Horizontal and vertical (low/high) read counter (read-only) */ + case 0x213e: /* PPU status (time over and range over) */ + case 0x213f: /* NTSC/PAL select and field (read-only) */ return; case 0x2140: case 0x2141: @@ -635,7 +634,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) IAPU.WaitCounter++; #else S9xAPUWritePort(Address & 3, Byte); -#endif // #ifndef USE_BLARGG_APU +#endif /* #ifndef USE_BLARGG_APU */ break; case 0x2180: REGISTER_2180(Byte); @@ -665,7 +664,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) Memory.FillRAM [Address] = Byte; return; } - else if (Address == 0x2801 && Settings.SRTC) // Dai Kaijyu Monogatari II + else if (Address == 0x2801 && Settings.SRTC) /* Dai Kaijyu Monogatari II */ S9xSetSRTC(Byte, Address); else if (Address >= 0x3000 && Address < 0x3300) { @@ -683,8 +682,8 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address) uint8_t S9xGetPPU(uint16_t Address) { uint8_t byte; - if (Address < 0x2100) //not a real PPU reg - return OpenBus; //treat as unmapped memory returning last byte on the bus + if (Address < 0x2100) /* not a real PPU reg */ + return OpenBus; /* treat as unmapped memory returning last byte on the bus */ if (Address <= 0x2190) { switch (Address) @@ -710,7 +709,7 @@ uint8_t S9xGetPPU(uint16_t Address) return PPU.OpenBus1; case 0x2134: case 0x2135: - case 0x2136: // 16bit x 8bit multiply read result. + case 0x2136: /* 16bit x 8bit multiply read result. */ if (PPU.Need16x8Multiply) { int32_t r = (int32_t) PPU.MatrixA * (int32_t)(PPU.MatrixB >> 8); @@ -723,7 +722,7 @@ uint8_t S9xGetPPU(uint16_t Address) case 0x2137: S9xLatchCounters(0); return OpenBus; - case 0x2138: // Read OAM (sprite) control data + case 0x2138: /* Read OAM (sprite) control data */ if (PPU.OAMAddr & 0x100) { if (!(PPU.OAMFlip & 1)) @@ -756,7 +755,7 @@ uint8_t S9xGetPPU(uint16_t Address) } PPU.OAMFlip ^= 1; return (PPU.OpenBus1 = byte); - case 0x2139: // Read vram low byte + case 0x2139: /* Read vram low byte */ if (IPPU.FirstVRAMRead) byte = Memory.VRAM[(PPU.VMA.Address << 1) & 0xffff]; else if (PPU.VMA.FullGraphicCount) @@ -775,7 +774,7 @@ uint8_t S9xGetPPU(uint16_t Address) IPPU.FirstVRAMRead = false; } return (PPU.OpenBus1 = byte); - case 0x213A: // Read vram high byte + case 0x213A: /* Read vram high byte */ if (IPPU.FirstVRAMRead) byte = Memory.VRAM[((PPU.VMA.Address << 1) + 1) & 0xffff]; else if (PPU.VMA.FullGraphicCount) @@ -793,7 +792,7 @@ uint8_t S9xGetPPU(uint16_t Address) IPPU.FirstVRAMRead = false; } return (PPU.OpenBus1 = byte); - case 0x213B: // Read palette data + case 0x213B: /* Read palette data */ if (PPU.CGFLIPRead) byte = (PPU.OpenBus2 & 0x80) | ((PPU.CGDATA[PPU.CGADD++] >> 8) & 0x7f); else @@ -801,25 +800,25 @@ uint8_t S9xGetPPU(uint16_t Address) PPU.CGFLIPRead = !PPU.CGFLIPRead; return (PPU.OpenBus2 = byte); - case 0x213C: // Horizontal counter value 0-339 + case 0x213C: /* Horizontal counter value 0-339 */ if (PPU.HBeamFlip) byte = (PPU.OpenBus2 & 0xfe) | ((PPU.HBeamPosLatched >> 8) & 0x01); else byte = (uint8_t)PPU.HBeamPosLatched; PPU.HBeamFlip ^= 1; return (PPU.OpenBus2 = byte); - case 0x213D: // Vertical counter value 0-262 + case 0x213D: /* Vertical counter value 0-262 */ if (PPU.VBeamFlip) byte = (PPU.OpenBus2 & 0xfe) | ((PPU.VBeamPosLatched >> 8) & 0x01); else byte = (uint8_t)PPU.VBeamPosLatched; PPU.VBeamFlip ^= 1; return (PPU.OpenBus2 = byte); - case 0x213E: // PPU time and range over flags + case 0x213E: /* PPU time and range over flags */ FLUSH_REDRAW(); byte = (PPU.OpenBus1 & 0x10) | PPU.RangeTimeOver | Model->_5C77; return (PPU.OpenBus1 = byte); - case 0x213F: // NTSC/PAL and which field flags + case 0x213F: /* NTSC/PAL and which field flags */ PPU.VBeamFlip = PPU.HBeamFlip = 0; byte = (PPU.OpenBus2 & 0x20) | (Memory.FillRAM[0x213f] & 0xc0) | (Settings.PAL ? 0x10 : 0) | Model->_5C78; Memory.FillRAM[0x213f] &= ~0x40; @@ -917,8 +916,8 @@ uint8_t S9xGetPPU(uint16_t Address) return Memory.FillRAM[Address]; #else return S9xAPUReadPort(Address & 3); -#endif //#ifndef USE_BLARGG_APU - case 0x2180: // Read WRAM +#endif /* #ifndef USE_BLARGG_APU */ + case 0x2180: /* Read WRAM */ byte = Memory.RAM [PPU.WRAM++]; PPU.WRAM &= 0x1FFFF; return byte; @@ -980,7 +979,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) CPU.Cycles += ONE_CYCLE; switch (Address) { - case 0x4016: // S9xReset reading of old-style joypads + case 0x4016: /* S9xReset reading of old-style joypads */ if ((byte & 1) && !(Memory.FillRAM [Address] & 1)) { PPU.Joypad1ButtonReadPos = 0; @@ -997,7 +996,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) else switch (Address) { - case 0x4200: // NMI, V & H IRQ and joypad reading enable flags + case 0x4200: /* NMI, V & H IRQ and joypad reading enable flags */ if (byte & 0x20) { if (!PPU.VTimerEnabled) @@ -1022,8 +1021,8 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) } else { - // No need to check for HTimer being disabled as the scanline - // event trigger code won't trigger an H-IRQ unless its enabled. + /* No need to check for HTimer being disabled as the scanline + event trigger code won't trigger an H-IRQ unless its enabled. */ PPU.HTimerEnabled = false; PPU.HTimerPosition = Settings.H_Max + 1; } @@ -1033,10 +1032,10 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) if ((byte & 0x80) && !(Memory.FillRAM [0x4200] & 0x80) && CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE && - // NMI can trigger during VBlank as long as NMI_read ($4210) wasn't cleared. - // Panic Bomberman clears the NMI pending flag @ scanline 230 before enabling - // NMIs again. The NMI routine crashes the CPU if it is called without the NMI - // pending flag being set... + /* NMI can trigger during VBlank as long as NMI_read ($4210) wasn't cleared. */ + /* Panic Bomberman clears the NMI pending flag @ scanline 230 before enabling + NMIs again. The NMI routine crashes the CPU if it is called without the NMI + pending flag being set... */ (Memory.FillRAM [0x4210] & 0x80) && !CPU.NMIActive) { @@ -1050,14 +1049,14 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) S9xLatchCounters(1); Memory.FillRAM[0x4201] = Memory.FillRAM[0x4213] = byte; break; - case 0x4202: // Multiplier (for multiply) + case 0x4202: /* Multiplier (for multiply) */ break; - case 0x4203: // Multiplicand + case 0x4203: /* Multiplicand */ { uint32_t res = Memory.FillRAM[0x4202] * byte; #if defined FAST_LSB_WORD_ACCESS || defined FAST_ALIGNED_LSB_WORD_ACCESS - // assume malloc'd memory is 2-byte aligned + /* assume malloc'd memory is 2-byte aligned */ * ((uint16_t*) &Memory.FillRAM[0x4216]) = res; #else Memory.FillRAM[0x4216] = (uint8_t) res; @@ -1066,12 +1065,12 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) break; } case 0x4204: - case 0x4205: // Low and high muliplier (for divide) + case 0x4205: /* Low and high muliplier (for divide) */ break; case 0x4206: { #if defined FAST_LSB_WORD_ACCESS || defined FAST_ALIGNED_LSB_WORD_ACCESS - // assume malloc'd memory is 2-byte aligned + /* assume malloc'd memory is 2-byte aligned */ uint16_t a = *((uint16_t*) &Memory.FillRAM[0x4204]); #else uint16_t a = Memory.FillRAM[0x4204] + (Memory.FillRAM[0x4205] << 8); @@ -1080,7 +1079,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) uint16_t rem = byte ? a % byte : a; #if defined FAST_LSB_WORD_ACCESS || defined FAST_ALIGNED_LSB_WORD_ACCESS - // assume malloc'd memory is 2-byte aligned + /* assume malloc'd memory is 2-byte aligned */ * ((uint16_t*) &Memory.FillRAM[0x4214]) = div; * ((uint16_t*) &Memory.FillRAM[0x4216]) = rem; #else @@ -1150,7 +1149,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) Memory.FillRAM[0x420c] = byte; IPPU.HDMA = byte; break; - case 0x420d: // Cycle speed 0 - 2.68Mhz, 1 - 3.58Mhz (banks 0x80 +) + case 0x420d: /* Cycle speed 0 - 2.68Mhz, 1 - 3.58Mhz (banks 0x80 +) */ if ((byte & 1) != (Memory.FillRAM [0x420d] & 1)) { if (byte & 1) @@ -1162,20 +1161,20 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) } break; case 0x420e: - case 0x420f: // --->>> Unknown + case 0x420f: /* --->>> Unknown */ break; - case 0x4210: // NMI ocurred flag (reset on read or write) + case 0x4210: /* NMI ocurred flag (reset on read or write) */ Memory.FillRAM[0x4210] = Model->_5A22; return; - case 0x4211: // IRQ ocurred flag (reset on read or write) + case 0x4211: /* IRQ ocurred flag (reset on read or write) */ CLEAR_IRQ_SOURCE(PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE); break; - case 0x4212: // v-blank, h-blank and joypad being scanned flags (read-only) - case 0x4213: // I/O Port (read-only) + case 0x4212: /* v-blank, h-blank and joypad being scanned flags (read-only) */ + case 0x4213: /* I/O Port (read-only) */ case 0x4214: - case 0x4215: // Quotent of divide (read-only) + case 0x4215: /* Quotent of divide (read-only) */ case 0x4216: - case 0x4217: // Multiply product (read-only) + case 0x4217: /* Multiply product (read-only) */ case 0x4218: case 0x4219: case 0x421a: @@ -1183,7 +1182,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) case 0x421c: case 0x421d: case 0x421e: - case 0x421f: // Joypad values (read-only) + case 0x421f: /* Joypad values (read-only) */ return; case 0x4300: case 0x4310: @@ -1353,7 +1352,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address) case 0x4804: case 0x4805: case 0x4806: - case 0x4807: //These registers are used by both the S-DD1 and the SPC7110 + case 0x4807: /* These registers are used by both the S-DD1 and the SPC7110 */ if (Settings.SPC7110) S9xSetSPC7110(byte, Address); else @@ -1424,7 +1423,7 @@ uint8_t S9xGetCPU(uint16_t Address) if (Memory.FillRAM [0x4016] & 1) return 0; - if (PPU.Joypad1ButtonReadPos >= 16) // Joypad 1 is enabled + if (PPU.Joypad1ButtonReadPos >= 16) /* Joypad 1 is enabled */ return 1; return (IPPU.Joypads[0] >> (PPU.Joypad1ButtonReadPos++ ^ 15)) & 1; @@ -1433,7 +1432,7 @@ uint8_t S9xGetCPU(uint16_t Address) { if (Memory.FillRAM [0x4016] & 1) { - if (IPPU.Controller == SNES_MULTIPLAYER5) // MultiPlayer5 adaptor is only allowed to be plugged into port 2 + if (IPPU.Controller == SNES_MULTIPLAYER5) /* MultiPlayer5 adaptor is only allowed to be plugged into port 2 */ return 2; return 0; } @@ -1462,7 +1461,7 @@ uint8_t S9xGetCPU(uint16_t Address) return rv; } - if (PPU.Joypad2ButtonReadPos >= 16) // Joypad 2 is enabled + if (PPU.Joypad2ButtonReadPos >= 16) /* Joypad 2 is enabled */ return 1; return (IPPU.Joypads[1] >> (PPU.Joypad2ButtonReadPos++ ^ 15)) & 1; @@ -1494,21 +1493,21 @@ uint8_t S9xGetCPU(uint16_t Address) case 0x4210: CPU.WaitAddress = CPU.PCAtOpcodeStart; byte = Memory.FillRAM[0x4210]; - Memory.FillRAM[0x4210] = Model->_5A22; //SNEeSe returns 2 for 5A22 version. + Memory.FillRAM[0x4210] = Model->_5A22; /* SNEeSe returns 2 for 5A22 version. */ return (byte & 0x80) | (OpenBus & 0x70) | Model->_5A22; case 0x4211: byte = (CPU.IRQActive & (PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE)) ? 0x80 : 0; CLEAR_IRQ_SOURCE(PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE); byte |= OpenBus & 0x7f; return byte; - case 0x4212: // V-blank, h-blank and joypads being read flags (read-only) + case 0x4212: /* V-blank, h-blank and joypads being read flags (read-only) */ CPU.WaitAddress = CPU.PCAtOpcodeStart; return REGISTER_4212() | (OpenBus & 0x3E); - case 0x4213: // I/O port input - returns 0 wherever $4201 is 0, and 1 elsewhere unless something else pulls it down (i.e. a gun) + case 0x4213: /* I/O port input - returns 0 wherever $4201 is 0, and 1 elsewhere unless something else pulls it down (i.e. a gun) */ case 0x4214: - case 0x4215: // Quotient of divide result + case 0x4215: /* Quotient of divide result */ case 0x4216: - case 0x4217: // Multiplcation result (for multiply) or remainder of divison. + case 0x4217: /* Multiplcation result (for multiply) or remainder of divison. */ case 0x4218: case 0x4219: case 0x421a: @@ -1516,7 +1515,7 @@ uint8_t S9xGetCPU(uint16_t Address) case 0x421c: case 0x421d: case 0x421e: - case 0x421f: // Joypads 1-4 button and direction state. + case 0x421f: /* Joypads 1-4 button and direction state. */ return Memory.FillRAM [Address]; case 0x4300: case 0x4310: @@ -1808,14 +1807,14 @@ void S9xResetPPU() { if (!Settings.SuperFX) memset(&Memory.FillRAM [c], c >> 8, 0x100); - else if ((uint32_t) c < 0x3000 || (uint32_t) c >= 0x3300) // Don't overwrite SFX pvRegisters at 0x3000-0x32FF, they were set in FxReset. + else if ((uint32_t) c < 0x3000 || (uint32_t) c >= 0x3300) /* Don't overwrite SFX pvRegisters at 0x3000-0x32FF, they were set in FxReset. */ memset(&Memory.FillRAM [c], c >> 8, 0x100); } memset(&Memory.FillRAM [0x2100], 0, 0x100); memset(&Memory.FillRAM [0x4200], 0, 0x100); memset(&Memory.FillRAM [0x4000], 0, 0x100); - // For BS Suttehakkun 2... + /* For BS Suttehakkun 2... */ memset(&Memory.FillRAM [0x1000], 0, 0x1000); Memory.FillRAM[0x4201] = Memory.FillRAM[0x4213] = 0xFF; @@ -1832,7 +1831,7 @@ void S9xSoftResetPPU() memset(&Memory.FillRAM [0x2100], 0, 0x100); memset(&Memory.FillRAM [0x4200], 0, 0x100); memset(&Memory.FillRAM [0x4000], 0, 0x100); - // For BS Suttehakkun 2... + /* For BS Suttehakkun 2... */ memset(&Memory.FillRAM [0x1000], 0, 0x1000); Memory.FillRAM[0x4201] = Memory.FillRAM[0x4213] = 0xFF; @@ -2006,7 +2005,7 @@ void S9xUpdateJustifiers() { Memory.FillRAM [0x213F] = Model->_5C78; - if (Settings.SecondJustifier) //process latch as Justifier 2 + if (Settings.SecondJustifier) /* process latch as Justifier 2 */ { if (IPPU.Controller == SNES_JUSTIFIER_2) { @@ -2023,7 +2022,7 @@ void S9xUpdateJustifiers() { Memory.FillRAM [0x213F] = Model->_5C78; - if (IPPU.Controller == SNES_JUSTIFIER) //emulate player 1. + if (IPPU.Controller == SNES_JUSTIFIER) /* emulate player 1. */ { if (!offscreen) { @@ -2034,7 +2033,7 @@ void S9xUpdateJustifiers() } } - if (!offscreen) //needs restructure + if (!offscreen) /* needs restructure */ { if ((!last_p1 && IPPU.Controller == SNES_JUSTIFIER) || (last_p1 && IPPU.Controller == SNES_JUSTIFIER_2)) { @@ -2069,11 +2068,11 @@ void S9xUpdateJoypads() if (IPPU.Joypads [i]) IPPU.Joypads [i] |= 0xffff0000; - if (Settings.MouseMaster) // Read mouse position if enabled + if (Settings.MouseMaster) /* Read mouse position if enabled */ for (i = 0; i < 2; i++) S9xProcessMouse(i); - if (Settings.SuperScopeMaster) // Read SuperScope if enabled + if (Settings.SuperScopeMaster) /* Read SuperScope if enabled */ ProcessSuperScope(); if (Memory.FillRAM [0x4200] & 1) @@ -2129,7 +2128,7 @@ void S9xSuperFXExec() FxEmulate((Memory.FillRAM [0x3000 + GSU_CLSR] & 1) ? 700 : 350); int32_t GSUStatus = Memory.FillRAM [0x3000 + GSU_SFR] | (Memory.FillRAM [0x3000 + GSU_SFR + 1] << 8); if ((GSUStatus & (FLG_G | FLG_IRQ)) == FLG_IRQ) - S9xSetIRQ(GSU_IRQ_SOURCE); // Trigger a GSU IRQ. + S9xSetIRQ(GSU_IRQ_SOURCE); /* Trigger a GSU IRQ. */ } } } |