aboutsummaryrefslogtreecommitdiff
path: root/source/apumem.h
blob: f39ff926f1d349d4b3f3b1350c907a26e6fefc1b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
#include "../copyright"

#ifndef _apumemory_h_
#define _apumemory_h_

#include <retro_inline.h>

extern uint8_t W4;
extern uint8_t APUROM[64];

static INLINE uint8_t S9xAPUGetByteZ(uint8_t Address)
{
   if (Address >= 0xf0 && IAPU.DirectPage == IAPU.RAM)
   {
      if (Address >= 0xf4 && Address <= 0xf7)
      {
         IAPU.WaitAddress2 = IAPU.WaitAddress1;
         IAPU.WaitAddress1 = IAPU.PC;
         return IAPU.RAM [Address];
      }
      if (Address >= 0xfd)
      {
         uint8_t t = IAPU.RAM [Address];
         IAPU.WaitAddress2 = IAPU.WaitAddress1;
         IAPU.WaitAddress1 = IAPU.PC;
         IAPU.RAM [Address] = 0;
         return t;
      }
      else if (Address == 0xf3)
         return S9xGetAPUDSP();

      return IAPU.RAM [Address];
   }
   return IAPU.DirectPage [Address];
}

static INLINE void S9xAPUSetByteZ(uint8_t byte, uint8_t Address)
{
   if (Address >= 0xf0 && IAPU.DirectPage == IAPU.RAM)
   {
      if (Address == 0xf3)
         S9xSetAPUDSP(byte);
      else if (Address >= 0xf4 && Address <= 0xf7)
         APU.OutPorts [Address - 0xf4] = byte;
      else if (Address == 0xf1)
         S9xSetAPUControl(byte);
      else if (Address < 0xfd)
      {
         IAPU.RAM [Address] = byte;
         if (Address >= 0xfa)
         {
            if (byte == 0)
               APU.TimerTarget [Address - 0xfa] = 0x100;
            else
               APU.TimerTarget [Address - 0xfa] = byte;
         }
      }
   }
   else
      IAPU.DirectPage [Address] = byte;
}

static INLINE uint8_t S9xAPUGetByte(uint32_t Address)
{
   bool zero;
   uint8_t t;

   Address &= 0xffff;

   if (Address == 0xf3)
      return S9xGetAPUDSP();

   zero = (Address >= 0xfd && Address <= 0xff);
   t    = IAPU.RAM [Address];

   if (zero || (Address >= 0xf4 && Address <= 0xf7))
   {
      IAPU.WaitAddress2 = IAPU.WaitAddress1;
      IAPU.WaitAddress1 = IAPU.PC;
   }

   if(zero)
      IAPU.RAM [Address] = 0;

   return t;
}

static INLINE void S9xAPUSetByte(uint8_t byte, uint32_t Address)
{
   Address &= 0xffff;

   if (Address <= 0xff && Address >= 0xf0)
   {
      if (Address == 0xf3)
         S9xSetAPUDSP(byte);
      else if (Address >= 0xf4 && Address <= 0xf7)
         APU.OutPorts [Address - 0xf4] = byte;
      else if (Address == 0xf1)
         S9xSetAPUControl(byte);
      else if (Address < 0xfd)
      {
         IAPU.RAM [Address] = byte;
         if (Address >= 0xfa)
         {
            if (byte == 0)
               APU.TimerTarget [Address - 0xfa] = 0x100;
            else
               APU.TimerTarget [Address - 0xfa] = byte;
         }
      }
   }
   else
   {
      if (Address < 0xffc0)
         IAPU.RAM [Address] = byte;
      else
      {
         APU.ExtraRAM [Address - 0xffc0] = byte;
         if (!APU.ShowROM)
            IAPU.RAM [Address] = byte;
      }
   }
}
#endif