aboutsummaryrefslogtreecommitdiff
path: root/source
diff options
context:
space:
mode:
authorJoão Silva2017-08-16 04:20:50 +0100
committerJoão Silva2017-08-16 04:20:50 +0100
commitb3711dfa5041d08490a8603fe221f267c0da290a (patch)
treec0a7c48d53a52641d6451aef386b7c2b73c0752a /source
parentc66c309a433f0e8bf9733177e18aa5c81e76cd5c (diff)
downloadsnesemu-b3711dfa5041d08490a8603fe221f267c0da290a.tar.gz
snesemu-b3711dfa5041d08490a8603fe221f267c0da290a.tar.bz2
snesemu-b3711dfa5041d08490a8603fe221f267c0da290a.zip
snes9x2010 Lagfix port and comment changes.
Diffstat (limited to 'source')
-rw-r--r--source/cpuexec.c416
-rw-r--r--source/gfx.c3
-rw-r--r--source/globals.c68
-rw-r--r--source/memmap.c389
-rw-r--r--source/ppu.c227
-rw-r--r--source/seta010.c156
-rw-r--r--source/seta011.c28
-rw-r--r--source/seta018.c32
-rw-r--r--source/snes9x.h4
-rw-r--r--source/soundux.c34
-rw-r--r--source/spc700.c420
-rw-r--r--source/spc7110.c240
-rw-r--r--source/spc7110dec.c16
-rw-r--r--source/srtc.c48
14 files changed, 1087 insertions, 994 deletions
diff --git a/source/cpuexec.c b/source/cpuexec.c
index e031483..2bbf90a 100644
--- a/source/cpuexec.c
+++ b/source/cpuexec.c
@@ -46,248 +46,348 @@ void S9xMainLoop()
void S9xMainLoop_SA1_SFX()
{
- for (;;)
+#ifdef LAGFIX
+ do
{
- APU_EXECUTE();
- if (CPU.Flags)
+#endif
+ do
{
- if (CPU.Flags & NMI_FLAG)
+ APU_EXECUTE();
+ if (CPU.Flags)
{
- if (--CPU.NMICycleCount == 0)
+ if (CPU.Flags & NMI_FLAG)
{
- CPU.Flags &= ~NMI_FLAG;
- if (CPU.WaitingForInterrupt)
+ if (--CPU.NMICycleCount == 0)
{
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
+ CPU.Flags &= ~NMI_FLAG;
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ S9xOpcode_NMI();
}
- S9xOpcode_NMI();
}
- }
- if (CPU.Flags & IRQ_PENDING_FLAG)
- {
- if (CPU.IRQCycleCount == 0)
+ if (CPU.Flags & IRQ_PENDING_FLAG)
{
- if (CPU.WaitingForInterrupt)
- {
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
- }
- if (CPU.IRQActive && !Settings.DisableIRQ)
+ if (CPU.IRQCycleCount == 0)
{
- if (!CheckFlag(IRQ))
- S9xOpcode_IRQ();
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ if (CPU.IRQActive && !Settings.DisableIRQ)
+ {
+ if (!CheckFlag(IRQ))
+ S9xOpcode_IRQ();
+ }
+ else
+ CPU.Flags &= ~IRQ_PENDING_FLAG;
}
- else
- CPU.Flags &= ~IRQ_PENDING_FLAG;
+ else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
+ CPU.IRQCycleCount = 1;
}
- else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
- CPU.IRQCycleCount = 1;
+ if (CPU.Flags & SCAN_KEYS_FLAG)
+ break;
}
- if (CPU.Flags & SCAN_KEYS_FLAG)
- break;
- }
- CPU.PCAtOpcodeStart = CPU.PC;
- CPU.Cycles += CPU.MemSpeed;
- (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
+ CPU.PCAtOpcodeStart = CPU.PC;
+ CPU.Cycles += CPU.MemSpeed;
+ (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
- if (SA1.Executing)
- S9xSA1MainLoop();
- DO_HBLANK_CHECK_SFX();
- }
+ if (SA1.Executing)
+ S9xSA1MainLoop();
+ DO_HBLANK_CHECK_SFX();
+
+#ifdef LAGFIX
+ if(finishedFrame)
+ break;
+#endif
+ } while(true);
- ICPU.Registers.PC = CPU.PC - CPU.PCBase;
- S9xPackStatus();
+ ICPU.Registers.PC = CPU.PC - CPU.PCBase;
+#ifndef USE_BLARGG_APU
+ IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
+#endif
+
+#ifdef LAGFIX
+ if(!finishedFrame)
+ {
+#endif
+ S9xPackStatus();
#ifndef USE_BLARGG_APU
- IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
- S9xAPUPackStatus();
+ S9xAPUPackStatus();
+#endif
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
+#ifdef LAGFIX
+ }
+ else
+ {
+ finishedFrame = false;
+ break;
+ }
+ } while(!finishedFrame);
#endif
- CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xMainLoop_SA1_NoSFX()
{
- for (;;)
+#ifdef LAGFIX
+ do
{
- APU_EXECUTE();
- if (CPU.Flags)
+#endif
+ do
{
- if (CPU.Flags & NMI_FLAG)
+ APU_EXECUTE();
+ if (CPU.Flags)
{
- if (--CPU.NMICycleCount == 0)
+ if (CPU.Flags & NMI_FLAG)
{
- CPU.Flags &= ~NMI_FLAG;
- if (CPU.WaitingForInterrupt)
+ if (--CPU.NMICycleCount == 0)
{
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
+ CPU.Flags &= ~NMI_FLAG;
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ S9xOpcode_NMI();
}
- S9xOpcode_NMI();
}
- }
- if (CPU.Flags & IRQ_PENDING_FLAG)
- {
- if (CPU.IRQCycleCount == 0)
+ if (CPU.Flags & IRQ_PENDING_FLAG)
{
- if (CPU.WaitingForInterrupt)
- {
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
- }
- if (CPU.IRQActive && !Settings.DisableIRQ)
+ if (CPU.IRQCycleCount == 0)
{
- if (!CheckFlag(IRQ))
- S9xOpcode_IRQ();
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ if (CPU.IRQActive && !Settings.DisableIRQ)
+ {
+ if (!CheckFlag(IRQ))
+ S9xOpcode_IRQ();
+ }
+ else
+ CPU.Flags &= ~IRQ_PENDING_FLAG;
}
- else
- CPU.Flags &= ~IRQ_PENDING_FLAG;
+ else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
+ CPU.IRQCycleCount = 1;
}
- else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
- CPU.IRQCycleCount = 1;
+ if (CPU.Flags & SCAN_KEYS_FLAG)
+ break;
}
- if (CPU.Flags & SCAN_KEYS_FLAG)
- break;
- }
- CPU.PCAtOpcodeStart = CPU.PC;
- CPU.Cycles += CPU.MemSpeed;
- (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
+ CPU.PCAtOpcodeStart = CPU.PC;
+ CPU.Cycles += CPU.MemSpeed;
+ (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
- if (SA1.Executing)
- S9xSA1MainLoop();
- DO_HBLANK_CHECK_NoSFX();
- }
+ if (SA1.Executing)
+ S9xSA1MainLoop();
+ DO_HBLANK_CHECK_NoSFX();
+
+#ifdef LAGFIX
+ if(finishedFrame)
+ break;
+#endif
+ } while(true);
+
+ ICPU.Registers.PC = CPU.PC - CPU.PCBase;
+#ifndef USE_BLARGG_APU
+ IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
+#endif
- ICPU.Registers.PC = CPU.PC - CPU.PCBase;
- S9xPackStatus();
+#ifdef LAGFIX
+ if(!finishedFrame)
+ {
+#endif
+ S9xPackStatus();
#ifndef USE_BLARGG_APU
- IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
- S9xAPUPackStatus();
+ S9xAPUPackStatus();
+#endif
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
+#ifdef LAGFIX
+ }
+ else
+ {
+ finishedFrame = false;
+ break;
+ }
+ } while(!finishedFrame);
#endif
- CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xMainLoop_NoSA1_SFX()
{
- for (;;)
+#ifdef LAGFIX
+ do
{
- APU_EXECUTE();
- if (CPU.Flags)
+#endif
+ do
{
- if (CPU.Flags & NMI_FLAG)
+ APU_EXECUTE();
+ if (CPU.Flags)
{
- if (--CPU.NMICycleCount == 0)
+ if (CPU.Flags & NMI_FLAG)
{
- CPU.Flags &= ~NMI_FLAG;
- if (CPU.WaitingForInterrupt)
+ if (--CPU.NMICycleCount == 0)
{
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
+ CPU.Flags &= ~NMI_FLAG;
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ S9xOpcode_NMI();
}
- S9xOpcode_NMI();
}
- }
- if (CPU.Flags & IRQ_PENDING_FLAG)
- {
- if (CPU.IRQCycleCount == 0)
+ if (CPU.Flags & IRQ_PENDING_FLAG)
{
- if (CPU.WaitingForInterrupt)
+ if (CPU.IRQCycleCount == 0)
{
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ if (CPU.IRQActive && !Settings.DisableIRQ)
+ {
+ if (!CheckFlag(IRQ))
+ S9xOpcode_IRQ();
+ }
+ else
+ CPU.Flags &= ~IRQ_PENDING_FLAG;
}
- if (CPU.IRQActive && !Settings.DisableIRQ)
- {
- if (!CheckFlag(IRQ))
- S9xOpcode_IRQ();
- }
- else
- CPU.Flags &= ~IRQ_PENDING_FLAG;
+ else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
+ CPU.IRQCycleCount = 1;
}
- else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
- CPU.IRQCycleCount = 1;
+ if (CPU.Flags & SCAN_KEYS_FLAG)
+ break;
}
- if (CPU.Flags & SCAN_KEYS_FLAG)
+
+ CPU.PCAtOpcodeStart = CPU.PC;
+ CPU.Cycles += CPU.MemSpeed;
+ (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
+ DO_HBLANK_CHECK_SFX();
+
+#ifdef LAGFIX
+ if(finishedFrame)
break;
- }
+#endif
+ } while(true);
- CPU.PCAtOpcodeStart = CPU.PC;
- CPU.Cycles += CPU.MemSpeed;
- (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
- DO_HBLANK_CHECK_SFX();
- }
+ ICPU.Registers.PC = CPU.PC - CPU.PCBase;
+#ifndef USE_BLARGG_APU
+ IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
+#endif
- ICPU.Registers.PC = CPU.PC - CPU.PCBase;
- S9xPackStatus();
+#ifdef LAGFIX
+ if(!finishedFrame)
+ {
+#endif
+ S9xPackStatus();
#ifndef USE_BLARGG_APU
- IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
- S9xAPUPackStatus();
+ S9xAPUPackStatus();
+#endif
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
+#ifdef LAGFIX
+ }
+ else
+ {
+ finishedFrame = false;
+ break;
+ }
+ } while(!finishedFrame);
#endif
- CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xMainLoop_NoSA1_NoSFX()
{
- for (;;)
+#ifdef LAGFIX
+ do
{
- APU_EXECUTE();
- if (CPU.Flags)
+#endif
+ do
{
- if (CPU.Flags & NMI_FLAG)
+ APU_EXECUTE();
+ if (CPU.Flags)
{
- if (--CPU.NMICycleCount == 0)
+ if (CPU.Flags & NMI_FLAG)
{
- CPU.Flags &= ~NMI_FLAG;
- if (CPU.WaitingForInterrupt)
+ if (--CPU.NMICycleCount == 0)
{
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
+ CPU.Flags &= ~NMI_FLAG;
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ S9xOpcode_NMI();
}
- S9xOpcode_NMI();
}
- }
- if (CPU.Flags & IRQ_PENDING_FLAG)
- {
- if (CPU.IRQCycleCount == 0)
+ if (CPU.Flags & IRQ_PENDING_FLAG)
{
- if (CPU.WaitingForInterrupt)
- {
- CPU.WaitingForInterrupt = false;
- CPU.PC++;
- }
- if (CPU.IRQActive && !Settings.DisableIRQ)
+ if (CPU.IRQCycleCount == 0)
{
- if (!CheckFlag(IRQ))
- S9xOpcode_IRQ();
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = false;
+ CPU.PC++;
+ }
+ if (CPU.IRQActive && !Settings.DisableIRQ)
+ {
+ if (!CheckFlag(IRQ))
+ S9xOpcode_IRQ();
+ }
+ else
+ CPU.Flags &= ~IRQ_PENDING_FLAG;
}
- else
- CPU.Flags &= ~IRQ_PENDING_FLAG;
+ else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
+ CPU.IRQCycleCount = 1;
}
- else if (--CPU.IRQCycleCount == 0 && CheckFlag(IRQ))
- CPU.IRQCycleCount = 1;
+ if (CPU.Flags & SCAN_KEYS_FLAG)
+ break;
}
- if (CPU.Flags & SCAN_KEYS_FLAG)
+
+ CPU.PCAtOpcodeStart = CPU.PC;
+ CPU.Cycles += CPU.MemSpeed;
+ (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
+ DO_HBLANK_CHECK_NoSFX();
+
+#ifdef LAGFIX
+ if(finishedFrame)
break;
- }
+#endif
+ } while(true);
- CPU.PCAtOpcodeStart = CPU.PC;
- CPU.Cycles += CPU.MemSpeed;
- (*ICPU.S9xOpcodes [*CPU.PC++].S9xOpcode)();
- DO_HBLANK_CHECK_NoSFX();
- }
+ ICPU.Registers.PC = CPU.PC - CPU.PCBase;
+#ifndef USE_BLARGG_APU
+ IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
+#endif
- ICPU.Registers.PC = CPU.PC - CPU.PCBase;
- S9xPackStatus();
+#ifdef LAGFIX
+ if(!finishedFrame)
+ {
+#endif
+ S9xPackStatus();
#ifndef USE_BLARGG_APU
- IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
- S9xAPUPackStatus();
+ S9xAPUPackStatus();
+#endif
+ CPU.Flags &= ~SCAN_KEYS_FLAG;
+#ifdef LAGFIX
+ }
+ else
+ {
+ finishedFrame = false;
+ break;
+ }
+ } while(!finishedFrame);
#endif
- CPU.Flags &= ~SCAN_KEYS_FLAG;
}
void S9xSetIRQ(uint32_t source)
diff --git a/source/gfx.c b/source/gfx.c
index 0059d63..9d077ac 100644
--- a/source/gfx.c
+++ b/source/gfx.c
@@ -474,6 +474,9 @@ void S9xEndScreenRefresh(void)
GFX.Pitch = GFX.Pitch2 = GFX.RealPitch;
GFX.PPL = GFX.PPLx2 >> 1;
+#ifdef LAGFIX
+ finishedFrame = true;
+#endif
}
S9xApplyCheats();
diff --git a/source/globals.c b/source/globals.c
index 14b8a64..f7cdb85 100644
--- a/source/globals.c
+++ b/source/globals.c
@@ -69,6 +69,10 @@ uint32_t even_low[4][16];
SCheatData Cheat;
+#ifdef LAGFIX
+bool finishedFrame = false;
+#endif
+
#ifndef USE_BLARGG_APU
SoundStatus so;
@@ -103,47 +107,47 @@ uint8_t BitShifts[8][4] =
};
uint8_t TileShifts[8][4] =
{
- {4, 4, 4, 4}, // 0
- {5, 5, 4, 0}, // 1
- {5, 5, 0, 0}, // 2
- {6, 5, 0, 0}, // 3
- {6, 4, 0, 0}, // 4
- {5, 4, 0, 0}, // 5
- {5, 0, 0, 0}, // 6
- {6, 0, 0, 0} // 7
+ {4, 4, 4, 4}, /* 0 */
+ {5, 5, 4, 0}, /* 1 */
+ {5, 5, 0, 0}, /* 2 */
+ {6, 5, 0, 0}, /* 3 */
+ {6, 4, 0, 0}, /* 4 */
+ {5, 4, 0, 0}, /* 5 */
+ {5, 0, 0, 0}, /* 6 */
+ {6, 0, 0, 0} /* 7 */
};
uint8_t PaletteShifts[8][4] =
{
- {2, 2, 2, 2}, // 0
- {4, 4, 2, 0}, // 1
- {4, 4, 0, 0}, // 2
- {0, 4, 0, 0}, // 3
- {0, 2, 0, 0}, // 4
- {4, 2, 0, 0}, // 5
- {4, 0, 0, 0}, // 6
- {0, 0, 0, 0} // 7
+ {2, 2, 2, 2}, /* 0 */
+ {4, 4, 2, 0}, /* 1 */
+ {4, 4, 0, 0}, /* 2 */
+ {0, 4, 0, 0}, /* 3 */
+ {0, 2, 0, 0}, /* 4 */
+ {4, 2, 0, 0}, /* 5 */
+ {4, 0, 0, 0}, /* 6 */
+ {0, 0, 0, 0} /* 7 */
};
uint8_t PaletteMasks[8][4] =
{
- {7, 7, 7, 7}, // 0
- {7, 7, 7, 0}, // 1
- {7, 7, 0, 0}, // 2
- {0, 7, 0, 0}, // 3
- {0, 7, 0, 0}, // 4
- {7, 7, 0, 0}, // 5
- {7, 0, 0, 0}, // 6
- {0, 0, 0, 0} // 7
+ {7, 7, 7, 7}, /* 0 */
+ {7, 7, 7, 0}, /* 1 */
+ {7, 7, 0, 0}, /* 2 */
+ {0, 7, 0, 0}, /* 3 */
+ {0, 7, 0, 0}, /* 4 */
+ {7, 7, 0, 0}, /* 5 */
+ {7, 0, 0, 0}, /* 6 */
+ {0, 0, 0, 0} /* 7 */
};
uint8_t Depths[8][4] =
{
- {TILE_2BIT, TILE_2BIT, TILE_2BIT, TILE_2BIT}, // 0
- {TILE_4BIT, TILE_4BIT, TILE_2BIT, 0}, // 1
- {TILE_4BIT, TILE_4BIT, 0, 0}, // 2
- {TILE_8BIT, TILE_4BIT, 0, 0}, // 3
- {TILE_8BIT, TILE_2BIT, 0, 0}, // 4
- {TILE_4BIT, TILE_2BIT, 0, 0}, // 5
- {TILE_4BIT, 0, 0, 0}, // 6
- {0, 0, 0, 0} // 7
+ {TILE_2BIT, TILE_2BIT, TILE_2BIT, TILE_2BIT}, /* 0 */
+ {TILE_4BIT, TILE_4BIT, TILE_2BIT, 0}, /* 1 */
+ {TILE_4BIT, TILE_4BIT, 0, 0}, /* 2 */
+ {TILE_8BIT, TILE_4BIT, 0, 0}, /* 3 */
+ {TILE_8BIT, TILE_2BIT, 0, 0}, /* 4 */
+ {TILE_4BIT, TILE_2BIT, 0, 0}, /* 5 */
+ {TILE_4BIT, 0, 0, 0}, /* 6 */
+ {0, 0, 0, 0} /* 7 */
};
uint8_t BGSizes [2] =
{
diff --git a/source/memmap.c b/source/memmap.c
index 87cfc32..6f5b726 100644
--- a/source/memmap.c
+++ b/source/memmap.c
@@ -50,7 +50,7 @@ void S9xDeinterleaveType1(int32_t TotalFileSize, uint8_t* base)
blocks [i * 2] = i + nblocks;
blocks [i * 2 + 1] = i;
}
- // DS2 DMA notes: base may or may not be 32-byte aligned
+ /* DS2 DMA notes: base may or may not be 32-byte aligned */
uint8_t* tmp = (uint8_t*) malloc(0x8000);
if (tmp)
{
@@ -61,13 +61,13 @@ void S9xDeinterleaveType1(int32_t TotalFileSize, uint8_t* base)
{
if (blocks [j] == i)
{
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(tmp, &base [blocks [j] * 0x8000], 0x8000);
- // memmove converted: Different addresses, or identical for blocks[i] == blocks[j] [Neb]
- // DS2 DMA notes: Don't do DMA at all if blocks[i] == blocks[j]
+ /* memmove converted: Different addresses, or identical for blocks[i] == blocks[j] [Neb] */
+ /* DS2 DMA notes: Don't do DMA at all if blocks[i] == blocks[j] */
memcpy(&base [blocks [j] * 0x8000],
&base [blocks [i] * 0x8000], 0x8000);
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(&base [blocks [i] * 0x8000], tmp, 0x8000);
uint8_t b = blocks [j];
blocks [j] = blocks [i];
@@ -85,17 +85,17 @@ void S9xDeinterleaveGD24(int32_t TotalFileSize, uint8_t* base)
if (TotalFileSize != 0x300000)
return;
- // DS2 DMA notes: base may or may not be 32-byte aligned
+ /* DS2 DMA notes: base may or may not be 32-byte aligned */
uint8_t* tmp = (uint8_t*) malloc(0x80000);
if (tmp)
{
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(tmp, &base[0x180000], 0x80000);
- // memmove converted: Different addresses [Neb]
+ /* memmove converted: Different addresses [Neb] */
memcpy(&base[0x180000], &base[0x200000], 0x80000);
- // memmove converted: Different addresses [Neb]
+ /* memmove converted: Different addresses [Neb] */
memcpy(&base[0x200000], &base[0x280000], 0x80000);
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(&base[0x280000], tmp, 0x80000);
free(tmp);
@@ -122,7 +122,7 @@ static int32_t ScoreHiROM(bool skip_header, int32_t romoff)
if (Memory.ROM [o + 0xd5] & 0x1)
score += 2;
- //Mode23 is SA-1
+ /* Mode23 is SA-1 */
if (Memory.ROM [o + 0xd5] == 0x23)
score -= 2;
@@ -143,7 +143,7 @@ static int32_t ScoreHiROM(bool skip_header, int32_t romoff)
if (!(Memory.ROM [o + 0xfd] & 0x80))
score -= 6;
if ((Memory.ROM [o + 0xfc] | (Memory.ROM [o + 0xfd] << 8)) > 0xFFB0)
- score -= 2; //reduced after looking at a scan by Cowering
+ score -= 2; /* reduced after looking at a scan by Cowering */
if (Memory.CalculatedSize > 1024 * 1024 * 3)
score += 4;
if ((1 << (Memory.ROM [o + 0xd7] - 7)) > 48)
@@ -166,7 +166,7 @@ static int32_t ScoreLoROM(bool skip_header, int32_t romoff)
if (!(Memory.ROM [o + 0xd5] & 0x1))
score += 3;
- //Mode23 is SA-1
+ /* Mode23 is SA-1 */
if (Memory.ROM [o + 0xd5] == 0x23)
score += 2;
@@ -186,7 +186,7 @@ static int32_t ScoreLoROM(bool skip_header, int32_t romoff)
if (!(Memory.ROM [o + 0xfd] & 0x80))
score -= 6;
if ((Memory.ROM [o + 0xfc] | (Memory.ROM [o + 0xfd] << 8)) > 0xFFB0)
- score -= 2; //reduced per Cowering suggestion
+ score -= 2; /* reduced per Cowering suggestion */
if ((1 << (Memory.ROM [o + 0xd7] - 7)) > 48)
score -= 1;
if (!AllASCII(&Memory.ROM [o + 0xb0], 6))
@@ -237,13 +237,13 @@ static char* Safe(const char* s)
/**********************************************************************************************/
bool S9xInitMemory(void)
{
- // DS2 DMA notes: These would do well to be allocated with 32 extra bytes
- // so they can be 32-byte aligned. [Neb]
+ /* DS2 DMA notes: These would do well to be allocated with 32 extra bytes
+ so they can be 32-byte aligned. [Neb] */
Memory.RAM = (uint8_t*) calloc(0x20000, 1);
Memory.SRAM = (uint8_t*) calloc(0x20000, 1);
Memory.VRAM = (uint8_t*) calloc(0x10000, 1);
Memory.BSRAM = (uint8_t*) calloc(0x80000, 1);
- // Don't bother initializing ROM, we will load a game anyway.
+ /* Don't bother initializing ROM, we will load a game anyway. */
#ifdef DS2_DMA
Memory.ROM = (uint8_t*) AlignedMalloc(MAX_ROM_SIZE + 0x200 + 0x8000, 32, &PtrAdj.ROM);
#else
@@ -265,16 +265,16 @@ bool S9xInitMemory(void)
return false;
}
- // FillRAM uses first 32K of ROM image area, otherwise space just
- // wasted. Might be read by the SuperFX code.
+ /* FillRAM uses first 32K of ROM image area, otherwise space just
+ wasted. Might be read by the SuperFX code. */
Memory.FillRAM = Memory.ROM;
- // Add 0x8000 to ROM image pointer to stop SuperFX code accessing
- // unallocated memory (can cause crash on some ports).
- Memory.ROM += 0x8000; // still 32-byte aligned
+ /* Add 0x8000 to ROM image pointer to stop SuperFX code accessing
+ unallocated memory (can cause crash on some ports). */
+ Memory.ROM += 0x8000; /* still 32-byte aligned */
SuperFX.pvRegisters = &Memory.FillRAM [0x3000];
- SuperFX.nRamBanks = 2; // Most only use 1. 1 = 64KB, 2 = 128KB = 1024Mb
+ SuperFX.nRamBanks = 2; /* Most only use 1. 1 = 64KB, 2 = 128KB = 1024Mb */
SuperFX.pvRam = Memory.SRAM;
SuperFX.nRomBanks = (2 * 1024 * 1024) / (32 * 1024);
SuperFX.pvRom = (uint8_t*) Memory.ROM;
@@ -431,10 +431,10 @@ static void CheckForIPSPatch(const char* rom_filename, bool header, int32_t* rom
}
}
- // Check if ROM image needs to be truncated
+ /* Check if ROM image needs to be truncated */
ofs = ReadInt(patch_file, 3);
if (ofs != -1 && ofs - offset < *rom_size)
- *rom_size = ofs - offset; // Need to truncate ROM image
+ *rom_size = ofs - offset; /* Need to truncate ROM image */
fclose(patch_file);
return;
@@ -461,7 +461,7 @@ static uint32_t FileLoader(uint8_t* buffer, const char* filename, int32_t maxsiz
_makepath(fname, drive, dir, name, ext);
#ifdef __WIN32__
- // memmove required: Overlapping addresses [Neb]
+ /* memmove required: Overlapping addresses [Neb] */
memmove(&ext [0], &ext[1], 4);
#endif
@@ -479,12 +479,12 @@ static uint32_t FileLoader(uint8_t* buffer, const char* filename, int32_t maxsiz
int32_t calc_size;
FileSize = fread(ptr, 1, maxsize + 0x200 - (ptr - Memory.ROM), ROMFile);
fclose(ROMFile);
- calc_size = FileSize & ~0x1FFF; // round to the lower 0x2000
+ calc_size = FileSize & ~0x1FFF; /* round to the lower 0x2000 */
if ((FileSize - calc_size == 512 && !Settings.ForceNoHeader) || Settings.ForceHeader)
{
- // memmove required: Overlapping addresses [Neb]
- // DS2 DMA notes: Can be split into 512-byte DMA blocks [Neb]
+ /* memmove required: Overlapping addresses [Neb] */
+ /* DS2 DMA notes: Can be split into 512-byte DMA blocks [Neb] */
#ifdef DS2_DMA
__dcache_writeback_all();
{
@@ -507,14 +507,14 @@ static uint32_t FileLoader(uint8_t* buffer, const char* filename, int32_t maxsiz
TotalFileSize += FileSize;
- // check for multi file roms
+ /* check for multi file roms */
if ((ptr - Memory.ROM) < (maxsize + 0x200) && (isdigit(ext [0]) && ext [1] == 0 && ext [0] < '9'))
{
more = true;
ext [0]++;
#ifdef __WIN32__
- // memmove required: Overlapping addresses [Neb]
+ /* memmove required: Overlapping addresses [Neb] */
memmove(&ext [1], &ext [0], 4);
ext [0] = '.';
#endif
@@ -525,7 +525,7 @@ static uint32_t FileLoader(uint8_t* buffer, const char* filename, int32_t maxsiz
more = true;
name [len - 1]++;
#ifdef __WIN32__
- // memmove required: Overlapping addresses [Neb]
+ /* memmove required: Overlapping addresses [Neb] */
memmove(&ext [1], &ext [0], 4);
ext [0] = '.';
#endif
@@ -597,10 +597,10 @@ again:
TotalFileSize = FileLoader(Memory.ROM, filename, MAX_ROM_SIZE);
if (!TotalFileSize)
- return false; // it ends here
+ return false; /* it ends here */
CheckForIPSPatch(filename, Memory.HeaderCount != 0, &TotalFileSize);
#endif
- //fix hacked games here.
+ /* fix hacked games here. */
if ((strncmp("HONKAKUHA IGO GOSEI", (char*)&Memory.ROM[0x7FC0], 19) == 0) && (Memory.ROM[0x7FD5] != 0x31))
{
Memory.ROM[0x7FD5] = 0x31;
@@ -608,7 +608,7 @@ again:
}
#ifndef NO_SPEEDHACKS
- // SNESAdvance speed hacks (from the speed-hacks branch of CatSFC)
+ /* SNESAdvance speed hacks (from the speed-hacks branch of CatSFC) */
if (strncmp("YOSHI'S ISLAND", (char *) &Memory.ROM[0x7FC0], 14) == 0)
{
Memory.ROM[0x0000F4] = 0x42;
@@ -674,26 +674,26 @@ again:
}
}
#else
- // memmove required: Overlapping addresses [Neb]
+ /* memmove required: Overlapping addresses [Neb] */
memmove(Memory.ROM, Memory.ROM + 512, TotalFileSize - 512);
#endif
TotalFileSize -= 512;
}
- Memory.CalculatedSize = TotalFileSize & ~0x1FFF; // round down to lower 0x2000
+ Memory.CalculatedSize = TotalFileSize & ~0x1FFF; /* round down to lower 0x2000 */
memset(Memory.ROM + Memory.CalculatedSize, 0, MAX_ROM_SIZE - Memory.CalculatedSize);
if (Memory.CalculatedSize > 0x400000 &&
- !(Memory.ROM[0x7FD5] == 0x32 && ((Memory.ROM[0x7FD6] & 0xF0) == 0x40)) && //exclude S-DD1
- !(Memory.ROM[0xFFD5] == 0x3A && ((Memory.ROM[0xFFD6] & 0xF0) == 0xF0))) //exclude SPC7110
- Memory.ExtendedFormat = YEAH; //you might be a Jumbo!
+ !(Memory.ROM[0x7FD5] == 0x32 && ((Memory.ROM[0x7FD6] & 0xF0) == 0x40)) && /* exclude S-DD1 */
+ !(Memory.ROM[0xFFD5] == 0x3A && ((Memory.ROM[0xFFD6] & 0xF0) == 0xF0))) /* exclude SPC7110 */
+ Memory.ExtendedFormat = YEAH; /* you might be a Jumbo! */
- //If both vectors are invalid, it's type 1 LoROM
+ /* If both vectors are invalid, it's type 1 LoROM */
if(Memory.ExtendedFormat == NOPE && strncmp((char *) &Memory.ROM[0], "BANDAI SFC-ADX", 14) && ((Memory.ROM[0x7ffc] | (Memory.ROM[0x7ffd] << 8)) < 0x8000) && ((Memory.ROM[0xfffc] | (Memory.ROM[0xFffd] << 8)) < 0x8000) && !Settings.ForceInterleaved)
S9xDeinterleaveType1(TotalFileSize, Memory.ROM);
- //CalculatedSize is now set, so rescore
+ /* CalculatedSize is now set, so rescore */
hi_score = ScoreHiROM(false, 0);
lo_score = ScoreLoROM(false, 0);
@@ -705,7 +705,7 @@ again:
swappedlorom = ScoreLoROM(false, 0x400000);
swappedhirom = ScoreHiROM(false, 0x400000);
- //set swapped here.
+ /* set swapped here. */
if (MAX(swappedlorom, swappedhirom) >= MAX(loromscore, hiromscore))
{
Memory.ExtendedFormat = BIGFIRST;
@@ -728,7 +728,7 @@ again:
Memory.LoROM = true;
Memory.HiROM = false;
- // Ignore map type byte if not 0x2x or 0x3x
+ /* Ignore map type byte if not 0x2x or 0x3x */
if ((RomHeader [0x7fd5] & 0xf0) == 0x20 || (RomHeader [0x7fd5] & 0xf0) == 0x30)
{
switch (RomHeader [0x7fd5] & 0xf)
@@ -759,7 +759,7 @@ again:
Memory.HiROM = true;
}
- // More
+ /* More */
if (!Settings.ForceHiROM &&
!Settings.ForceLoROM &&
!Settings.ForceInterleaved &&
@@ -973,11 +973,11 @@ void S9xDeinterleaveType2(bool reset)
ds2_DMA_wait(2);
ds2_DMA_stop(2);
#else
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(tmp, &Memory.ROM [blocks [j] * 0x10000], 0x10000);
- // memmove converted: Different addresses, or identical if blocks[i] == blocks[j] [Neb]
+ /* memmove converted: Different addresses, or identical if blocks[i] == blocks[j] [Neb] */
memcpy(&Memory.ROM [blocks [j] * 0x10000], &Memory.ROM [blocks [i] * 0x10000], 0x10000);
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(&Memory.ROM [blocks [i] * 0x10000], tmp, 0x10000);
#endif
b = blocks [j];
@@ -1055,41 +1055,41 @@ void InitROM(bool Interleaved)
ParseSNESHeader(RomHeader);
- //// Detect and initialize chips - detection codes are compatible with NSRT
+ /* Detect and initialize chips - detection codes are compatible with NSRT */
- // DSP1/2/3/4
+ /* DSP1/2/3/4 */
if (Memory.ROMType == 0x03)
{
if (Memory.ROMSpeed == 0x30)
- Settings.DSP = 4; // DSP4
+ Settings.DSP = 4; /* DSP4 */
else
- Settings.DSP = 1; // DSP1
+ Settings.DSP = 1; /* DSP1 */
}
else if (Memory.ROMType == 0x05)
{
if (Memory.ROMSpeed == 0x20)
- Settings.DSP = 2; // DSP2
+ Settings.DSP = 2; /* DSP2 */
else if (Memory.ROMSpeed == 0x30 && RomHeader[0x2a] == 0xb2)
- Settings.DSP = 3; // DSP3
+ Settings.DSP = 3; /* DSP3 */
else
- Settings.DSP = 1; // DSP1
+ Settings.DSP = 1; /* DSP1 */
}
switch (Settings.DSP)
{
- case 1: // DSP1
+ case 1: /* DSP1 */
SetDSP = &DSP1SetByte;
GetDSP = &DSP1GetByte;
break;
- case 2: // DSP2
+ case 2: /* DSP2 */
SetDSP = &DSP2SetByte;
GetDSP = &DSP2GetByte;
break;
- case 3: // DSP3
- //SetDSP = &DSP3SetByte;
- //GetDSP = &DSP3GetByte;
+ case 3: /* DSP3 */
+ /* SetDSP = &DSP3SetByte; */
+ /* GetDSP = &DSP3GetByte; */
break;
- case 4: // DSP4
+ case 4: /* DSP4 */
SetDSP = &DSP4SetByte;
GetDSP = &DSP4GetByte;
break;
@@ -1104,7 +1104,7 @@ void InitROM(bool Interleaved)
if (Memory.HiROM)
{
- // Enable S-RTC (Real Time Clock) emulation for Dai Kaijyu Monogatari 2
+ /* Enable S-RTC (Real Time Clock) emulation for Dai Kaijyu Monogatari 2 */
Settings.SRTC = ((Memory.ROMType & 0xf0) >> 4) == 5;
if (((Memory.ROMSpeed & 0x0F) == 0x0A) && ((Memory.ROMType & 0xF0) == 0xF0))
@@ -1128,14 +1128,14 @@ void InitROM(bool Interleaved)
if (Memory.ROMType == 0x25)
Settings.OBC1 = true;
- //BS-X BIOS
+ /* BS-X BIOS */
if (Memory.ROMType == 0xE5)
Settings.BS = true;
if ((Memory.ROMType & 0xf0) == 0x10)
Settings.SuperFX = !Settings.ForceNoSuperFX;
- //OBC1 hack ROM
+ /* OBC1 hack ROM */
if (strncmp(Memory.ROMName, "METAL COMBAT", 12) == 0 && Memory.ROMType == 0x13 && Memory.ROMSpeed == 0x42)
{
Settings.OBC1 = true;
@@ -1282,7 +1282,7 @@ void InitROM(bool Interleaved)
Settings.PAL = true;
else
{
- //Korea refers to South Korea, which uses NTSC
+ /* Korea refers to South Korea, which uses NTSC */
switch (Memory.ROMRegion)
{
case 13:
@@ -1399,7 +1399,7 @@ void map_index(uint32_t bank_s, uint32_t bank_e, uint32_t addr_s, uint32_t addr_
void WriteProtectROM(void)
{
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(Memory.WriteMap, Memory.Map, sizeof(Memory.Map));
int32_t c;
for (c = 0; c < 0x1000; c++)
@@ -1413,7 +1413,7 @@ void MapRAM(void)
if (Memory.LoROM && !Settings.SDD1)
{
- // Banks 70->7d and f0->fe 0x0000-0x7FFF, S-RAM
+ /* Banks 70->7d and f0->fe 0x0000-0x7FFF, S-RAM */
for (c = 0; c < 0x0f; c++)
{
for (i = 0; i < 8; i++)
@@ -1425,7 +1425,7 @@ void MapRAM(void)
}
if(Memory.CalculatedSize <= 0x200000)
{
- // Banks 70->7d 0x8000-0xffff S-RAM
+ /* Banks 70->7d 0x8000-0xffff S-RAM */
for (c = 0; c < 0x0e; c++)
{
for(i = 8; i < 16; i++)
@@ -1439,7 +1439,7 @@ void MapRAM(void)
}
else if(Memory.LoROM && Settings.SDD1)
{
- // Banks 70->7d 0x0000-0x7FFF, S-RAM
+ /* Banks 70->7d 0x0000-0x7FFF, S-RAM */
for (c = 0; c < 0x0f; c++)
{
for (i = 0; i < 8; i++)
@@ -1450,7 +1450,7 @@ void MapRAM(void)
}
}
}
- // Banks 7e->7f, RAM
+ /* Banks 7e->7f, RAM */
for (c = 0; c < 16; c++)
{
Memory.Map [c + 0x7e0] = Memory.RAM;
@@ -1467,7 +1467,7 @@ void MapExtraRAM(void)
{
int32_t c;
- // Banks 7e->7f, RAM
+ /* Banks 7e->7f, RAM */
for (c = 0; c < 16; c++)
{
Memory.Map [c + 0x7e0] = Memory.RAM;
@@ -1478,7 +1478,7 @@ void MapExtraRAM(void)
Memory.BlockIsROM [c + 0x7f0] = false;
}
- // Banks 70->73, S-RAM
+ /* Banks 70->73, S-RAM */
for (c = 0; c < 16; c++)
{
Memory.Map [c + 0x700] = Memory.SRAM;
@@ -1502,7 +1502,7 @@ void LoROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -1540,7 +1540,7 @@ void LoROMMap(void)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 8; i++)
@@ -1605,7 +1605,7 @@ void SetaDSPMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -1627,13 +1627,13 @@ void SetaDSPMap(void)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c + 8; i < c + 16; i++)
Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize] - 0x8000;
- //only upper half is ROM
+ /* only upper half is ROM */
for (i = c + 8; i < c + 16; i++)
Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
}
@@ -1643,7 +1643,7 @@ void SetaDSPMap(void)
{
for (i = 0; i < 0x08; i++)
{
- // Where does the SETA chip access, anyway? Please confirm this.
+ /* Where does the SETA chip access, anyway? Please confirm this. */
Memory.Map[c + 0x80 + i] = (uint8_t*)MAP_SETA_DSP;
Memory.BlockIsROM [c + 0x80 + i] = false;
Memory.BlockIsRAM [c + 0x80 + i] = true;
@@ -1651,7 +1651,7 @@ void SetaDSPMap(void)
for (i = 0; i < 0x04; i++)
{
- //and this!
+ /* and this! */
Memory.Map[c + i] = (uint8_t*)MAP_SETA_DSP;
Memory.BlockIsROM [c + i] = false;
}
@@ -1666,7 +1666,7 @@ void HiROMMap(void)
int32_t i;
int32_t c;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -1688,7 +1688,7 @@ void HiROMMap(void)
}
}
- // Banks 30->3f and b0->bf, address ranges 6000->7fff is S-RAM.
+ /* Banks 30->3f and b0->bf, address ranges 6000->7fff is S-RAM. */
for (c = 0; c < 16; c++)
{
Memory.Map [0x306 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
@@ -1701,7 +1701,7 @@ void HiROMMap(void)
Memory.BlockIsRAM [0xb07 + (c << 4)] = true;
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 16; i++)
@@ -1731,10 +1731,10 @@ void TalesROMMap(bool Interleaved)
{
OFFSET0 = 0x000000;
OFFSET1 = 0x000000;
- OFFSET2 = Memory.CalculatedSize - 0x400000; //changed to work with interleaved DKJM2.
+ OFFSET2 = Memory.CalculatedSize - 0x400000; /* changed to work with interleaved DKJM2. */
}
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -1747,8 +1747,8 @@ void TalesROMMap(bool Interleaved)
Memory.Map [c + 4] = Memory.Map [c + 0x804] = (uint8_t*) MAP_CPU;
Memory.Map [c + 5] = Memory.Map [c + 0x805] = (uint8_t*) MAP_CPU;
- //makes more sense to map the range here.
- //ToP seems to use sram to skip intro???
+ /* makes more sense to map the range here. */
+ /* ToP seems to use sram to skip intro??? */
if (c >= 0x300)
{
Memory.Map [c + 6] = Memory.Map [c + 0x806] = MAP_HIROM_SRAM_OR_NONE;
@@ -1769,7 +1769,7 @@ void TalesROMMap(bool Interleaved)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 8; i++)
@@ -1810,7 +1810,7 @@ void AlphaROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -1832,7 +1832,7 @@ void AlphaROMMap(void)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
@@ -1865,7 +1865,7 @@ void SuperFXROMMap(void)
DetectSuperFxRamSize();
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -1888,7 +1888,7 @@ void SuperFXROMMap(void)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 16; i++)
@@ -1898,7 +1898,7 @@ void SuperFXROMMap(void)
}
}
- // Banks 7e->7f, RAM
+ /* Banks 7e->7f, RAM */
for (c = 0; c < 16; c++)
{
Memory.Map [c + 0x7e0] = Memory.RAM;
@@ -1909,7 +1909,7 @@ void SuperFXROMMap(void)
Memory.BlockIsROM [c + 0x7f0] = false;
}
- // Banks 70->71, S-RAM
+ /* Banks 70->71, S-RAM */
for (c = 0; c < 32; c++)
{
Memory.Map [c + 0x700] = Memory.SRAM + (((c >> 4) & 1) << 16);
@@ -1917,8 +1917,8 @@ void SuperFXROMMap(void)
Memory.BlockIsROM [c + 0x700] = false;
}
- // Replicate the first 2Mb of the ROM at ROM + 2MB such that each 32K
- // block is repeated twice in each 64K block.
+ /* Replicate the first 2Mb of the ROM at ROM + 2MB such that each 32K
+ block is repeated twice in each 64K block. */
#ifdef DS2_DMA
__dcache_writeback_all();
#endif
@@ -1932,9 +1932,9 @@ void SuperFXROMMap(void)
ds2_DMA_stop(2);
ds2_DMA_stop(3);
#else
- // memmove converted: Different addresses [Neb]
+ /* memmove converted: Different addresses [Neb] */
memcpy(&Memory.ROM [0x200000 + c * 0x10000], &Memory.ROM [c * 0x8000], 0x8000);
- // memmove converted: Different addresses [Neb]
+ /* memmove converted: Different addresses [Neb] */
memcpy(&Memory.ROM [0x208000 + c * 0x10000], &Memory.ROM [c * 0x8000], 0x8000);
#endif
}
@@ -1947,7 +1947,7 @@ void SA1ROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -1968,7 +1968,7 @@ void SA1ROMMap(void)
}
}
- // Banks 40->7f
+ /* Banks 40->7f */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 16; i++)
@@ -1978,7 +1978,7 @@ void SA1ROMMap(void)
Memory.BlockIsROM [i + 0x400] = false;
}
- // c0->ff
+ /* c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 16; i++)
@@ -1999,13 +1999,13 @@ void SA1ROMMap(void)
}
WriteProtectROM();
- // Now copy the map and correct it for the SA1 CPU.
- // memmove converted: Different mallocs [Neb]
+ /* Now copy the map and correct it for the SA1 CPU. */
+ /* memmove converted: Different mallocs [Neb] */
memcpy((void*) SA1.WriteMap, (void*) Memory.WriteMap, sizeof(Memory.WriteMap));
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy((void*) SA1.Map, (void*) Memory.Map, sizeof(Memory.Map));
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
SA1.Map [c + 0] = SA1.Map [c + 0x800] = &Memory.FillRAM [0x3000];
@@ -2014,7 +2014,7 @@ void SA1ROMMap(void)
SA1.WriteMap [c + 1] = SA1.WriteMap [c + 0x801] = (uint8_t*) MAP_NONE;
}
- // Banks 60->6f
+ /* Banks 60->6f */
for (c = 0; c < 0x100; c++)
SA1.Map [c + 0x600] = SA1.WriteMap [c + 0x600] = (uint8_t*) MAP_BWRAM_BITMAP;
@@ -2026,7 +2026,7 @@ void LoROM24MBSMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -2048,7 +2048,7 @@ void LoROM24MBSMap(void)
}
}
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x200; c += 16)
{
Memory.Map [c + 0x800] = Memory.RAM;
@@ -2070,7 +2070,7 @@ void LoROM24MBSMap(void)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 8; i++)
@@ -2092,7 +2092,7 @@ void SufamiTurboLoROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -2113,7 +2113,7 @@ void SufamiTurboLoROMMap(void)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 8; i++)
@@ -2135,7 +2135,7 @@ void SufamiTurboLoROMMap(void)
}
}
- // Banks 7e->7f, RAM
+ /* Banks 7e->7f, RAM */
for (c = 0; c < 16; c++)
{
Memory.Map [c + 0x7e0] = Memory.RAM;
@@ -2146,7 +2146,7 @@ void SufamiTurboLoROMMap(void)
Memory.BlockIsROM [c + 0x7f0] = false;
}
- // Banks 60->67, S-RAM
+ /* Banks 60->67, S-RAM */
for (c = 0; c < 0x80; c++)
{
Memory.Map [c + 0x600] = MAP_LOROM_SRAM_OR_NONE;
@@ -2162,7 +2162,7 @@ void SRAM512KLoROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -2183,7 +2183,7 @@ void SRAM512KLoROMMap(void)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 8; i++)
@@ -2205,7 +2205,7 @@ void SRAM1024KLoROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -2235,7 +2235,7 @@ void CapcomProtectLoROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.Map [c + 0x400] = Memory.Map [c + 0xc00] = Memory.RAM;
@@ -2271,9 +2271,9 @@ void JumboLoROMMap(bool Interleaved)
if (Interleaved)
{
OFFSET0 = 0x000000;
- OFFSET2 = Memory.CalculatedSize - 0x400000; //changed to work with interleaved DKJM2.
+ OFFSET2 = Memory.CalculatedSize - 0x400000; /* changed to work with interleaved DKJM2. */
}
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -2311,7 +2311,7 @@ void JumboLoROMMap(bool Interleaved)
if (Settings.DSP1Master)
{
- // Banks 30->3f and b0->bf
+ /* Banks 30->3f and b0->bf */
for (c = 0x300; c < 0x400; c += 16)
{
for (i = c + 8; i < c + 16; i++)
@@ -2322,10 +2322,10 @@ void JumboLoROMMap(bool Interleaved)
}
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0x400; c < 0x800; c += 16)
{
- //updated mappings to correct A15 mirroring
+ /* updated mappings to correct A15 mirroring */
for (i = c; i < c + 8; i++)
{
Memory.Map [i] = &Memory.ROM [((c << 11) % (Memory.CalculatedSize - 0x400000)) + OFFSET0];
@@ -2342,11 +2342,11 @@ void JumboLoROMMap(bool Interleaved)
Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
}
- //ROM type has to be 64 Mbit header!
+ /* ROM type has to be 64 Mbit header! */
int32_t sum = 0, k, l;
for (k = 0; k < 256; k++)
{
- uint8_t* bank = 0x8000 + Memory.Map[8 + (k << 4)]; //use upper half of the banks, and adjust for LoROM.
+ uint8_t* bank = 0x8000 + Memory.Map[8 + (k << 4)]; /* use upper half of the banks, and adjust for LoROM. */
for (l = 0; l < 0x8000; l++)
sum += bank[l];
}
@@ -2360,7 +2360,7 @@ void SPC7110HiROMMap(void)
int32_t c;
int32_t i;
- // Banks 00->3f and 80->bf
+ /* Banks 00->3f and 80->bf */
for (c = 0; c < 0x400; c += 16)
{
Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
@@ -2384,7 +2384,7 @@ void SPC7110HiROMMap(void)
}
}
- // Banks 30->3f and b0->bf, address ranges 6000->7fff is S-RAM.
+ /* Banks 30->3f and b0->bf, address ranges 6000->7fff is S-RAM. */
for (c = 0; c < 16; c++)
{
Memory.Map [0x306 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
@@ -2395,7 +2395,7 @@ void SPC7110HiROMMap(void)
Memory.BlockIsRAM [0x307 + (c << 4)] = true;
}
- // Banks 40->7f and c0->ff
+ /* Banks 40->7f and c0->ff */
for (c = 0; c < 0x400; c += 16)
{
for (i = c; i < c + 16; i++)
@@ -2564,16 +2564,16 @@ void ApplyROMFixes(void)
{
/*
HACKS NSRT can fix that we hadn't detected before.
- [14:25:13] <@Nach> case 0x0c572ef0: //So called Hook (US)(2648)
- [14:25:13] <@Nach> case 0x6810aa95: //Bazooka Blitzkreig swapped sizes hack -handled
- [14:25:17] <@Nach> case 0x61E29C06: //The Tick region hack
- [14:25:19] <@Nach> case 0x1EF90F74: //Jikkyou Keiba Simulation Stable Star PAL hack
- [14:25:23] <@Nach> case 0x4ab225b5: //So called Krusty's Super Fun House (E)
- [14:25:25] <@Nach> case 0x77fd806a: //Donkey Kong Country 2 (E) v1.1 bad dump -handled
- [14:25:27] <@Nach> case 0x340f23e5: //Donkey Kong Country 3 (U) copier hack - handled
+ [14:25:13] <@Nach> case 0x0c572ef0: So called Hook (US)(2648)
+ [14:25:13] <@Nach> case 0x6810aa95: Bazooka Blitzkreig swapped sizes hack -handled
+ [14:25:17] <@Nach> case 0x61E29C06: The Tick region hack
+ [14:25:19] <@Nach> case 0x1EF90F74: Jikkyou Keiba Simulation Stable Star PAL hack
+ [14:25:23] <@Nach> case 0x4ab225b5: So called Krusty's Super Fun House (E)
+ [14:25:25] <@Nach> case 0x77fd806a: Donkey Kong Country 2 (E) v1.1 bad dump -handled
+ [14:25:27] <@Nach> case 0x340f23e5: Donkey Kong Country 3 (U) copier hack - handled
*/
- //not MAD-1 compliant
+ /* not MAD-1 compliant */
if (match_na("WANDERERS FROM YS"))
{
int32_t c;
@@ -2593,14 +2593,14 @@ void ApplyROMFixes(void)
Memory.BlockIsROM [0x005] = false;
}
- //NMI hacks
+ /* NMI hacks */
CPU.NMITriggerPoint = 4;
if (match_na("CACOMA KNIGHT"))
CPU.NMITriggerPoint = 25;
- //Disabling a speed-up
- // Games which spool sound samples between the SNES and sound CPU using
- // H-DMA as the sample is playing.
+ /* Disabling a speed-up:
+ Games which spool sound samples between the SNES and sound CPU using
+ H-DMA as the sample is playing. */
if (match_na("EARTHWORM JIM 2") ||
match_na("PRIMAL RAGE") ||
match_na("CLAY FIGHTER") ||
@@ -2611,43 +2611,43 @@ void ApplyROMFixes(void)
strncmp(Memory.ROMName, "WAR 2410", 8) == 0)
Settings.Shutdown = false;
- //APU timing hacks
+ /* APU timing hacks */
#ifndef USE_BLARGG_APU
- // Stunt Racer FX
+ /* Stunt Racer FX */
if (match_id("CQ ") ||
- // Illusion of Gaia
+ /* Illusion of Gaia */
strncmp(Memory.ROMId, "JG", 2) == 0 ||
match_na("GAIA GENSOUKI 1 JPN"))
IAPU.OneCycle = 13;
else if (strcmp (Memory.ROMName, "UMIHARAKAWASE") == 0)
IAPU.OneCycle = 20;
- // RENDERING RANGER R2
+ /* RENDERING RANGER R2 */
else if (match_id("AVCJ") ||
- //Mark Davis
- strncmp(Memory.ROMName, "THE FISHING MASTER", 18) == 0 || //needs >= actual APU timing. (21 is .002 Mhz slower)
- // Star Ocean
+ /* Mark Davis */
+ strncmp(Memory.ROMName, "THE FISHING MASTER", 18) == 0 || /* needs >= actual APU timing. (21 is .002 Mhz slower) */
+ /* Star Ocean */
strncmp(Memory.ROMId, "ARF", 3) == 0 ||
- // Tales of Phantasia
+ /* Tales of Phantasia */
strncmp(Memory.ROMId, "ATV", 3) == 0 ||
- // Act Raiser 1 & 2
+ /* Act Raiser 1 & 2 */
strncasecmp(Memory.ROMName, "ActRaiser", 9) == 0 ||
- // Soulblazer
+ /* Soulblazer */
match_na("SOULBLAZER - 1 USA") ||
match_na("SOULBLADER - 1") ||
- // Terranigma
+ /* Terranigma */
strncmp(Memory.ROMId, "AQT", 3) == 0 ||
- // Robotrek
+ /* Robotrek */
strncmp(Memory.ROMId, "E9 ", 3) == 0 ||
match_na("SLAP STICK 1 JPN") ||
- // ZENNIHON PURORESU2
+ /* ZENNIHON PURORESU2 */
strncmp(Memory.ROMId, "APR", 3) == 0 ||
- // Bomberman 4
+ /* Bomberman 4 */
strncmp(Memory.ROMId, "A4B", 3) == 0 ||
- // UFO KAMEN YAKISOBAN
+ /* UFO KAMEN YAKISOBAN */
strncmp(Memory.ROMId, "Y7 ", 3) == 0 ||
strncmp(Memory.ROMId, "Y9 ", 3) == 0 ||
- // Panic Bomber World
+ /* Panic Bomber World */
strncmp(Memory.ROMId, "APB", 3) == 0 ||
((strncmp(Memory.ROMName, "Parlor", 6) == 0 ||
match_na("HEIWA Parlor!Mini8") ||
@@ -2656,52 +2656,52 @@ void ApplyROMFixes(void)
match_na("DARK KINGDOM") ||
match_na("ZAN3 SFC") ||
match_na("HIOUDEN") ||
- match_na("\xC3\xDD\xBC\xC9\xB3\xC0") || //Tenshi no Uta
+ match_na("\xC3\xDD\xBC\xC9\xB3\xC0") || /* Tenshi no Uta */
match_na("FORTUNE QUEST") ||
match_na("FISHING TO BASSING") ||
strncmp(Memory.ROMName, "TokyoDome '95Battle 7", 21) == 0 ||
match_na("OHMONO BLACKBASS") ||
strncmp(Memory.ROMName, "SWORD WORLD SFC", 15) == 0 ||
- match_na("MASTERS") || //Augusta 2 J
- match_na("SFC \xB6\xD2\xDD\xD7\xB2\xC0\xDE\xB0") || //Kamen Rider
- strncmp(Memory.ROMName, "LETs PACHINKO(", 14) == 0) //A set of BS games
+ match_na("MASTERS") || /* Augusta 2 J */
+ match_na("SFC \xB6\xD2\xDD\xD7\xB2\xC0\xDE\xB0") || /* Kamen Rider */
+ strncmp(Memory.ROMName, "LETs PACHINKO(", 14) == 0) /* A set of BS games */
IAPU.OneCycle = 15;
#endif
- //Specific game fixes
+ /* Specific game fixes */
Settings.StarfoxHack = match_na("STAR FOX") || match_na("STAR WING");
Settings.WinterGold = match_na("FX SKIING NINTENDO 96") || match_na("DIRT RACER") || Settings.StarfoxHack;
Settings.HBlankStart = (256 * Settings.H_Max) / SNES_HCOUNTER_MAX;
- //CPU timing hacks
+ /* CPU timing hacks */
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * Settings.CyclesPercentage) / 100;
- // A Couple of HDMA related hacks - Lantus
+ /* A Couple of HDMA related hacks - Lantus */
if ((match_na("SFX SUPERBUTOUDEN2")) || (match_na("ALIEN vs. PREDATOR")) || (match_na("STONE PROTECTORS")) || (match_na("SUPER BATTLETANK 2")))
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 130) / 100;
else if (match_na("HOME IMPROVEMENT"))
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 200) / 100;
else if (match_id("ASRJ") && Settings.CyclesPercentage == 100)
- // Street Racer
+ /* Street Racer */
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 95) / 100;
- // Power Rangers Fight
+ /* Power Rangers Fight */
else if (strncmp(Memory.ROMId, "A3R", 3) == 0 ||
- // Clock Tower
+ /* Clock Tower */
strncmp(Memory.ROMId, "AJE", 3) == 0)
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 103) / 100;
else if (strncmp(Memory.ROMId, "A3M", 3) == 0 && Settings.CyclesPercentage == 100)
- // Mortal Kombat 3. Fixes cut off speech sample
+ /* Mortal Kombat 3. Fixes cut off speech sample */
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 110) / 100;
else if (match_na("\x0bd\x0da\x0b2\x0d4\x0b0\x0bd\x0de") &&
Settings.CyclesPercentage == 100)
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 101) / 100;
else if (match_na("WILD TRAX") || match_na("STAR FOX 2") || match_na("YOSSY'S ISLAND") || match_na("YOSHI'S ISLAND"))
CPU.TriedInterleavedMode2 = true;
- // Start Trek: Deep Sleep 9
+ /* Start Trek: Deep Sleep 9 */
else if (strncmp(Memory.ROMId, "A9D", 3) == 0 && Settings.CyclesPercentage == 100)
Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 110) / 100;
- //SA-1 Speedup settings
+ /* SA-1 Speedup settings */
SA1.WaitAddress = NULL;
SA1.WaitByteAddress1 = NULL;
SA1.WaitByteAddress2 = NULL;
@@ -2876,10 +2876,10 @@ void ApplyROMFixes(void)
SA1.WaitAddress = SA1.Map [0x00F669 >> MEMMAP_SHIFT] + 0xF669;
}
- //Other
+ /* Other */
- // Additional game fixes by sanmaiwashi ...
- // Gundam Knight Story
+ /* Additional game fixes by sanmaiwashi ... */
+ /* Gundam Knight Story */
if (match_na("SFX \xC5\xB2\xC4\xB6\xDE\xDD\xC0\xDE\xD1\xD3\xC9\xB6\xDE\xC0\xD8 1"))
{
bytes0x2000 [0xb18] = 0x4c;
@@ -2891,38 +2891,37 @@ void ApplyROMFixes(void)
match_na("F-ZERO") &&
Memory.ROMChecksum == 0xb10d &&
Memory.ROMComplementChecksum == 0x4ef2)
- Memory.ROM[0x7fd0] = 0xFF; // fix memory pack position bits
+ Memory.ROM[0x7fd0] = 0xFF; /* fix memory pack position bits */
}
-// 7FC0h or FFC0h
-//
-// FFC0h - FFCFh: CartName
-// FFD0h : Memory pack location
-// FFD1h - FFD5 : 00:00:00:00:00 (??)
-// FFD6h : Month 10h, 20h, 30h...
-// FFD7h : Day This byte / 8 low 3bits is unknown.
-// FFD8h : ROMSpeed
-// FFD9h : Satellaview ROM Type
-// FFDAh : Maker ID
-// FFDBh : ROM Version
-
-static bool is_bsx(uint8_t *p) // p == "0xFFC0" or "0x7FC0" ROM offset pointer
+/* 7FC0h or FFC0h */
+/* FFC0h - FFCFh: CartName */
+/* FFD0h : Memory pack location */
+/* FFD1h - FFD5 : 00:00:00:00:00 (??) */
+/* FFD6h : Month 10h, 20h, 30h... */
+/* FFD7h : Day This byte / 8 low 3bits is unknown. */
+/* FFD8h : ROMSpeed */
+/* FFD9h : Satellaview ROM Type */
+/* FFDAh : Maker ID */
+/* FFDBh : ROM Version */
+
+static bool is_bsx(uint8_t *p) /* p == "0xFFC0" or "0x7FC0" ROM offset pointer */
{
uint32_t c;
int32_t i;
bool b = false;
bool bb = false;
- // Satellaview ROM Type
+ /* Satellaview ROM Type */
if (p[0x19] & 0x4f)
return false;
- // Maker ID
+ /* Maker ID */
c = p[0x1a];
- if ((c != 0x33) && (c != 0xff)) // 0x33 = Manufacturer: Nintendo
+ if ((c != 0x33) && (c != 0xff)) /* 0x33 = Manufacturer: Nintendo */
return false;
- // Month, Day
+ /* Month, Day */
c = (p[0x17] << 8) | p[0x16];
if ((c != 0x0000) && (c != 0xffff))
{
@@ -2932,12 +2931,12 @@ static bool is_bsx(uint8_t *p) // p == "0xFFC0" or "0x7FC0" ROM offset pointer
return false;
}
- // ROMSpeed
+ /* ROMSpeed */
c = p[0x18];
if ((c & 0xce) || ((c & 0x30) == 0))
return false;
- // Memory pack location
+ /* Memory pack location */
if(p[0x10] == 0)
return false;
@@ -2969,7 +2968,7 @@ static bool bs_name(uint8_t* p)
int32_t lcount;
for(lcount = 16; lcount > 0; lcount--)
{
- //null strings
+ /* null strings */
if(*p == 0)
{
if(lcount != 16)
@@ -2977,10 +2976,10 @@ static bool bs_name(uint8_t* p)
else
return false;
}
- //SJIS single byte char
+ /* SJIS single byte char */
else if((*p >= 0x20 && *p <= 0x7f) || (*p >= 0xa0 && *p <= 0xdf))
p++;
- //SJIS multi byte char
+ /* SJIS multi byte char */
else if(lcount >= 2)
{
if(((*p >= 0x81 && *p <= 0x9f) || (*p >= 0xe0 && *p <= 0xfc)) && ((*(p + 1) >= 0x40 && *(p + 1) <= 0x7e) || (*(p + 1) >= 0x80 && *(p + 1) <= 0xfc)))
@@ -3023,10 +3022,10 @@ void ParseSNESHeader(uint8_t* RomHeader)
Memory.ROMChecksum = RomHeader [0x2e] + (RomHeader [0x2f] << 8);
Memory.ROMComplementChecksum = RomHeader [0x2c] + (RomHeader [0x2d] << 8);
Memory.ROMRegion = RomHeader[0x29];
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(Memory.ROMId, &RomHeader [0x2], 4);
if (RomHeader[0x2A] == 0x33)
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(Memory.CompanyId, &RomHeader [0], 2);
else
sprintf(Memory.CompanyId, "%02X", RomHeader[0x2A]);
diff --git a/source/ppu.c b/source/ppu.c
index 4ef83ad..07d32f4 100644
--- a/source/ppu.c
+++ b/source/ppu.c
@@ -47,7 +47,7 @@ void S9xUpdateHTimer()
{
if (PPU.HTimerPosition < CPU.Cycles)
{
- // Missed the IRQ on this line already
+ /* Missed the IRQ on this line already */
if (CPU.WhichEvent == HBLANK_END_EVENT || CPU.WhichEvent == HTIMER_AFTER_EVENT)
{
CPU.WhichEvent = HBLANK_END_EVENT;
@@ -65,7 +65,7 @@ void S9xUpdateHTimer()
{
if (PPU.HTimerPosition > Settings.HBlankStart)
{
- // HTimer was to trigger before h-blank start, now triggers after start of h-blank
+ /* HTimer was to trigger before h-blank start, now triggers after start of h-blank */
CPU.NextEvent = Settings.HBlankStart;
CPU.WhichEvent = HBLANK_START_EVENT;
}
@@ -113,7 +113,7 @@ static void S9xSetSuperFX(uint8_t Byte, uint16_t Address)
if ((old_fill_ram ^ Byte) & FLG_G)
{
Memory.FillRAM [Address] = Byte;
- if (Byte & FLG_G) // Go flag has been changed
+ if (Byte & FLG_G) /* Go flag has been changed */
S9xSuperFXExec();
else
FxFlushCache();
@@ -148,7 +148,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
{
switch (Address)
{
- case 0x2100: // Brightness and screen blank bit
+ case 0x2100: /* Brightness and screen blank bit */
if (Byte != Memory.FillRAM [0x2100])
{
FLUSH_REDRAW();
@@ -166,7 +166,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
}
}
break;
- case 0x2101: // Sprite (OBJ) tile address
+ case 0x2101: /* Sprite (OBJ) tile address */
if (Byte != Memory.FillRAM [0x2101])
{
FLUSH_REDRAW();
@@ -176,7 +176,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
IPPU.OBJChanged = true;
}
break;
- case 0x2102: // Sprite write address (low)
+ case 0x2102: /* Sprite write address (low) */
PPU.OAMAddr = ((Memory.FillRAM[0x2103] & 1) << 8) | Byte;
PPU.OAMFlip = 2;
PPU.SavedOAMAddr = PPU.OAMAddr;
@@ -186,7 +186,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
IPPU.OBJChanged = true;
}
break;
- case 0x2103: // Sprite register write address (high), sprite priority rotation bit.
+ case 0x2103: /* Sprite register write address (high), sprite priority rotation bit. */
PPU.OAMAddr = ((Byte & 1) << 8) | Memory.FillRAM[0x2102];
PPU.OAMPriorityRotation = (Byte & 0x80) ? 1 : 0;
@@ -209,10 +209,10 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.OAMFlip = 0;
PPU.SavedOAMAddr = PPU.OAMAddr;
break;
- case 0x2104: // Sprite register write
+ case 0x2104: /* Sprite register write */
REGISTER_2104(Byte);
break;
- case 0x2105: // Screen mode (0 - 7), background tile sizes and background 3 priority
+ case 0x2105: /* Screen mode (0 - 7), background tile sizes and background 3 priority */
if (Byte != Memory.FillRAM [0x2105])
{
FLUSH_REDRAW();
@@ -221,13 +221,13 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.BG[2].BGSize = (Byte >> 6) & 1;
PPU.BG[3].BGSize = (Byte >> 7) & 1;
PPU.BGMode = Byte & 7;
- // BJ: BG3Priority only takes effect if BGMode==1 and the bit is set
+ /* BJ: BG3Priority only takes effect if BGMode==1 and the bit is set */
PPU.BG3Priority = ((Byte & 0x0f) == 0x09);
if (PPU.BGMode == 5 || PPU.BGMode == 6)
IPPU.Interlace = (bool) (Memory.FillRAM[0x2133] & 1);
}
break;
- case 0x2106: // Mosaic pixel size and enable
+ case 0x2106: /* Mosaic pixel size and enable */
if (Byte != Memory.FillRAM [0x2106])
{
FLUSH_REDRAW();
@@ -238,10 +238,10 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.BGMosaic [3] = (Byte & 8) && PPU.Mosaic > 1;
}
break;
- case 0x2107: // [BG0SC]
- case 0x2108: // [BG1SC]
- case 0x2109: // [BG2SC]
- case 0x210A: // [BG3SC]
+ case 0x2107: /* [BG0SC] */
+ case 0x2108: /* [BG1SC] */
+ case 0x2109: /* [BG2SC] */
+ case 0x210A: /* [BG3SC] */
if (Byte != Memory.FillRAM [Address])
{
FLUSH_REDRAW();
@@ -249,7 +249,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.BG[Address - 0x2107].SCBase = (Byte & 0x7c) << 8;
}
break;
- case 0x210B: // [BG01NBA]
+ case 0x210B: /* [BG01NBA] */
if (Byte != Memory.FillRAM [0x210b])
{
FLUSH_REDRAW();
@@ -257,7 +257,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.BG[1].NameBase = ((Byte >> 4) & 7) << 12;
}
break;
- case 0x210C: // [BG23NBA]
+ case 0x210C: /* [BG23NBA] */
if (Byte != Memory.FillRAM [0x210c])
{
FLUSH_REDRAW();
@@ -297,7 +297,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.BG[3].VOffset = (Byte << 8) | PPU.BGnxOFSbyte;
PPU.BGnxOFSbyte = Byte;
break;
- case 0x2115: // VRAM byte/word access flag and increment
+ case 0x2115: /* VRAM byte/word access flag and increment */
PPU.VMA.High = (bool) (Byte & 0x80);
switch (Byte & 3)
{
@@ -324,26 +324,25 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
else
PPU.VMA.FullGraphicCount = 0;
break;
- case 0x2116: // VRAM read/write address (low)
+ case 0x2116: /* VRAM read/write address (low) */
PPU.VMA.Address &= 0xFF00;
PPU.VMA.Address |= Byte;
IPPU.FirstVRAMRead = true;
break;
- case 0x2117: // VRAM read/write address (high)
+ case 0x2117: /* VRAM read/write address (high) */
PPU.VMA.Address &= 0x00FF;
PPU.VMA.Address |= Byte << 8;
IPPU.FirstVRAMRead = true;
break;
- case 0x2118:
- // VRAM write data (low)
+ case 0x2118: /* VRAM write data (low) */
IPPU.FirstVRAMRead = true;
REGISTER_2118(Byte);
break;
- case 0x2119: // VRAM write data (high)
+ case 0x2119: /* VRAM write data (high) */
IPPU.FirstVRAMRead = true;
REGISTER_2119(Byte);
break;
- case 0x211a: // Mode 7 outside rotation area display mode and flipping
+ case 0x211a: /* Mode 7 outside rotation area display mode and flipping */
if (Byte != Memory.FillRAM [0x211a])
{
FLUSH_REDRAW();
@@ -354,27 +353,27 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.Mode7HFlip = (bool) (Byte & 1);
}
break;
- case 0x211b: // Mode 7 matrix A (low & high)
+ case 0x211b: /* Mode 7 matrix A (low & high) */
PPU.MatrixA = ((PPU.MatrixA >> 8) & 0xff) | (Byte << 8);
PPU.Need16x8Multiply = true;
break;
- case 0x211c: // Mode 7 matrix B (low & high)
+ case 0x211c: /* Mode 7 matrix B (low & high) */
PPU.MatrixB = ((PPU.MatrixB >> 8) & 0xff) | (Byte << 8);
PPU.Need16x8Multiply = true;
break;
- case 0x211d: // Mode 7 matrix C (low & high)
+ case 0x211d: /* Mode 7 matrix C (low & high) */
PPU.MatrixC = ((PPU.MatrixC >> 8) & 0xff) | (Byte << 8);
break;
- case 0x211e: // Mode 7 matrix D (low & high)
+ case 0x211e: /* Mode 7 matrix D (low & high) */
PPU.MatrixD = ((PPU.MatrixD >> 8) & 0xff) | (Byte << 8);
break;
- case 0x211f: // Mode 7 centre of rotation X (low & high)
+ case 0x211f: /* Mode 7 centre of rotation X (low & high) */
PPU.CentreX = ((PPU.CentreX >> 8) & 0xff) | (Byte << 8);
break;
- case 0x2120: // Mode 7 centre of rotation Y (low & high)
+ case 0x2120: /* Mode 7 centre of rotation Y (low & high) */
PPU.CentreY = ((PPU.CentreY >> 8) & 0xff) | (Byte << 8);
break;
- case 0x2121: // CG-RAM address
+ case 0x2121: /* CG-RAM address */
PPU.CGFLIP = false;
PPU.CGFLIPRead = false;
PPU.CGADD = Byte;
@@ -382,7 +381,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
case 0x2122:
REGISTER_2122(Byte);
break;
- case 0x2123: // Window 1 and 2 enable for backgrounds 1 and 2
+ case 0x2123: /* Window 1 and 2 enable for backgrounds 1 and 2 */
if (Byte != Memory.FillRAM [0x2123])
{
FLUSH_REDRAW();
@@ -397,7 +396,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x2124: // Window 1 and 2 enable for backgrounds 3 and 4
+ case 0x2124: /* Window 1 and 2 enable for backgrounds 3 and 4 */
if (Byte != Memory.FillRAM [0x2124])
{
FLUSH_REDRAW();
@@ -412,7 +411,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x2125: // Window 1 and 2 enable for objects and colour window
+ case 0x2125: /* Window 1 and 2 enable for objects and colour window */
if (Byte != Memory.FillRAM [0x2125])
{
FLUSH_REDRAW();
@@ -427,7 +426,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x2126: // Window 1 left position
+ case 0x2126: /* Window 1 left position */
if (Byte != Memory.FillRAM [0x2126])
{
FLUSH_REDRAW();
@@ -435,7 +434,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x2127: // Window 1 right position
+ case 0x2127: /* Window 1 right position */
if (Byte != Memory.FillRAM [0x2127])
{
FLUSH_REDRAW();
@@ -443,7 +442,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x2128: // Window 2 left position
+ case 0x2128: /* Window 2 left position */
if (Byte != Memory.FillRAM [0x2128])
{
FLUSH_REDRAW();
@@ -451,7 +450,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x2129: // Window 2 right position
+ case 0x2129: /* Window 2 right position */
if (Byte != Memory.FillRAM [0x2129])
{
FLUSH_REDRAW();
@@ -459,7 +458,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x212a: // Windows 1 & 2 overlap logic for backgrounds 1 - 4
+ case 0x212a: /* Windows 1 & 2 overlap logic for backgrounds 1 - 4 */
if (Byte != Memory.FillRAM [0x212a])
{
FLUSH_REDRAW();
@@ -470,7 +469,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x212b: // Windows 1 & 2 overlap logic for objects and colour window
+ case 0x212b: /* Windows 1 & 2 overlap logic for objects and colour window */
if (Byte != Memory.FillRAM [0x212b])
{
FLUSH_REDRAW();
@@ -479,7 +478,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.RecomputeClipWindows = true;
}
break;
- case 0x212c: // Main screen designation (backgrounds 1 - 4 and objects)
+ case 0x212c: /* Main screen designation (backgrounds 1 - 4 and objects) */
if (Byte != Memory.FillRAM [0x212c])
{
FLUSH_REDRAW();
@@ -488,7 +487,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
return;
}
break;
- case 0x212d: // Sub-screen designation (backgrounds 1 - 4 and objects)
+ case 0x212d: /* Sub-screen designation (backgrounds 1 - 4 and objects) */
if (Byte != Memory.FillRAM [0x212d])
{
FLUSH_REDRAW();
@@ -497,20 +496,20 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
return;
}
break;
- case 0x212e: // Window mask designation for main screen ?
- case 0x212f: // Window mask designation for sub-screen ?
- case 0x2130: // Fixed colour addition or screen addition
+ case 0x212e: /* Window mask designation for main screen ? */
+ case 0x212f: /* Window mask designation for sub-screen ? */
+ case 0x2130: /* Fixed colour addition or screen addition */
if (Byte != Memory.FillRAM [Address])
{
FLUSH_REDRAW();
PPU.RecomputeClipWindows = true;
}
break;
- case 0x2131: // Colour addition or subtraction select
+ case 0x2131: /* Colour addition or subtraction select */
if (Byte != Memory.FillRAM[0x2131])
{
FLUSH_REDRAW();
- // Backgrounds 1 - 4, objects and backdrop colour add/sub enable
+ /* Backgrounds 1 - 4, objects and backdrop colour add/sub enable */
Memory.FillRAM[0x2131] = Byte;
}
break;
@@ -518,7 +517,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
if (Byte != Memory.FillRAM [0x2132])
{
FLUSH_REDRAW();
- // Colour data for fixed colour addition/subtraction
+ /* Colour data for fixed colour addition/subtraction */
if (Byte & 0x80)
PPU.FixedColourBlue = Byte & 0x1f;
if (Byte & 0x40)
@@ -527,7 +526,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
PPU.FixedColourRed = Byte & 0x1f;
}
break;
- case 0x2133: // Screen settings
+ case 0x2133: /* Screen settings */
if (Byte != Memory.FillRAM [0x2133])
{
if (Byte & 0x04)
@@ -553,16 +552,16 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
break;
case 0x2134:
case 0x2135:
- case 0x2136: // Matrix 16bit x 8bit multiply result (read-only)
- case 0x2137: // Software latch for horizontal and vertical timers (read-only)
- case 0x2138: // OAM read data (read-only)
+ case 0x2136: /* Matrix 16bit x 8bit multiply result (read-only) */
+ case 0x2137: /* Software latch for horizontal and vertical timers (read-only) */
+ case 0x2138: /* OAM read data (read-only) */
case 0x2139:
- case 0x213a: // VRAM read data (read-only)
- case 0x213b: // CG-RAM read data (read-only)
+ case 0x213a: /* VRAM read data (read-only) */
+ case 0x213b: /* CG-RAM read data (read-only) */
case 0x213c:
- case 0x213d: // Horizontal and vertical (low/high) read counter (read-only)
- case 0x213e: // PPU status (time over and range over)
- case 0x213f: // NTSC/PAL select and field (read-only)
+ case 0x213d: /* Horizontal and vertical (low/high) read counter (read-only) */
+ case 0x213e: /* PPU status (time over and range over) */
+ case 0x213f: /* NTSC/PAL select and field (read-only) */
return;
case 0x2140:
case 0x2141:
@@ -635,7 +634,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
IAPU.WaitCounter++;
#else
S9xAPUWritePort(Address & 3, Byte);
-#endif // #ifndef USE_BLARGG_APU
+#endif /* #ifndef USE_BLARGG_APU */
break;
case 0x2180:
REGISTER_2180(Byte);
@@ -665,7 +664,7 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
Memory.FillRAM [Address] = Byte;
return;
}
- else if (Address == 0x2801 && Settings.SRTC) // Dai Kaijyu Monogatari II
+ else if (Address == 0x2801 && Settings.SRTC) /* Dai Kaijyu Monogatari II */
S9xSetSRTC(Byte, Address);
else if (Address >= 0x3000 && Address < 0x3300)
{
@@ -683,8 +682,8 @@ void S9xSetPPU(uint8_t Byte, uint16_t Address)
uint8_t S9xGetPPU(uint16_t Address)
{
uint8_t byte;
- if (Address < 0x2100) //not a real PPU reg
- return OpenBus; //treat as unmapped memory returning last byte on the bus
+ if (Address < 0x2100) /* not a real PPU reg */
+ return OpenBus; /* treat as unmapped memory returning last byte on the bus */
if (Address <= 0x2190)
{
switch (Address)
@@ -710,7 +709,7 @@ uint8_t S9xGetPPU(uint16_t Address)
return PPU.OpenBus1;
case 0x2134:
case 0x2135:
- case 0x2136: // 16bit x 8bit multiply read result.
+ case 0x2136: /* 16bit x 8bit multiply read result. */
if (PPU.Need16x8Multiply)
{
int32_t r = (int32_t) PPU.MatrixA * (int32_t)(PPU.MatrixB >> 8);
@@ -723,7 +722,7 @@ uint8_t S9xGetPPU(uint16_t Address)
case 0x2137:
S9xLatchCounters(0);
return OpenBus;
- case 0x2138: // Read OAM (sprite) control data
+ case 0x2138: /* Read OAM (sprite) control data */
if (PPU.OAMAddr & 0x100)
{
if (!(PPU.OAMFlip & 1))
@@ -756,7 +755,7 @@ uint8_t S9xGetPPU(uint16_t Address)
}
PPU.OAMFlip ^= 1;
return (PPU.OpenBus1 = byte);
- case 0x2139: // Read vram low byte
+ case 0x2139: /* Read vram low byte */
if (IPPU.FirstVRAMRead)
byte = Memory.VRAM[(PPU.VMA.Address << 1) & 0xffff];
else if (PPU.VMA.FullGraphicCount)
@@ -775,7 +774,7 @@ uint8_t S9xGetPPU(uint16_t Address)
IPPU.FirstVRAMRead = false;
}
return (PPU.OpenBus1 = byte);
- case 0x213A: // Read vram high byte
+ case 0x213A: /* Read vram high byte */
if (IPPU.FirstVRAMRead)
byte = Memory.VRAM[((PPU.VMA.Address << 1) + 1) & 0xffff];
else if (PPU.VMA.FullGraphicCount)
@@ -793,7 +792,7 @@ uint8_t S9xGetPPU(uint16_t Address)
IPPU.FirstVRAMRead = false;
}
return (PPU.OpenBus1 = byte);
- case 0x213B: // Read palette data
+ case 0x213B: /* Read palette data */
if (PPU.CGFLIPRead)
byte = (PPU.OpenBus2 & 0x80) | ((PPU.CGDATA[PPU.CGADD++] >> 8) & 0x7f);
else
@@ -801,25 +800,25 @@ uint8_t S9xGetPPU(uint16_t Address)
PPU.CGFLIPRead = !PPU.CGFLIPRead;
return (PPU.OpenBus2 = byte);
- case 0x213C: // Horizontal counter value 0-339
+ case 0x213C: /* Horizontal counter value 0-339 */
if (PPU.HBeamFlip)
byte = (PPU.OpenBus2 & 0xfe) | ((PPU.HBeamPosLatched >> 8) & 0x01);
else
byte = (uint8_t)PPU.HBeamPosLatched;
PPU.HBeamFlip ^= 1;
return (PPU.OpenBus2 = byte);
- case 0x213D: // Vertical counter value 0-262
+ case 0x213D: /* Vertical counter value 0-262 */
if (PPU.VBeamFlip)
byte = (PPU.OpenBus2 & 0xfe) | ((PPU.VBeamPosLatched >> 8) & 0x01);
else
byte = (uint8_t)PPU.VBeamPosLatched;
PPU.VBeamFlip ^= 1;
return (PPU.OpenBus2 = byte);
- case 0x213E: // PPU time and range over flags
+ case 0x213E: /* PPU time and range over flags */
FLUSH_REDRAW();
byte = (PPU.OpenBus1 & 0x10) | PPU.RangeTimeOver | Model->_5C77;
return (PPU.OpenBus1 = byte);
- case 0x213F: // NTSC/PAL and which field flags
+ case 0x213F: /* NTSC/PAL and which field flags */
PPU.VBeamFlip = PPU.HBeamFlip = 0;
byte = (PPU.OpenBus2 & 0x20) | (Memory.FillRAM[0x213f] & 0xc0) | (Settings.PAL ? 0x10 : 0) | Model->_5C78;
Memory.FillRAM[0x213f] &= ~0x40;
@@ -917,8 +916,8 @@ uint8_t S9xGetPPU(uint16_t Address)
return Memory.FillRAM[Address];
#else
return S9xAPUReadPort(Address & 3);
-#endif //#ifndef USE_BLARGG_APU
- case 0x2180: // Read WRAM
+#endif /* #ifndef USE_BLARGG_APU */
+ case 0x2180: /* Read WRAM */
byte = Memory.RAM [PPU.WRAM++];
PPU.WRAM &= 0x1FFFF;
return byte;
@@ -980,7 +979,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
CPU.Cycles += ONE_CYCLE;
switch (Address)
{
- case 0x4016: // S9xReset reading of old-style joypads
+ case 0x4016: /* S9xReset reading of old-style joypads */
if ((byte & 1) && !(Memory.FillRAM [Address] & 1))
{
PPU.Joypad1ButtonReadPos = 0;
@@ -997,7 +996,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
else
switch (Address)
{
- case 0x4200: // NMI, V & H IRQ and joypad reading enable flags
+ case 0x4200: /* NMI, V & H IRQ and joypad reading enable flags */
if (byte & 0x20)
{
if (!PPU.VTimerEnabled)
@@ -1022,8 +1021,8 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
}
else
{
- // No need to check for HTimer being disabled as the scanline
- // event trigger code won't trigger an H-IRQ unless its enabled.
+ /* No need to check for HTimer being disabled as the scanline
+ event trigger code won't trigger an H-IRQ unless its enabled. */
PPU.HTimerEnabled = false;
PPU.HTimerPosition = Settings.H_Max + 1;
}
@@ -1033,10 +1032,10 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
if ((byte & 0x80) &&
!(Memory.FillRAM [0x4200] & 0x80) &&
CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE &&
- // NMI can trigger during VBlank as long as NMI_read ($4210) wasn't cleared.
- // Panic Bomberman clears the NMI pending flag @ scanline 230 before enabling
- // NMIs again. The NMI routine crashes the CPU if it is called without the NMI
- // pending flag being set...
+ /* NMI can trigger during VBlank as long as NMI_read ($4210) wasn't cleared. */
+ /* Panic Bomberman clears the NMI pending flag @ scanline 230 before enabling
+ NMIs again. The NMI routine crashes the CPU if it is called without the NMI
+ pending flag being set... */
(Memory.FillRAM [0x4210] & 0x80) &&
!CPU.NMIActive)
{
@@ -1050,14 +1049,14 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
S9xLatchCounters(1);
Memory.FillRAM[0x4201] = Memory.FillRAM[0x4213] = byte;
break;
- case 0x4202: // Multiplier (for multiply)
+ case 0x4202: /* Multiplier (for multiply) */
break;
- case 0x4203: // Multiplicand
+ case 0x4203: /* Multiplicand */
{
uint32_t res = Memory.FillRAM[0x4202] * byte;
#if defined FAST_LSB_WORD_ACCESS || defined FAST_ALIGNED_LSB_WORD_ACCESS
- // assume malloc'd memory is 2-byte aligned
+ /* assume malloc'd memory is 2-byte aligned */
* ((uint16_t*) &Memory.FillRAM[0x4216]) = res;
#else
Memory.FillRAM[0x4216] = (uint8_t) res;
@@ -1066,12 +1065,12 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
break;
}
case 0x4204:
- case 0x4205: // Low and high muliplier (for divide)
+ case 0x4205: /* Low and high muliplier (for divide) */
break;
case 0x4206:
{
#if defined FAST_LSB_WORD_ACCESS || defined FAST_ALIGNED_LSB_WORD_ACCESS
- // assume malloc'd memory is 2-byte aligned
+ /* assume malloc'd memory is 2-byte aligned */
uint16_t a = *((uint16_t*) &Memory.FillRAM[0x4204]);
#else
uint16_t a = Memory.FillRAM[0x4204] + (Memory.FillRAM[0x4205] << 8);
@@ -1080,7 +1079,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
uint16_t rem = byte ? a % byte : a;
#if defined FAST_LSB_WORD_ACCESS || defined FAST_ALIGNED_LSB_WORD_ACCESS
- // assume malloc'd memory is 2-byte aligned
+ /* assume malloc'd memory is 2-byte aligned */
* ((uint16_t*) &Memory.FillRAM[0x4214]) = div;
* ((uint16_t*) &Memory.FillRAM[0x4216]) = rem;
#else
@@ -1150,7 +1149,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
Memory.FillRAM[0x420c] = byte;
IPPU.HDMA = byte;
break;
- case 0x420d: // Cycle speed 0 - 2.68Mhz, 1 - 3.58Mhz (banks 0x80 +)
+ case 0x420d: /* Cycle speed 0 - 2.68Mhz, 1 - 3.58Mhz (banks 0x80 +) */
if ((byte & 1) != (Memory.FillRAM [0x420d] & 1))
{
if (byte & 1)
@@ -1162,20 +1161,20 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
}
break;
case 0x420e:
- case 0x420f: // --->>> Unknown
+ case 0x420f: /* --->>> Unknown */
break;
- case 0x4210: // NMI ocurred flag (reset on read or write)
+ case 0x4210: /* NMI ocurred flag (reset on read or write) */
Memory.FillRAM[0x4210] = Model->_5A22;
return;
- case 0x4211: // IRQ ocurred flag (reset on read or write)
+ case 0x4211: /* IRQ ocurred flag (reset on read or write) */
CLEAR_IRQ_SOURCE(PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE);
break;
- case 0x4212: // v-blank, h-blank and joypad being scanned flags (read-only)
- case 0x4213: // I/O Port (read-only)
+ case 0x4212: /* v-blank, h-blank and joypad being scanned flags (read-only) */
+ case 0x4213: /* I/O Port (read-only) */
case 0x4214:
- case 0x4215: // Quotent of divide (read-only)
+ case 0x4215: /* Quotent of divide (read-only) */
case 0x4216:
- case 0x4217: // Multiply product (read-only)
+ case 0x4217: /* Multiply product (read-only) */
case 0x4218:
case 0x4219:
case 0x421a:
@@ -1183,7 +1182,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
case 0x421c:
case 0x421d:
case 0x421e:
- case 0x421f: // Joypad values (read-only)
+ case 0x421f: /* Joypad values (read-only) */
return;
case 0x4300:
case 0x4310:
@@ -1353,7 +1352,7 @@ void S9xSetCPU(uint8_t byte, uint16_t Address)
case 0x4804:
case 0x4805:
case 0x4806:
- case 0x4807: //These registers are used by both the S-DD1 and the SPC7110
+ case 0x4807: /* These registers are used by both the S-DD1 and the SPC7110 */
if (Settings.SPC7110)
S9xSetSPC7110(byte, Address);
else
@@ -1424,7 +1423,7 @@ uint8_t S9xGetCPU(uint16_t Address)
if (Memory.FillRAM [0x4016] & 1)
return 0;
- if (PPU.Joypad1ButtonReadPos >= 16) // Joypad 1 is enabled
+ if (PPU.Joypad1ButtonReadPos >= 16) /* Joypad 1 is enabled */
return 1;
return (IPPU.Joypads[0] >> (PPU.Joypad1ButtonReadPos++ ^ 15)) & 1;
@@ -1433,7 +1432,7 @@ uint8_t S9xGetCPU(uint16_t Address)
{
if (Memory.FillRAM [0x4016] & 1)
{
- if (IPPU.Controller == SNES_MULTIPLAYER5) // MultiPlayer5 adaptor is only allowed to be plugged into port 2
+ if (IPPU.Controller == SNES_MULTIPLAYER5) /* MultiPlayer5 adaptor is only allowed to be plugged into port 2 */
return 2;
return 0;
}
@@ -1462,7 +1461,7 @@ uint8_t S9xGetCPU(uint16_t Address)
return rv;
}
- if (PPU.Joypad2ButtonReadPos >= 16) // Joypad 2 is enabled
+ if (PPU.Joypad2ButtonReadPos >= 16) /* Joypad 2 is enabled */
return 1;
return (IPPU.Joypads[1] >> (PPU.Joypad2ButtonReadPos++ ^ 15)) & 1;
@@ -1494,21 +1493,21 @@ uint8_t S9xGetCPU(uint16_t Address)
case 0x4210:
CPU.WaitAddress = CPU.PCAtOpcodeStart;
byte = Memory.FillRAM[0x4210];
- Memory.FillRAM[0x4210] = Model->_5A22; //SNEeSe returns 2 for 5A22 version.
+ Memory.FillRAM[0x4210] = Model->_5A22; /* SNEeSe returns 2 for 5A22 version. */
return (byte & 0x80) | (OpenBus & 0x70) | Model->_5A22;
case 0x4211:
byte = (CPU.IRQActive & (PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE)) ? 0x80 : 0;
CLEAR_IRQ_SOURCE(PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE);
byte |= OpenBus & 0x7f;
return byte;
- case 0x4212: // V-blank, h-blank and joypads being read flags (read-only)
+ case 0x4212: /* V-blank, h-blank and joypads being read flags (read-only) */
CPU.WaitAddress = CPU.PCAtOpcodeStart;
return REGISTER_4212() | (OpenBus & 0x3E);
- case 0x4213: // I/O port input - returns 0 wherever $4201 is 0, and 1 elsewhere unless something else pulls it down (i.e. a gun)
+ case 0x4213: /* I/O port input - returns 0 wherever $4201 is 0, and 1 elsewhere unless something else pulls it down (i.e. a gun) */
case 0x4214:
- case 0x4215: // Quotient of divide result
+ case 0x4215: /* Quotient of divide result */
case 0x4216:
- case 0x4217: // Multiplcation result (for multiply) or remainder of divison.
+ case 0x4217: /* Multiplcation result (for multiply) or remainder of divison. */
case 0x4218:
case 0x4219:
case 0x421a:
@@ -1516,7 +1515,7 @@ uint8_t S9xGetCPU(uint16_t Address)
case 0x421c:
case 0x421d:
case 0x421e:
- case 0x421f: // Joypads 1-4 button and direction state.
+ case 0x421f: /* Joypads 1-4 button and direction state. */
return Memory.FillRAM [Address];
case 0x4300:
case 0x4310:
@@ -1808,14 +1807,14 @@ void S9xResetPPU()
{
if (!Settings.SuperFX)
memset(&Memory.FillRAM [c], c >> 8, 0x100);
- else if ((uint32_t) c < 0x3000 || (uint32_t) c >= 0x3300) // Don't overwrite SFX pvRegisters at 0x3000-0x32FF, they were set in FxReset.
+ else if ((uint32_t) c < 0x3000 || (uint32_t) c >= 0x3300) /* Don't overwrite SFX pvRegisters at 0x3000-0x32FF, they were set in FxReset. */
memset(&Memory.FillRAM [c], c >> 8, 0x100);
}
memset(&Memory.FillRAM [0x2100], 0, 0x100);
memset(&Memory.FillRAM [0x4200], 0, 0x100);
memset(&Memory.FillRAM [0x4000], 0, 0x100);
- // For BS Suttehakkun 2...
+ /* For BS Suttehakkun 2... */
memset(&Memory.FillRAM [0x1000], 0, 0x1000);
Memory.FillRAM[0x4201] = Memory.FillRAM[0x4213] = 0xFF;
@@ -1832,7 +1831,7 @@ void S9xSoftResetPPU()
memset(&Memory.FillRAM [0x2100], 0, 0x100);
memset(&Memory.FillRAM [0x4200], 0, 0x100);
memset(&Memory.FillRAM [0x4000], 0, 0x100);
- // For BS Suttehakkun 2...
+ /* For BS Suttehakkun 2... */
memset(&Memory.FillRAM [0x1000], 0, 0x1000);
Memory.FillRAM[0x4201] = Memory.FillRAM[0x4213] = 0xFF;
@@ -2006,7 +2005,7 @@ void S9xUpdateJustifiers()
{
Memory.FillRAM [0x213F] = Model->_5C78;
- if (Settings.SecondJustifier) //process latch as Justifier 2
+ if (Settings.SecondJustifier) /* process latch as Justifier 2 */
{
if (IPPU.Controller == SNES_JUSTIFIER_2)
{
@@ -2023,7 +2022,7 @@ void S9xUpdateJustifiers()
{
Memory.FillRAM [0x213F] = Model->_5C78;
- if (IPPU.Controller == SNES_JUSTIFIER) //emulate player 1.
+ if (IPPU.Controller == SNES_JUSTIFIER) /* emulate player 1. */
{
if (!offscreen)
{
@@ -2034,7 +2033,7 @@ void S9xUpdateJustifiers()
}
}
- if (!offscreen) //needs restructure
+ if (!offscreen) /* needs restructure */
{
if ((!last_p1 && IPPU.Controller == SNES_JUSTIFIER) || (last_p1 && IPPU.Controller == SNES_JUSTIFIER_2))
{
@@ -2069,11 +2068,11 @@ void S9xUpdateJoypads()
if (IPPU.Joypads [i])
IPPU.Joypads [i] |= 0xffff0000;
- if (Settings.MouseMaster) // Read mouse position if enabled
+ if (Settings.MouseMaster) /* Read mouse position if enabled */
for (i = 0; i < 2; i++)
S9xProcessMouse(i);
- if (Settings.SuperScopeMaster) // Read SuperScope if enabled
+ if (Settings.SuperScopeMaster) /* Read SuperScope if enabled */
ProcessSuperScope();
if (Memory.FillRAM [0x4200] & 1)
@@ -2129,7 +2128,7 @@ void S9xSuperFXExec()
FxEmulate((Memory.FillRAM [0x3000 + GSU_CLSR] & 1) ? 700 : 350);
int32_t GSUStatus = Memory.FillRAM [0x3000 + GSU_SFR] | (Memory.FillRAM [0x3000 + GSU_SFR + 1] << 8);
if ((GSUStatus & (FLG_G | FLG_IRQ)) == FLG_IRQ)
- S9xSetIRQ(GSU_IRQ_SOURCE); // Trigger a GSU IRQ.
+ S9xSetIRQ(GSU_IRQ_SOURCE); /* Trigger a GSU IRQ. */
}
}
}
diff --git a/source/seta010.c b/source/seta010.c
index ca6f121..d452cd9 100644
--- a/source/seta010.c
+++ b/source/seta010.c
@@ -3,7 +3,7 @@
#include "seta.h"
#include "memmap.h"
-// Mode 7 scaling constants for all raster lines
+/* Mode 7 scaling constants for all raster lines */
const int16_t ST010_M7Scale[176] =
{
0x0380, 0x0325, 0x02da, 0x029c, 0x0268, 0x023b, 0x0215, 0x01f3,
@@ -331,16 +331,14 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
{
switch (ST010.op_reg)
{
- // Sorts Driver Placements
- //
- // Input
- // 0x0024-0x0025 : Positions
- // 0x0040-0x007f : Places
- // 0x0080-0x00ff : Drivers
- // Output
- // 0x0040-0x007f : Places
- // 0x0080-0x00ff : Drivers
- //
+ /* Sorts Driver Placements
+ Input
+ 0x0024-0x0025 : Positions
+ 0x0040-0x007f : Places
+ 0x0080-0x00ff : Drivers
+ Output
+ 0x0040-0x007f : Places
+ 0x0080-0x00ff : Drivers */
case 0x02:
{
#if defined(FAST_LSB_WORD_ACCESS) && !defined(ANDROID)
@@ -374,16 +372,14 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
}
- // Two Dimensional Coordinate Scale
- //
- // Input
- // 0x0000-0x0001 : X0 (signed)
- // 0x0002-0x0003 : Y0 (signed)
- // 0x0004-0x0005 : Multiplier (signed)
- // Output
- // 0x0010-0x0013 : X1 (signed)
- // 0x0014-0x0017 : Y1 (signed)
- //
+ /* Two Dimensional Coordinate Scale
+ Input
+ 0x0000-0x0001 : X0 (signed)
+ 0x0002-0x0003 : Y0 (signed)
+ 0x0004-0x0005 : Multiplier (signed)
+ Output
+ 0x0010-0x0013 : X1 (signed)
+ 0x0014-0x0017 : Y1 (signed) */
case 0x03:
{
#if defined(FAST_LSB_WORD_ACCESS) && !defined(ANDROID)
@@ -407,14 +403,12 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
break;
}
- // 16-bit Multiplication
- //
- // Input
- // 0x0000-0x0001 : Multiplcand (signed)
- // 0x0002-0x0003 : Multiplier (signed)
- // Output
- // 0x0010-0x0013 : Product (signed)
- //
+ /* 16-bit Multiplication
+ Input
+ 0x0000-0x0001 : Multiplcand (signed)
+ 0x0002-0x0003 : Multiplier (signed)
+ Output
+ 0x0010-0x0013 : Product (signed) */
case 0x06:
{
#if defined(FAST_LSB_WORD_ACCESS) && !defined(ANDROID)
@@ -433,16 +427,14 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
break;
}
- // Mode 7 Raster Data Calculation
- //
- // Input
- // 0x0000-0x0001 : Angle (signed)
- // Output
- // 0x00f0-0x024f : Mode 7 Matrix A
- // 0x0250-0x03af : Mode 7 Matrix B
- // 0x03b0-0x050f : Mode 7 Matrix C
- // 0x0510-0x066f : Mode 7 Matrix D
- //
+ /* Mode 7 Raster Data Calculation
+ Input
+ 0x0000-0x0001 : Angle (signed)
+ Output
+ 0x00f0-0x024f : Mode 7 Matrix A
+ 0x0250-0x03af : Mode 7 Matrix B
+ 0x03b0-0x050f : Mode 7 Matrix C
+ 0x0510-0x066f : Mode 7 Matrix D */
case 0x07:
{
int16_t data;
@@ -452,7 +444,7 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
int32_t line;
for (line = 0; line < 176; line++)
{
- // Calculate Mode 7 Matrix A/D data
+ /* Calculate Mode 7 Matrix A/D data */
data = ST010_M7Scale[line] * ST010_Cos(Theta) >> 15;
Memory.SRAM[0x00f0 + offset] = (uint8_t)(data);
@@ -460,7 +452,7 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
Memory.SRAM[0x0510 + offset] = (uint8_t)(data);
Memory.SRAM[0x0511 + offset] = (uint8_t)(data >> 8);
- // Calculate Mode 7 Matrix B/C data
+ /* Calculate Mode 7 Matrix B/C data */
data = ST010_M7Scale[line] * ST010_Sin(Theta) >> 15;
Memory.SRAM[0x0250 + offset] = (uint8_t)(data);
@@ -475,23 +467,21 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
offset += 2;
}
- // Shift Angle for use with Lookup table
+ /* Shift Angle for use with Lookup table */
Memory.SRAM[0x00] = Memory.SRAM[0x01];
Memory.SRAM[0x01] = 0x00;
break;
}
- // Two dimensional Coordinate Rotation
- //
- // Input
- // 0x0000-0x0001 : X0 (signed)
- // 0x0002-0x0003 : Y0 (signed)
- // 0x0004-0x0005 : Angle (signed)
- // Output
- // 0x0010-0x0011 : X1 (signed)
- // 0x0012-0x0013 : Y1 (signed)
- //
+ /* Two dimensional Coordinate Rotation
+ Input
+ 0x0000-0x0001 : X0 (signed)
+ 0x0002-0x0003 : Y0 (signed)
+ 0x0004-0x0005 : Angle (signed)
+ Output
+ 0x0010-0x0011 : X1 (signed)
+ 0x0012-0x0013 : Y1 (signed) */
case 0x08:
{
#if defined(FAST_LSB_WORD_ACCESS) && !defined(ANDROID)
@@ -511,12 +501,11 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
break;
}
- // Input
- // 0x0000-0x0001 : DX (signed)
- // 0x0002-0x0003 : DY (signed)
- // Output
- // 0x0010-0x0011 : Angle (signed)
- //
+ /* Input
+ 0x0000-0x0001 : DX (signed)
+ 0x0002-0x0003 : DY (signed)
+ Output
+ 0x0010-0x0011 : Angle (signed) */
case 0x01:
{
Memory.SRAM[0x0006] = Memory.SRAM[0x0002];
@@ -544,7 +533,7 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
break;
}
- // calculate the vector length of (x,y)
+ /* calculate the vector length of (x,y) */
case 0x04:
{
int16_t square, x, y;
@@ -568,7 +557,7 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
break;
}
- // calculate AI orientation based on specific guidelines
+ /* calculate AI orientation based on specific guidelines */
case 0x05:
{
int32_t dx, dy;
@@ -577,45 +566,45 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
bool wrap = false;
- // target (x,y) coordinates
+ /* target (x,y) coordinates */
int16_t ypos_max = ST010_WORD(0x00C0);
int16_t xpos_max = ST010_WORD(0x00C2);
- // current coordinates and direction
+ /* current coordinates and direction */
int32_t ypos = Memory.SRAM[0xC4] | (Memory.SRAM[0xC5] << 8) | (Memory.SRAM[0xC6] << 16) | (Memory.SRAM[0xC7] << 24);
int32_t xpos = Memory.SRAM[0xC8] | (Memory.SRAM[0xC9] << 8) | (Memory.SRAM[0xCA] << 16) | (Memory.SRAM[0xCB] << 24);
uint16_t rot = Memory.SRAM[0xCC] | (Memory.SRAM[0xCD] << 8);
- // physics
+ /* physics */
uint16_t speed = ST010_WORD(0x00D4);
uint16_t accel = ST010_WORD(0x00D6);
uint16_t speed_max = ST010_WORD(0x00D8);
- // special condition acknowledgment
+ /* special condition acknowledgment */
int16_t system = ST010_WORD(0x00DA);
int16_t flags = ST010_WORD(0x00DC);
- // new target coordinates
+ /* new target coordinates */
int16_t ypos_new = ST010_WORD(0x00DE);
int16_t xpos_new = ST010_WORD(0x00E0);
- // mask upper bit
+ /* mask upper bit */
xpos_new &= 0x7FFF;
- // get the current distance
+ /* get the current distance */
dx = xpos_max - (xpos >> 16);
dy = ypos_max - (ypos >> 16);
- // quirk: clear and move in9
+ /* quirk: clear and move in9 */
Memory.SRAM[0xD2] = 0xFF;
Memory.SRAM[0xD3] = 0xFF;
Memory.SRAM[0xDA] = 0;
Memory.SRAM[0xDB] = 0;
- // grab the target angle
+ /* grab the target angle */
ST010_OP01(dy, dx, &a1, &b1, &c1, (int16_t*)&o1);
- // check for wrapping
+ /* check for wrapping */
if (ABS(o1 - rot) > 0x8000)
{
o1 += 0x8000;
@@ -625,22 +614,22 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
uint16_t old_speed = speed;
- if (ABS(o1 - rot) == 0x8000) // special case
+ if (ABS(o1 - rot) == 0x8000) /* special case */
speed = 0x100;
- else if (ABS(o1 - rot) >= 0x1000) // slow down for sharp curves
+ else if (ABS(o1 - rot) >= 0x1000) /* slow down for sharp curves */
{
uint32_t slow = ABS(o1 - rot);
- slow >>= 4; // scaling
+ slow >>= 4; /* scaling */
speed -= slow;
}
- else // otherwise accelerate
+ else /* otherwise accelerate */
{
speed += accel;
if (speed > speed_max)
- speed = speed_max; // clip speed
+ speed = speed_max; /* clip speed */
}
- // prevent negative/positive overflow
+ /* prevent negative/positive overflow */
if (ABS(old_speed - speed) > 0x8000)
{
if(old_speed < speed)
@@ -649,8 +638,7 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
speed = 0xff00;
}
- // adjust direction by so many degrees
- // be careful of negative adjustments
+ /* adjust direction by so many degrees; be careful of negative adjustments */
if((o1 > rot && (o1 - rot) > 0x80) || (o1 < rot && (rot - o1) >= 0x80))
{
if(o1 < rot)
@@ -663,26 +651,26 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
if(wrap)
rot -= 0x8000;
- // now check the distances (store for later)
+ /* now check the distances (store for later) */
dx = (xpos_max << 16) - xpos;
dy = (ypos_max << 16) - ypos;
dx >>= 16;
dy >>= 16;
- // if we're in so many units of the target, signal it
+ /* if we're in so many units of the target, signal it */
if ((system && (dy <= 6 && dy >= -8) && (dx <= 126 && dx >= -128)) || (!system && (dx <= 6 && dx >= -8) && (dy <= 126 && dy >= -128)))
{
- // announce our new destination and flag it
+ /* announce our new destination and flag it */
xpos_max = xpos_new & 0x7FFF;
ypos_max = ypos_new;
flags |= 0x08;
}
- // update position
+ /* update position */
xpos -= (ST010_Cos(rot) * 0x400 >> 15) * (speed >> 8) << 1;
ypos -= (ST010_Sin(rot) * 0x400 >> 15) * (speed >> 8) << 1;
- // quirk: mask upper byte
+ /* quirk: mask upper byte */
xpos &= 0x1FFFFFFF;
ypos &= 0x1FFFFFFF;
@@ -708,7 +696,7 @@ void S9xSetST010(uint32_t Address, uint8_t Byte)
}
}
- // lower signal: op processed
+ /* lower signal: op processed */
ST010.op_reg = 0;
ST010.execute = 0;
}
diff --git a/source/seta011.c b/source/seta011.c
index 10cd40b..027f8ab 100644
--- a/source/seta011.c
+++ b/source/seta011.c
@@ -4,16 +4,16 @@
#include "memmap.h"
ST011_Regs ST011;
-uint8_t board[9][9]; // shougi playboard
+uint8_t board[9][9]; /* shougi playboard */
uint8_t S9xGetST011(uint32_t Address)
{
uint8_t t;
uint16_t address = (uint16_t) Address & 0xFFFF;
- if (address == 0x01) // status check
+ if (address == 0x01) /* status check */
t = 0xFF;
- else // read directly from s-ram
+ else /* read directly from s-ram */
t = Memory.SRAM[address];
return t;
@@ -24,7 +24,7 @@ void S9xSetST011(uint32_t Address, uint8_t Byte)
uint16_t address = (uint16_t) Address & 0xFFFF;
static bool reset = false;
- if (!reset) // bootup values
+ if (!reset) /* bootup values */
{
ST011.waiting4command = true;
reset = true;
@@ -32,9 +32,9 @@ void S9xSetST011(uint32_t Address, uint8_t Byte)
Memory.SRAM[address] = Byte;
- if (address == 0x00) // op commands/data goes through this address
+ if (address == 0x00) /* op commands/data goes through this address */
{
- if (ST011.waiting4command) // check for new commands
+ if (ST011.waiting4command) /* check for new commands */
{
ST011.waiting4command = false;
ST011.command = Byte;
@@ -67,32 +67,32 @@ void S9xSetST011(uint32_t Address, uint8_t Byte)
}
}
- if (ST011.in_count == ST011.in_index) // Actually execute the command
+ if (ST011.in_count == ST011.in_index) /* Actually execute the command */
{
ST011.waiting4command = true;
ST011.out_index = 0;
switch (ST011.command)
{
- case 0x01: // unknown: download playboard
+ case 0x01: /* unknown: download playboard */
{
- // 9x9 board data: top to bottom, left to right
- // Values represent piece types and ownership
+ /* 9x9 board data: top to bottom, left to right */
+ /* Values represent piece types and ownership */
int32_t lcv;
for (lcv = 0; lcv < 9; lcv++)
memcpy(board[lcv], ST011.parameters + lcv * 10, 9 * 1);
break;
}
- case 0x04: // unknown
+ case 0x04: /* unknown */
case 0x05:
{
- // outputs
+ /* outputs */
Memory.SRAM[0x12C] = 0x00;
Memory.SRAM[0x12E] = 0x00;
break;
}
- case 0x0E: // unknown
+ case 0x0E: /* unknown */
{
- // outputs
+ /* outputs */
Memory.SRAM[0x12C] = 0x00;
Memory.SRAM[0x12D] = 0x00;
break;
diff --git a/source/seta018.c b/source/seta018.c
index a608960..7cf0c80 100644
--- a/source/seta018.c
+++ b/source/seta018.c
@@ -7,11 +7,11 @@ ST018_Regs ST018;
uint8_t S9xGetST018(uint32_t Address)
{
- uint8_t t = 0; // Initialise to some value for the compiler
+ uint8_t t = 0; /* Initialise to some value for the compiler */
uint16_t address = (uint16_t) Address & 0xFFFF;
- // these roles may be flipped
- // op output
+ /* these roles may be flipped */
+ /* op output */
if (address == 0x3804)
{
if (ST018.out_count)
@@ -24,7 +24,7 @@ uint8_t S9xGetST018(uint32_t Address)
else
t = 0x81;
}
- else if (address == 0x3800) // status register
+ else if (address == 0x3800) /* status register */
t = ST018.status;
return t;
@@ -35,7 +35,7 @@ void S9xSetST018(uint8_t Byte, uint32_t Address)
uint16_t address = (uint16_t) Address & 0xFFFF;
static bool reset = false;
- if (!reset) // bootup values
+ if (!reset) /* bootup values */
{
ST018.waiting4command = true;
ST018.part_command = 0;
@@ -43,19 +43,19 @@ void S9xSetST018(uint8_t Byte, uint32_t Address)
}
Memory.SRAM[address] = Byte;
- ST018.status = 0x00; // default status for now
+ ST018.status = 0x00; /* default status for now */
- if (address == 0x3804) // op data goes through this address
+ if (address == 0x3804) /* op data goes through this address */
{
- if (ST018.waiting4command && ST018.part_command == 2) // check for new commands: 3 bytes length
+ if (ST018.waiting4command && ST018.part_command == 2) /* check for new commands: 3 bytes length */
{
ST018.waiting4command = false;
ST018.command <<= 8;
ST018.command |= Byte;
ST018.in_index = 0;
ST018.out_index = 0;
- ST018.part_command = 0; // 3-byte commands
- ST018.pass = 0; // data streams into the chip
+ ST018.part_command = 0; /* 3-byte commands */
+ ST018.pass = 0; /* data streams into the chip */
switch (ST018.command & 0xFFFFFF)
{
case 0x0100:
@@ -67,20 +67,20 @@ void S9xSetST018(uint8_t Byte, uint32_t Address)
break;
}
}
- else if (ST018.waiting4command) // 3-byte commands
+ else if (ST018.waiting4command) /* 3-byte commands */
{
ST018.part_command++;
ST018.command <<= 8;
ST018.command |= Byte;
}
}
- else if (address == 0x3802) // extra parameters
+ else if (address == 0x3802) /* extra parameters */
{
ST018.parameters[ST018.in_index] = Byte;
ST018.in_index++;
}
- if (ST018.in_count == ST018.in_index) // Actually execute the command
+ if (ST018.in_count == ST018.in_index) /* Actually execute the command */
{
ST018.waiting4command = true;
ST018.in_index = 0;
@@ -88,7 +88,7 @@ void S9xSetST018(uint8_t Byte, uint32_t Address)
switch (ST018.command)
{
case 0x0100:
- case 0xFF00: // hardware check?
+ case 0xFF00: /* hardware check? */
ST018.waiting4command = false;
ST018.pass++;
if (ST018.pass == 1)
@@ -96,7 +96,7 @@ void S9xSetST018(uint8_t Byte, uint32_t Address)
ST018.in_count = 1;
ST018.out_count = 2;
- // Overload's research
+ /* Overload's research */
ST018.output[0x00] = 0x81;
ST018.output[0x01] = 0x81;
}
@@ -105,7 +105,7 @@ void S9xSetST018(uint8_t Byte, uint32_t Address)
ST018.out_count = 3;
ST018.output[0x02] = 0x81;
- // done processing requests
+ /* done processing requests */
if (ST018.pass == 3)
ST018.waiting4command = true;
}
diff --git a/source/snes9x.h b/source/snes9x.h
index fdeae61..9e7d91d 100644
--- a/source/snes9x.h
+++ b/source/snes9x.h
@@ -217,6 +217,10 @@ extern SSettings Settings;
extern SCPUState CPU;
extern char String [513];
+#ifdef LAGFIX
+extern bool finishedFrame;
+#endif
+
void S9xSetPause(uint32_t mask);
void S9xClearPause(uint32_t mask);
#endif
diff --git a/source/soundux.c b/source/soundux.c
index 90cf18e..967ac10 100644
--- a/source/soundux.c
+++ b/source/soundux.c
@@ -127,22 +127,22 @@ void S9xSetEnvRate(Channel* ch, uint32_t rate, int32_t direction, int32_t target
{
switch (mode >> 28)
{
- case 0: // Attack
+ case 0: /* Attack */
ch->erate = AttackERate[ch->env_ind_attack][ch->state];
break;
- case 1: // Decay
+ case 1: /* Decay */
ch->erate = DecayERate[ch->env_ind_decay][ch->state];
break;
- case 2: // Sustain
+ case 2: /* Sustain */
ch->erate = SustainERate[ch->env_ind_sustain][ch->state];
break;
- case 3: // Increase
+ case 3: /* Increase */
ch->erate = IncreaseERate[mode & 0x1f][ch->state];
break;
- case 4: // DecreaseExp
+ case 4: /* DecreaseExp */
ch->erate = DecreaseERateExp[mode & 0x1f][ch->state];
break;
- case 5: // KeyOff
+ case 5: /* KeyOff */
ch->erate = KeyOffERate[ch->state];
break;
}
@@ -279,8 +279,8 @@ void S9xSetSoundADSR(int32_t channel, int32_t attack_ind, int32_t decay_ind, int
int32_t decay_rate = DecayRate [decay_ind];
int32_t sustain_rate = SustainRate [sustain_ind];
- // Hack for ROMs that use a very short attack rate, key on a
- // channel, then switch to decay mode. e.g. Final Fantasy II.
+ /* Hack for ROMs that use a very short attack rate, key on a
+ channel, then switch to decay mode. e.g. Final Fantasy II. */
if(attack_rate == 1)
attack_rate = 0;
@@ -322,7 +322,7 @@ void S9xSetEnvelopeHeight(int32_t channel, int32_t level)
S9xAPUSetEndOfSample(channel, ch);
}
-void S9xSetSoundFrequency(int32_t channel, int32_t hertz) // hertz [0~64K<<1]
+void S9xSetSoundFrequency(int32_t channel, int32_t hertz) /* hertz [0~64K<<1] */
{
if (SoundData.channels[channel].type == SOUND_NOISE)
hertz = NoiseFreq [APU.DSP [APU_FLG] & 0x1f];
@@ -686,7 +686,7 @@ static inline void MixStereo(int32_t sample_count)
}
else
{
- // Snes9x 1.53's SPC_DSP.cpp, by blargg
+ /* Snes9x 1.53's SPC_DSP.cpp, by blargg */
int32_t feedback = (so.noise_gen << 13) ^ (so.noise_gen << 14);
so.noise_gen = (feedback & 0x4000) ^ (so.noise_gen >> 1);
ch->sample = (so.noise_gen << 17) >> 17;
@@ -738,10 +738,10 @@ void S9xMixSamples(int16_t* buffer, int32_t sample_count)
/* Mix and convert waveforms */
if (SoundData.echo_enable && SoundData.echo_buffer_size)
{
- // 16-bit stereo sound with echo enabled ...
+ /* 16-bit stereo sound with echo enabled ... */
if (FilterTapDefinitionBitfield == 0)
{
- // ... but no filter defined.
+ /* ... but no filter defined. */
for (J = 0; J < sample_count; J++)
{
int32_t E = Echo [SoundData.echo_ptr];
@@ -757,7 +757,7 @@ void S9xMixSamples(int16_t* buffer, int32_t sample_count)
}
else
{
- // ... with filter defined.
+ /* ... with filter defined. */
for (J = 0; J < sample_count; J++)
{
Loop [(Z - 0) & 15] = Echo [SoundData.echo_ptr];
@@ -785,7 +785,7 @@ void S9xMixSamples(int16_t* buffer, int32_t sample_count)
}
else
{
- // 16-bit mono or stereo sound, no echo
+ /* 16-bit mono or stereo sound, no echo */
for (J = 0; J < sample_count; J++)
{
I = (MixBuffer[J] * SoundData.master_volume [J & 1]) / VOL_DIV16;
@@ -821,7 +821,7 @@ void S9xResetSound(bool full)
SoundData.channels[i].sustain_rate = 0;
SoundData.channels[i].release_rate = 0;
SoundData.channels[i].sustain_level = 0;
- // notaz
+ /* notaz */
SoundData.channels[i].env_ind_attack = 0;
SoundData.channels[i].env_ind_decay = 0;
SoundData.channels[i].env_ind_sustain = 0;
@@ -862,9 +862,9 @@ void S9xSetPlaybackRate(uint32_t playback_rate)
if (playback_rate)
{
- // notaz: calculate a value (let's call it freqbase) to simplify channel freq calculations later.
+ /* notaz: calculate a value (let's call it freqbase) to simplify channel freq calculations later. */
so.freqbase = (FIXED_POINT << 11) / (playback_rate * 33 / 32);
- // now precalculate env rates for S9xSetEnvRate
+ /* now precalculate env rates for S9xSetEnvRate */
static int32_t steps [] =
{
0, 64, 619, 619, 128, 1, 64, 55, 64, 619
diff --git a/source/spc700.c b/source/spc700.c
index fed54ff..eaf5467 100644
--- a/source/spc700.c
+++ b/source/spc700.c
@@ -197,7 +197,7 @@ uint32_t Work32 = 0;
IAPU.Registers.YA.B.Y;
#endif
-void Apu00(void) // NOP
+void Apu00(void) /* NOP */
{
IAPU.PC++;
}
@@ -282,15 +282,15 @@ void ApuF1(void)
TCALL(15);
}
-void Apu3F(void) // CALL absolute
+void Apu3F(void) /* CALL absolute */
{
Absolute();
- // 0xB6f for Star Fox 2
+ /* 0xB6f for Star Fox 2 */
PushW(IAPU.PC + 3 - IAPU.RAM);
IAPU.PC = IAPU.RAM + IAPU.Address;
}
-void Apu4F(void) // PCALL $XX
+void Apu4F(void) /* PCALL $XX */
{
Work8 = OP1;
PushW(IAPU.PC + 2 - IAPU.RAM);
@@ -489,7 +489,7 @@ void ApuF3(void)
void Apu04(void)
{
- // OR A,dp
+ /* OR A,dp */
IAPU.Registers.YA.B.A |= S9xAPUGetByteZ(OP1);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -497,7 +497,7 @@ void Apu04(void)
void Apu05(void)
{
- // OR A,abs
+ /* OR A,abs */
Absolute();
IAPU.Registers.YA.B.A |= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -506,7 +506,7 @@ void Apu05(void)
void Apu06(void)
{
- // OR A,(X)
+ /* OR A,(X) */
IAPU.Registers.YA.B.A |= S9xAPUGetByteZ(IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -514,7 +514,7 @@ void Apu06(void)
void Apu07(void)
{
- // OR A,(dp+X)
+ /* OR A,(dp+X) */
IndexedXIndirect();
IAPU.Registers.YA.B.A |= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -523,7 +523,7 @@ void Apu07(void)
void Apu08(void)
{
- // OR A,#00
+ /* OR A,#00 */
IAPU.Registers.YA.B.A |= OP1;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -531,7 +531,7 @@ void Apu08(void)
void Apu09(void)
{
- // OR dp(dest),dp(src)
+ /* OR dp(dest),dp(src) */
Work8 = S9xAPUGetByteZ(OP1);
Work8 |= S9xAPUGetByteZ(OP2);
S9xAPUSetByteZ(Work8, OP2);
@@ -541,7 +541,7 @@ void Apu09(void)
void Apu14(void)
{
- // OR A,dp+X
+ /* OR A,dp+X */
IAPU.Registers.YA.B.A |= S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -549,7 +549,7 @@ void Apu14(void)
void Apu15(void)
{
- // OR A,abs+X
+ /* OR A,abs+X */
AbsoluteX();
IAPU.Registers.YA.B.A |= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -558,7 +558,7 @@ void Apu15(void)
void Apu16(void)
{
- // OR A,abs+Y
+ /* OR A,abs+Y */
AbsoluteY();
IAPU.Registers.YA.B.A |= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -567,7 +567,7 @@ void Apu16(void)
void Apu17(void)
{
- // OR A,(dp)+Y
+ /* OR A,(dp)+Y */
IndirectIndexedY();
IAPU.Registers.YA.B.A |= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -576,7 +576,7 @@ void Apu17(void)
void Apu18(void)
{
- // OR dp,#00
+ /* OR dp,#00 */
Work8 = OP1;
Work8 |= S9xAPUGetByteZ(OP2);
S9xAPUSetByteZ(Work8, OP2);
@@ -586,7 +586,7 @@ void Apu18(void)
void Apu19(void)
{
- // OR (X),(Y)
+ /* OR (X),(Y) */
Work8 = S9xAPUGetByteZ(IAPU.Registers.X) | S9xAPUGetByteZ(IAPU.Registers.YA.B.Y);
APUSetZN8(Work8);
S9xAPUSetByteZ(Work8, IAPU.Registers.X);
@@ -595,7 +595,7 @@ void Apu19(void)
void Apu0A(void)
{
- // OR1 C,membit
+ /* OR1 C,membit */
MemBit();
if (!APUCheckCarry())
if (S9xAPUGetByte(IAPU.Address) & (1 << IAPU.Bit))
@@ -605,7 +605,7 @@ void Apu0A(void)
void Apu2A(void)
{
- // OR1 C,not membit
+ /* OR1 C,not membit */
MemBit();
if (!APUCheckCarry())
if (!(S9xAPUGetByte(IAPU.Address) & (1 << IAPU.Bit)))
@@ -615,7 +615,7 @@ void Apu2A(void)
void Apu4A(void)
{
- // AND1 C,membit
+ /* AND1 C,membit */
MemBit();
if (APUCheckCarry())
if (!(S9xAPUGetByte(IAPU.Address) & (1 << IAPU.Bit)))
@@ -625,7 +625,7 @@ void Apu4A(void)
void Apu6A(void)
{
- // AND1 C, not membit
+ /* AND1 C, not membit */
MemBit();
if (APUCheckCarry())
if ((S9xAPUGetByte(IAPU.Address) & (1 << IAPU.Bit)))
@@ -635,7 +635,7 @@ void Apu6A(void)
void Apu8A(void)
{
- // EOR1 C, membit
+ /* EOR1 C, membit */
MemBit();
if (S9xAPUGetByte(IAPU.Address) & (1 << IAPU.Bit))
{
@@ -649,7 +649,7 @@ void Apu8A(void)
void ApuAA(void)
{
- // MOV1 C,membit
+ /* MOV1 C,membit */
MemBit();
if (S9xAPUGetByte(IAPU.Address) & (1 << IAPU.Bit))
APUSetCarry();
@@ -660,7 +660,7 @@ void ApuAA(void)
void ApuCA(void)
{
- // MOV1 membit,C
+ /* MOV1 membit,C */
MemBit();
if (APUCheckCarry())
S9xAPUSetByte(S9xAPUGetByte(IAPU.Address) | (1 << IAPU.Bit), IAPU.Address);
@@ -671,7 +671,7 @@ void ApuCA(void)
void ApuEA(void)
{
- // NOT1 membit
+ /* NOT1 membit */
MemBit();
S9xAPUSetByte(S9xAPUGetByte(IAPU.Address) ^ (1 << IAPU.Bit), IAPU.Address);
IAPU.PC += 3;
@@ -679,7 +679,7 @@ void ApuEA(void)
void Apu0B(void)
{
- // ASL dp
+ /* ASL dp */
Work8 = S9xAPUGetByteZ(OP1);
ASL(Work8);
S9xAPUSetByteZ(Work8, OP1);
@@ -688,7 +688,7 @@ void Apu0B(void)
void Apu0C(void)
{
- // ASL abs
+ /* ASL abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
ASL(Work8);
@@ -698,7 +698,7 @@ void Apu0C(void)
void Apu1B(void)
{
- // ASL dp+X
+ /* ASL dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
ASL(Work8);
S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X);
@@ -707,14 +707,14 @@ void Apu1B(void)
void Apu1C(void)
{
- // ASL A
+ /* ASL A */
ASL(IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu0D(void)
{
- // PUSH PSW
+ /* PUSH PSW */
S9xAPUPackStatus();
Push(IAPU.Registers.P);
IAPU.PC++;
@@ -722,28 +722,28 @@ void Apu0D(void)
void Apu2D(void)
{
- // PUSH A
+ /* PUSH A */
Push(IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu4D(void)
{
- // PUSH X
+ /* PUSH X */
Push(IAPU.Registers.X);
IAPU.PC++;
}
void Apu6D(void)
{
- // PUSH Y
+ /* PUSH Y */
Push(IAPU.Registers.YA.B.Y);
IAPU.PC++;
}
void Apu8E(void)
{
- // POP PSW
+ /* POP PSW */
Pop(IAPU.Registers.P);
S9xAPUUnpackStatus();
if (APUCheckDirectPage())
@@ -755,28 +755,28 @@ void Apu8E(void)
void ApuAE(void)
{
- // POP A
+ /* POP A */
Pop(IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void ApuCE(void)
{
- // POP X
+ /* POP X */
Pop(IAPU.Registers.X);
IAPU.PC++;
}
void ApuEE(void)
{
- // POP Y
+ /* POP Y */
Pop(IAPU.Registers.YA.B.Y);
IAPU.PC++;
}
void Apu0E(void)
{
- // TSET1 abs
+ /* TSET1 abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
S9xAPUSetByte(Work8 | IAPU.Registers.YA.B.A, IAPU.Address);
@@ -787,7 +787,7 @@ void Apu0E(void)
void Apu4E(void)
{
- // TCLR1 abs
+ /* TCLR1 abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
S9xAPUSetByte(Work8 & ~IAPU.Registers.YA.B.A, IAPU.Address);
@@ -798,7 +798,7 @@ void Apu4E(void)
void Apu0F(void)
{
- // BRK
+ /* BRK */
PushW(IAPU.PC + 1 - IAPU.RAM);
S9xAPUPackStatus();
Push(IAPU.Registers.P);
@@ -809,22 +809,22 @@ void Apu0F(void)
void ApuEF(void)
{
- // SLEEP
+ /* SLEEP */
APU.TimerEnabled[0] = APU.TimerEnabled[1] = APU.TimerEnabled[2] = false;
IAPU.APUExecuting = false;
}
void ApuFF(void)
{
- // STOP
+ /* STOP */
APU.TimerEnabled[0] = APU.TimerEnabled[1] = APU.TimerEnabled[2] = false;
IAPU.APUExecuting = false;
- Settings.APUEnabled = false; // re-enabled on next APU reset
+ Settings.APUEnabled = false; /* re-enabled on next APU reset */
}
void Apu10(void)
{
- // BPL
+ /* BPL */
Relative();
if (!APUCheckNegative())
{
@@ -838,7 +838,7 @@ void Apu10(void)
void Apu30(void)
{
- // BMI
+ /* BMI */
Relative();
if (APUCheckNegative())
{
@@ -852,7 +852,7 @@ void Apu30(void)
void Apu90(void)
{
- // BCC
+ /* BCC */
Relative();
if (!APUCheckCarry())
{
@@ -866,7 +866,7 @@ void Apu90(void)
void ApuB0(void)
{
- // BCS
+ /* BCS */
Relative();
if (APUCheckCarry())
{
@@ -880,7 +880,7 @@ void ApuB0(void)
void ApuD0(void)
{
- // BNE
+ /* BNE */
Relative();
if (!APUCheckZero())
{
@@ -894,7 +894,7 @@ void ApuD0(void)
void ApuF0(void)
{
- // BEQ
+ /* BEQ */
Relative();
if (APUCheckZero())
{
@@ -908,7 +908,7 @@ void ApuF0(void)
void Apu50(void)
{
- // BVC
+ /* BVC */
Relative();
if (!APUCheckOverflow())
{
@@ -921,7 +921,7 @@ void Apu50(void)
void Apu70(void)
{
- // BVS
+ /* BVS */
Relative();
if (APUCheckOverflow())
{
@@ -934,28 +934,28 @@ void Apu70(void)
void Apu2F(void)
{
- // BRA
+ /* BRA */
Relative();
IAPU.PC = IAPU.RAM + (uint16_t) Int16;
}
void Apu80(void)
{
- // SETC
+ /* SETC */
APUSetCarry();
IAPU.PC++;
}
void ApuED(void)
{
- // NOTC
+ /* NOTC */
IAPU._Carry ^= 1;
IAPU.PC++;
}
void Apu40(void)
{
- // SETP
+ /* SETP */
APUSetDirectPage();
IAPU.DirectPage = IAPU.RAM + 0x100;
IAPU.PC++;
@@ -963,7 +963,7 @@ void Apu40(void)
void Apu1A(void)
{
- // DECW dp
+ /* DECW dp */
Work16 = S9xAPUGetByteZ(OP1) + (S9xAPUGetByteZ(OP1 + 1) << 8) - 1;
S9xAPUSetByteZ((uint8_t) Work16, OP1);
S9xAPUSetByteZ(Work16 >> 8, OP1 + 1);
@@ -973,7 +973,7 @@ void Apu1A(void)
void Apu5A(void)
{
- // CMPW YA,dp
+ /* CMPW YA,dp */
Work16 = S9xAPUGetByteZ(OP1) + (S9xAPUGetByteZ(OP1 + 1) << 8);
Int32 = (int32_t) IAPU.Registers.YA.W - (int32_t) Work16;
IAPU._Carry = Int32 >= 0;
@@ -983,7 +983,7 @@ void Apu5A(void)
void Apu3A(void)
{
- // INCW dp
+ /* INCW dp */
Work16 = S9xAPUGetByteZ(OP1) + (S9xAPUGetByteZ(OP1 + 1) << 8) + 1;
S9xAPUSetByteZ((uint8_t) Work16, OP1);
S9xAPUSetByteZ(Work16 >> 8, OP1 + 1);
@@ -993,7 +993,7 @@ void Apu3A(void)
void Apu7A(void)
{
- // ADDW YA,dp
+ /* ADDW YA,dp */
Work16 = S9xAPUGetByteZ(OP1) + (S9xAPUGetByteZ(OP1 + 1) << 8);
Work32 = (uint32_t) IAPU.Registers.YA.W + Work16;
IAPU._Carry = Work32 >= 0x10000;
@@ -1011,7 +1011,7 @@ void Apu7A(void)
void Apu9A(void)
{
- // SUBW YA,dp
+ /* SUBW YA,dp */
Work16 = S9xAPUGetByteZ(OP1) + (S9xAPUGetByteZ(OP1 + 1) << 8);
Int32 = (int32_t) IAPU.Registers.YA.W - (int32_t) Work16;
APUClearHalfCarry();
@@ -1030,7 +1030,7 @@ void Apu9A(void)
void ApuBA(void)
{
- // MOVW YA,dp
+ /* MOVW YA,dp */
IAPU.Registers.YA.B.A = S9xAPUGetByteZ(OP1);
IAPU.Registers.YA.B.Y = S9xAPUGetByteZ(OP1 + 1);
APUSetZN16(IAPU.Registers.YA.W);
@@ -1039,7 +1039,7 @@ void ApuBA(void)
void ApuDA(void)
{
- // MOVW dp,YA
+ /* MOVW dp,YA */
S9xAPUSetByteZ(IAPU.Registers.YA.B.A, OP1);
S9xAPUSetByteZ(IAPU.Registers.YA.B.Y, OP1 + 1);
IAPU.PC += 2;
@@ -1047,7 +1047,7 @@ void ApuDA(void)
void Apu64(void)
{
- // CMP A,dp
+ /* CMP A,dp */
Work8 = S9xAPUGetByteZ(OP1);
CMP(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -1055,7 +1055,7 @@ void Apu64(void)
void Apu65(void)
{
- // CMP A,abs
+ /* CMP A,abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
CMP(IAPU.Registers.YA.B.A, Work8);
@@ -1064,7 +1064,7 @@ void Apu65(void)
void Apu66(void)
{
- // CMP A,(X)
+ /* CMP A,(X) */
Work8 = S9xAPUGetByteZ(IAPU.Registers.X);
CMP(IAPU.Registers.YA.B.A, Work8);
IAPU.PC++;
@@ -1072,7 +1072,7 @@ void Apu66(void)
void Apu67(void)
{
- // CMP A,(dp+X)
+ /* CMP A,(dp+X) */
IndexedXIndirect();
Work8 = S9xAPUGetByte(IAPU.Address);
CMP(IAPU.Registers.YA.B.A, Work8);
@@ -1081,7 +1081,7 @@ void Apu67(void)
void Apu68(void)
{
- // CMP A,#00
+ /* CMP A,#00 */
Work8 = OP1;
CMP(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -1089,7 +1089,7 @@ void Apu68(void)
void Apu69(void)
{
- // CMP dp(dest), dp(src)
+ /* CMP dp(dest), dp(src) */
W1 = S9xAPUGetByteZ(OP1);
Work8 = S9xAPUGetByteZ(OP2);
CMP(Work8, W1);
@@ -1098,7 +1098,7 @@ void Apu69(void)
void Apu74(void)
{
- // CMP A, dp+X
+ /* CMP A, dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
CMP(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -1106,7 +1106,7 @@ void Apu74(void)
void Apu75(void)
{
- // CMP A,abs+X
+ /* CMP A,abs+X */
AbsoluteX();
Work8 = S9xAPUGetByte(IAPU.Address);
CMP(IAPU.Registers.YA.B.A, Work8);
@@ -1115,7 +1115,7 @@ void Apu75(void)
void Apu76(void)
{
- // CMP A, abs+Y
+ /* CMP A, abs+Y */
AbsoluteY();
Work8 = S9xAPUGetByte(IAPU.Address);
CMP(IAPU.Registers.YA.B.A, Work8);
@@ -1124,7 +1124,7 @@ void Apu76(void)
void Apu77(void)
{
- // CMP A,(dp)+Y
+ /* CMP A,(dp)+Y */
IndirectIndexedY();
Work8 = S9xAPUGetByte(IAPU.Address);
CMP(IAPU.Registers.YA.B.A, Work8);
@@ -1133,7 +1133,7 @@ void Apu77(void)
void Apu78(void)
{
- // CMP dp,#00
+ /* CMP dp,#00 */
Work8 = OP1;
W1 = S9xAPUGetByteZ(OP2);
CMP(W1, Work8);
@@ -1142,7 +1142,7 @@ void Apu78(void)
void Apu79(void)
{
- // CMP (X),(Y)
+ /* CMP (X),(Y) */
W1 = S9xAPUGetByteZ(IAPU.Registers.X);
Work8 = S9xAPUGetByteZ(IAPU.Registers.YA.B.Y);
CMP(W1, Work8);
@@ -1151,7 +1151,7 @@ void Apu79(void)
void Apu1E(void)
{
- // CMP X,abs
+ /* CMP X,abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
CMP(IAPU.Registers.X, Work8);
@@ -1160,7 +1160,7 @@ void Apu1E(void)
void Apu3E(void)
{
- // CMP X,dp
+ /* CMP X,dp */
Work8 = S9xAPUGetByteZ(OP1);
CMP(IAPU.Registers.X, Work8);
IAPU.PC += 2;
@@ -1168,14 +1168,14 @@ void Apu3E(void)
void ApuC8(void)
{
- // CMP X,#00
+ /* CMP X,#00 */
CMP(IAPU.Registers.X, OP1);
IAPU.PC += 2;
}
void Apu5E(void)
{
- // CMP Y,abs
+ /* CMP Y,abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
CMP(IAPU.Registers.YA.B.Y, Work8);
@@ -1184,7 +1184,7 @@ void Apu5E(void)
void Apu7E(void)
{
- // CMP Y,dp
+ /* CMP Y,dp */
Work8 = S9xAPUGetByteZ(OP1);
CMP(IAPU.Registers.YA.B.Y, Work8);
IAPU.PC += 2;
@@ -1192,7 +1192,7 @@ void Apu7E(void)
void ApuAD(void)
{
- // CMP Y,#00
+ /* CMP Y,#00 */
Work8 = OP1;
CMP(IAPU.Registers.YA.B.Y, Work8);
IAPU.PC += 2;
@@ -1200,21 +1200,21 @@ void ApuAD(void)
void Apu1F(void)
{
- // JMP (abs+X)
+ /* JMP (abs+X) */
Absolute();
IAPU.PC = IAPU.RAM + S9xAPUGetByte(IAPU.Address + IAPU.Registers.X) + (S9xAPUGetByte(IAPU.Address + IAPU.Registers.X + 1) << 8);
}
void Apu5F(void)
{
- // JMP abs
+ /* JMP abs */
Absolute();
IAPU.PC = IAPU.RAM + IAPU.Address;
}
void Apu20(void)
{
- // CLRP
+ /* CLRP */
APUClearDirectPage();
IAPU.DirectPage = IAPU.RAM;
IAPU.PC++;
@@ -1222,14 +1222,14 @@ void Apu20(void)
void Apu60(void)
{
- // CLRC
+ /* CLRC */
APUClearCarry();
IAPU.PC++;
}
void ApuE0(void)
{
- // CLRV
+ /* CLRV */
APUClearHalfCarry();
APUClearOverflow();
IAPU.PC++;
@@ -1237,7 +1237,7 @@ void ApuE0(void)
void Apu24(void)
{
- // AND A,dp
+ /* AND A,dp */
IAPU.Registers.YA.B.A &= S9xAPUGetByteZ(OP1);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -1245,7 +1245,7 @@ void Apu24(void)
void Apu25(void)
{
- // AND A,abs
+ /* AND A,abs */
Absolute();
IAPU.Registers.YA.B.A &= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1254,7 +1254,7 @@ void Apu25(void)
void Apu26(void)
{
- // AND A,(X)
+ /* AND A,(X) */
IAPU.Registers.YA.B.A &= S9xAPUGetByteZ(IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -1262,7 +1262,7 @@ void Apu26(void)
void Apu27(void)
{
- // AND A,(dp+X)
+ /* AND A,(dp+X) */
IndexedXIndirect();
IAPU.Registers.YA.B.A &= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1271,7 +1271,7 @@ void Apu27(void)
void Apu28(void)
{
- // AND A,#00
+ /* AND A,#00 */
IAPU.Registers.YA.B.A &= OP1;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -1279,7 +1279,7 @@ void Apu28(void)
void Apu29(void)
{
- // AND dp(dest),dp(src)
+ /* AND dp(dest),dp(src) */
Work8 = S9xAPUGetByteZ(OP1);
Work8 &= S9xAPUGetByteZ(OP2);
S9xAPUSetByteZ(Work8, OP2);
@@ -1289,7 +1289,7 @@ void Apu29(void)
void Apu34(void)
{
- // AND A,dp+X
+ /* AND A,dp+X */
IAPU.Registers.YA.B.A &= S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -1297,7 +1297,7 @@ void Apu34(void)
void Apu35(void)
{
- // AND A,abs+X
+ /* AND A,abs+X */
AbsoluteX();
IAPU.Registers.YA.B.A &= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1306,7 +1306,7 @@ void Apu35(void)
void Apu36(void)
{
- // AND A,abs+Y
+ /* AND A,abs+Y */
AbsoluteY();
IAPU.Registers.YA.B.A &= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1315,7 +1315,7 @@ void Apu36(void)
void Apu37(void)
{
- // AND A,(dp)+Y
+ /* AND A,(dp)+Y */
IndirectIndexedY();
IAPU.Registers.YA.B.A &= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1324,7 +1324,7 @@ void Apu37(void)
void Apu38(void)
{
- // AND dp,#00
+ /* AND dp,#00 */
Work8 = OP1;
Work8 &= S9xAPUGetByteZ(OP2);
S9xAPUSetByteZ(Work8, OP2);
@@ -1334,7 +1334,7 @@ void Apu38(void)
void Apu39(void)
{
- // AND (X),(Y)
+ /* AND (X),(Y) */
Work8 = S9xAPUGetByteZ(IAPU.Registers.X) & S9xAPUGetByteZ(IAPU.Registers.YA.B.Y);
APUSetZN8(Work8);
S9xAPUSetByteZ(Work8, IAPU.Registers.X);
@@ -1343,7 +1343,7 @@ void Apu39(void)
void Apu2B(void)
{
- // ROL dp
+ /* ROL dp */
Work8 = S9xAPUGetByteZ(OP1);
ROL(Work8);
S9xAPUSetByteZ(Work8, OP1);
@@ -1352,7 +1352,7 @@ void Apu2B(void)
void Apu2C(void)
{
- // ROL abs
+ /* ROL abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
ROL(Work8);
@@ -1362,7 +1362,7 @@ void Apu2C(void)
void Apu3B(void)
{
- // ROL dp+X
+ /* ROL dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
ROL(Work8);
S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X);
@@ -1371,14 +1371,14 @@ void Apu3B(void)
void Apu3C(void)
{
- // ROL A
+ /* ROL A */
ROL(IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu2E(void)
{
- // CBNE dp,rel
+ /* CBNE dp,rel */
Work8 = OP1;
Relative2();
@@ -1394,7 +1394,7 @@ void Apu2E(void)
void ApuDE(void)
{
- // CBNE dp+X,rel
+ /* CBNE dp+X,rel */
Work8 = OP1 + IAPU.Registers.X;
Relative2();
@@ -1410,7 +1410,7 @@ void ApuDE(void)
void Apu3D(void)
{
- // INC X
+ /* INC X */
IAPU.Registers.X++;
APUSetZN8(IAPU.Registers.X);
IAPU.WaitCounter++;
@@ -1419,7 +1419,7 @@ void Apu3D(void)
void ApuFC(void)
{
- // INC Y
+ /* INC Y */
IAPU.Registers.YA.B.Y++;
APUSetZN8(IAPU.Registers.YA.B.Y);
IAPU.WaitCounter++;
@@ -1428,7 +1428,7 @@ void ApuFC(void)
void Apu1D(void)
{
- // DEC X
+ /* DEC X */
IAPU.Registers.X--;
APUSetZN8(IAPU.Registers.X);
IAPU.WaitCounter++;
@@ -1437,7 +1437,7 @@ void Apu1D(void)
void ApuDC(void)
{
- // DEC Y
+ /* DEC Y */
IAPU.Registers.YA.B.Y--;
APUSetZN8(IAPU.Registers.YA.B.Y);
IAPU.WaitCounter++;
@@ -1446,7 +1446,7 @@ void ApuDC(void)
void ApuAB(void)
{
- // INC dp
+ /* INC dp */
Work8 = S9xAPUGetByteZ(OP1) + 1;
S9xAPUSetByteZ(Work8, OP1);
APUSetZN8(Work8);
@@ -1456,7 +1456,7 @@ void ApuAB(void)
void ApuAC(void)
{
- // INC abs
+ /* INC abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address) + 1;
S9xAPUSetByte(Work8, IAPU.Address);
@@ -1467,7 +1467,7 @@ void ApuAC(void)
void ApuBB(void)
{
- // INC dp+X
+ /* INC dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X) + 1;
S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X);
APUSetZN8(Work8);
@@ -1477,7 +1477,7 @@ void ApuBB(void)
void ApuBC(void)
{
- // INC A
+ /* INC A */
IAPU.Registers.YA.B.A++;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.WaitCounter++;
@@ -1486,7 +1486,7 @@ void ApuBC(void)
void Apu8B(void)
{
- // DEC dp
+ /* DEC dp */
Work8 = S9xAPUGetByteZ(OP1) - 1;
S9xAPUSetByteZ(Work8, OP1);
APUSetZN8(Work8);
@@ -1496,7 +1496,7 @@ void Apu8B(void)
void Apu8C(void)
{
- // DEC abs
+ /* DEC abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address) - 1;
S9xAPUSetByte(Work8, IAPU.Address);
@@ -1507,7 +1507,7 @@ void Apu8C(void)
void Apu9B(void)
{
- // DEC dp+X
+ /* DEC dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X) - 1;
S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X);
APUSetZN8(Work8);
@@ -1517,7 +1517,7 @@ void Apu9B(void)
void Apu9C(void)
{
- // DEC A
+ /* DEC A */
IAPU.Registers.YA.B.A--;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.WaitCounter++;
@@ -1526,7 +1526,7 @@ void Apu9C(void)
void Apu44(void)
{
- // EOR A,dp
+ /* EOR A,dp */
IAPU.Registers.YA.B.A ^= S9xAPUGetByteZ(OP1);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -1534,7 +1534,7 @@ void Apu44(void)
void Apu45(void)
{
- // EOR A,abs
+ /* EOR A,abs */
Absolute();
IAPU.Registers.YA.B.A ^= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1543,7 +1543,7 @@ void Apu45(void)
void Apu46(void)
{
- // EOR A,(X)
+ /* EOR A,(X) */
IAPU.Registers.YA.B.A ^= S9xAPUGetByteZ(IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -1551,7 +1551,7 @@ void Apu46(void)
void Apu47(void)
{
- // EOR A,(dp+X)
+ /* EOR A,(dp+X) */
IndexedXIndirect();
IAPU.Registers.YA.B.A ^= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1560,7 +1560,7 @@ void Apu47(void)
void Apu48(void)
{
- // EOR A,#00
+ /* EOR A,#00 */
IAPU.Registers.YA.B.A ^= OP1;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -1568,7 +1568,7 @@ void Apu48(void)
void Apu49(void)
{
- // EOR dp(dest),dp(src)
+ /* EOR dp(dest),dp(src) */
Work8 = S9xAPUGetByteZ(OP1);
Work8 ^= S9xAPUGetByteZ(OP2);
S9xAPUSetByteZ(Work8, OP2);
@@ -1578,7 +1578,7 @@ void Apu49(void)
void Apu54(void)
{
- // EOR A,dp+X
+ /* EOR A,dp+X */
IAPU.Registers.YA.B.A ^= S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -1586,7 +1586,7 @@ void Apu54(void)
void Apu55(void)
{
- // EOR A,abs+X
+ /* EOR A,abs+X */
AbsoluteX();
IAPU.Registers.YA.B.A ^= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1595,7 +1595,7 @@ void Apu55(void)
void Apu56(void)
{
- // EOR A,abs+Y
+ /* EOR A,abs+Y */
AbsoluteY();
IAPU.Registers.YA.B.A ^= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1604,7 +1604,7 @@ void Apu56(void)
void Apu57(void)
{
- // EOR A,(dp)+Y
+ /* EOR A,(dp)+Y */
IndirectIndexedY();
IAPU.Registers.YA.B.A ^= S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -1613,7 +1613,7 @@ void Apu57(void)
void Apu58(void)
{
- // EOR dp,#00
+ /* EOR dp,#00 */
Work8 = OP1;
Work8 ^= S9xAPUGetByteZ(OP2);
S9xAPUSetByteZ(Work8, OP2);
@@ -1623,7 +1623,7 @@ void Apu58(void)
void Apu59(void)
{
- // EOR (X),(Y)
+ /* EOR (X),(Y) */
Work8 = S9xAPUGetByteZ(IAPU.Registers.X) ^ S9xAPUGetByteZ(IAPU.Registers.YA.B.Y);
APUSetZN8(Work8);
S9xAPUSetByteZ(Work8, IAPU.Registers.X);
@@ -1632,7 +1632,7 @@ void Apu59(void)
void Apu4B(void)
{
- // LSR dp
+ /* LSR dp */
Work8 = S9xAPUGetByteZ(OP1);
LSR(Work8);
S9xAPUSetByteZ(Work8, OP1);
@@ -1641,7 +1641,7 @@ void Apu4B(void)
void Apu4C(void)
{
- // LSR abs
+ /* LSR abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
LSR(Work8);
@@ -1651,7 +1651,7 @@ void Apu4C(void)
void Apu5B(void)
{
- // LSR dp+X
+ /* LSR dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
LSR(Work8);
S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X);
@@ -1660,14 +1660,14 @@ void Apu5B(void)
void Apu5C(void)
{
- // LSR A
+ /* LSR A */
LSR(IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu7D(void)
{
- // MOV A,X
+ /* MOV A,X */
IAPU.Registers.YA.B.A = IAPU.Registers.X;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -1675,7 +1675,7 @@ void Apu7D(void)
void ApuDD(void)
{
- // MOV A,Y
+ /* MOV A,Y */
IAPU.Registers.YA.B.A = IAPU.Registers.YA.B.Y;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -1683,7 +1683,7 @@ void ApuDD(void)
void Apu5D(void)
{
- // MOV X,A
+ /* MOV X,A */
IAPU.Registers.X = IAPU.Registers.YA.B.A;
APUSetZN8(IAPU.Registers.X);
IAPU.PC++;
@@ -1691,7 +1691,7 @@ void Apu5D(void)
void ApuFD(void)
{
- // MOV Y,A
+ /* MOV Y,A */
IAPU.Registers.YA.B.Y = IAPU.Registers.YA.B.A;
APUSetZN8(IAPU.Registers.YA.B.Y);
IAPU.PC++;
@@ -1699,7 +1699,7 @@ void ApuFD(void)
void Apu9D(void)
{
- //MOV X,SP
+ /* MOV X,SP */
IAPU.Registers.X = IAPU.Registers.S;
APUSetZN8(IAPU.Registers.X);
IAPU.PC++;
@@ -1707,14 +1707,14 @@ void Apu9D(void)
void ApuBD(void)
{
- // MOV SP,X
+ /* MOV SP,X */
IAPU.Registers.S = IAPU.Registers.X;
IAPU.PC++;
}
void Apu6B(void)
{
- // ROR dp
+ /* ROR dp */
Work8 = S9xAPUGetByteZ(OP1);
ROR(Work8);
S9xAPUSetByteZ(Work8, OP1);
@@ -1723,7 +1723,7 @@ void Apu6B(void)
void Apu6C(void)
{
- // ROR abs
+ /* ROR abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
ROR(Work8);
@@ -1733,7 +1733,7 @@ void Apu6C(void)
void Apu7B(void)
{
- // ROR dp+X
+ /* ROR dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
ROR(Work8);
S9xAPUSetByteZ(Work8, OP1 + IAPU.Registers.X);
@@ -1742,14 +1742,14 @@ void Apu7B(void)
void Apu7C(void)
{
- // ROR A
+ /* ROR A */
ROR(IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu6E(void)
{
- // DBNZ dp,rel
+ /* DBNZ dp,rel */
Work8 = OP1;
Relative2();
W1 = S9xAPUGetByteZ(Work8) - 1;
@@ -1765,7 +1765,7 @@ void Apu6E(void)
void ApuFE(void)
{
- // DBNZ Y,rel
+ /* DBNZ Y,rel */
Relative();
IAPU.Registers.YA.B.Y--;
if (IAPU.Registers.YA.B.Y != 0)
@@ -1779,14 +1779,14 @@ void ApuFE(void)
void Apu6F(void)
{
- // RET
+ /* RET */
PopW(IAPU.Registers.PC);
IAPU.PC = IAPU.RAM + IAPU.Registers.PC;
}
void Apu7F(void)
{
- // RETI
+ /* RETI */
Pop(IAPU.Registers.P);
S9xAPUUnpackStatus();
PopW(IAPU.Registers.PC);
@@ -1795,7 +1795,7 @@ void Apu7F(void)
void Apu84(void)
{
- // ADC A,dp
+ /* ADC A,dp */
Work8 = S9xAPUGetByteZ(OP1);
ADC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -1803,7 +1803,7 @@ void Apu84(void)
void Apu85(void)
{
- // ADC A, abs
+ /* ADC A, abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
ADC(IAPU.Registers.YA.B.A, Work8);
@@ -1812,7 +1812,7 @@ void Apu85(void)
void Apu86(void)
{
- // ADC A,(X)
+ /* ADC A,(X) */
Work8 = S9xAPUGetByteZ(IAPU.Registers.X);
ADC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC++;
@@ -1820,7 +1820,7 @@ void Apu86(void)
void Apu87(void)
{
- // ADC A,(dp+X)
+ /* ADC A,(dp+X) */
IndexedXIndirect();
Work8 = S9xAPUGetByte(IAPU.Address);
ADC(IAPU.Registers.YA.B.A, Work8);
@@ -1829,7 +1829,7 @@ void Apu87(void)
void Apu88(void)
{
- // ADC A,#00
+ /* ADC A,#00 */
Work8 = OP1;
ADC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -1837,7 +1837,7 @@ void Apu88(void)
void Apu89(void)
{
- // ADC dp(dest),dp(src)
+ /* ADC dp(dest),dp(src) */
Work8 = S9xAPUGetByteZ(OP1);
W1 = S9xAPUGetByteZ(OP2);
ADC(W1, Work8);
@@ -1847,7 +1847,7 @@ void Apu89(void)
void Apu94(void)
{
- // ADC A,dp+X
+ /* ADC A,dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
ADC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -1855,7 +1855,7 @@ void Apu94(void)
void Apu95(void)
{
- // ADC A, abs+X
+ /* ADC A, abs+X */
AbsoluteX();
Work8 = S9xAPUGetByte(IAPU.Address);
ADC(IAPU.Registers.YA.B.A, Work8);
@@ -1864,7 +1864,7 @@ void Apu95(void)
void Apu96(void)
{
- // ADC A, abs+Y
+ /* ADC A, abs+Y */
AbsoluteY();
Work8 = S9xAPUGetByte(IAPU.Address);
ADC(IAPU.Registers.YA.B.A, Work8);
@@ -1873,7 +1873,7 @@ void Apu96(void)
void Apu97(void)
{
- // ADC A, (dp)+Y
+ /* ADC A, (dp)+Y */
IndirectIndexedY();
Work8 = S9xAPUGetByte(IAPU.Address);
ADC(IAPU.Registers.YA.B.A, Work8);
@@ -1882,7 +1882,7 @@ void Apu97(void)
void Apu98(void)
{
- // ADC dp,#00
+ /* ADC dp,#00 */
Work8 = OP1;
W1 = S9xAPUGetByteZ(OP2);
ADC(W1, Work8);
@@ -1892,7 +1892,7 @@ void Apu98(void)
void Apu99(void)
{
- // ADC (X),(Y)
+ /* ADC (X),(Y) */
W1 = S9xAPUGetByteZ(IAPU.Registers.X);
Work8 = S9xAPUGetByteZ(IAPU.Registers.YA.B.Y);
ADC(W1, Work8);
@@ -1902,7 +1902,7 @@ void Apu99(void)
void Apu8D(void)
{
- // MOV Y,#00
+ /* MOV Y,#00 */
IAPU.Registers.YA.B.Y = OP1;
APUSetZN8(IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
@@ -1910,7 +1910,7 @@ void Apu8D(void)
void Apu8F(void)
{
- // MOV dp,#00
+ /* MOV dp,#00 */
Work8 = OP1;
S9xAPUSetByteZ(Work8, OP2);
IAPU.PC += 3;
@@ -1918,7 +1918,7 @@ void Apu8F(void)
void Apu9E(void)
{
- // DIV YA,X
+ /* DIV YA,X */
if ((IAPU.Registers.X & 0x0f) <= (IAPU.Registers.YA.B.Y & 0x0f))
APUSetHalfCarry();
else
@@ -1952,7 +1952,7 @@ void Apu9E(void)
void Apu9F(void)
{
- // XCN A
+ /* XCN A */
IAPU.Registers.YA.B.A = (IAPU.Registers.YA.B.A >> 4) | (IAPU.Registers.YA.B.A << 4);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -1960,7 +1960,7 @@ void Apu9F(void)
void ApuA4(void)
{
- // SBC A, dp
+ /* SBC A, dp */
Work8 = S9xAPUGetByteZ(OP1);
SBC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -1968,7 +1968,7 @@ void ApuA4(void)
void ApuA5(void)
{
- // SBC A, abs
+ /* SBC A, abs */
Absolute();
Work8 = S9xAPUGetByte(IAPU.Address);
SBC(IAPU.Registers.YA.B.A, Work8);
@@ -1977,7 +1977,7 @@ void ApuA5(void)
void ApuA6(void)
{
- // SBC A, (X)
+ /* SBC A, (X) */
Work8 = S9xAPUGetByteZ(IAPU.Registers.X);
SBC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC++;
@@ -1985,7 +1985,7 @@ void ApuA6(void)
void ApuA7(void)
{
- // SBC A,(dp+X)
+ /* SBC A,(dp+X) */
IndexedXIndirect();
Work8 = S9xAPUGetByte(IAPU.Address);
SBC(IAPU.Registers.YA.B.A, Work8);
@@ -1994,7 +1994,7 @@ void ApuA7(void)
void ApuA8(void)
{
- // SBC A,#00
+ /* SBC A,#00 */
Work8 = OP1;
SBC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -2002,7 +2002,7 @@ void ApuA8(void)
void ApuA9(void)
{
- // SBC dp(dest), dp(src)
+ /* SBC dp(dest), dp(src) */
Work8 = S9xAPUGetByteZ(OP1);
W1 = S9xAPUGetByteZ(OP2);
SBC(W1, Work8);
@@ -2012,7 +2012,7 @@ void ApuA9(void)
void ApuB4(void)
{
- // SBC A, dp+X
+ /* SBC A, dp+X */
Work8 = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
SBC(IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
@@ -2020,7 +2020,7 @@ void ApuB4(void)
void ApuB5(void)
{
- // SBC A,abs+X
+ /* SBC A,abs+X */
AbsoluteX();
Work8 = S9xAPUGetByte(IAPU.Address);
SBC(IAPU.Registers.YA.B.A, Work8);
@@ -2029,7 +2029,7 @@ void ApuB5(void)
void ApuB6(void)
{
- // SBC A,abs+Y
+ /* SBC A,abs+Y */
AbsoluteY();
Work8 = S9xAPUGetByte(IAPU.Address);
SBC(IAPU.Registers.YA.B.A, Work8);
@@ -2038,7 +2038,7 @@ void ApuB6(void)
void ApuB7(void)
{
- // SBC A,(dp)+Y
+ /* SBC A,(dp)+Y */
IndirectIndexedY();
Work8 = S9xAPUGetByte(IAPU.Address);
SBC(IAPU.Registers.YA.B.A, Work8);
@@ -2047,7 +2047,7 @@ void ApuB7(void)
void ApuB8(void)
{
- // SBC dp,#00
+ /* SBC dp,#00 */
Work8 = OP1;
W1 = S9xAPUGetByteZ(OP2);
SBC(W1, Work8);
@@ -2057,7 +2057,7 @@ void ApuB8(void)
void ApuB9(void)
{
- // SBC (X),(Y)
+ /* SBC (X),(Y) */
W1 = S9xAPUGetByteZ(IAPU.Registers.X);
Work8 = S9xAPUGetByteZ(IAPU.Registers.YA.B.Y);
SBC(W1, Work8);
@@ -2067,14 +2067,14 @@ void ApuB9(void)
void ApuAF(void)
{
- // MOV (X)+, A
+ /* MOV (X)+, A */
S9xAPUSetByteZ(IAPU.Registers.YA.B.A, IAPU.Registers.X++);
IAPU.PC++;
}
void ApuBE(void)
{
- // DAS
+ /* DAS */
if (IAPU.Registers.YA.B.A > 0x99 || !IAPU._Carry)
{
IAPU.Registers.YA.B.A -= 0x60;
@@ -2092,7 +2092,7 @@ void ApuBE(void)
void ApuBF(void)
{
- // MOV A,(X)+
+ /* MOV A,(X)+ */
IAPU.Registers.YA.B.A = S9xAPUGetByteZ(IAPU.Registers.X++);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -2100,28 +2100,28 @@ void ApuBF(void)
void ApuC0(void)
{
- // DI
+ /* DI */
APUClearInterrupt();
IAPU.PC++;
}
void ApuA0(void)
{
- // EI
+ /* EI */
APUSetInterrupt();
IAPU.PC++;
}
void ApuC4(void)
{
- // MOV dp,A
+ /* MOV dp,A */
S9xAPUSetByteZ(IAPU.Registers.YA.B.A, OP1);
IAPU.PC += 2;
}
void ApuC5(void)
{
- // MOV abs,A
+ /* MOV abs,A */
Absolute();
S9xAPUSetByte(IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 3;
@@ -2129,14 +2129,14 @@ void ApuC5(void)
void ApuC6(void)
{
- // MOV (X), A
+ /* MOV (X), A */
S9xAPUSetByteZ(IAPU.Registers.YA.B.A, IAPU.Registers.X);
IAPU.PC++;
}
void ApuC7(void)
{
- // MOV (dp+X),A
+ /* MOV (dp+X),A */
IndexedXIndirect();
S9xAPUSetByte(IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 2;
@@ -2144,7 +2144,7 @@ void ApuC7(void)
void ApuC9(void)
{
- // MOV abs,X
+ /* MOV abs,X */
Absolute();
S9xAPUSetByte(IAPU.Registers.X, IAPU.Address);
IAPU.PC += 3;
@@ -2152,14 +2152,14 @@ void ApuC9(void)
void ApuCB(void)
{
- // MOV dp,Y
+ /* MOV dp,Y */
S9xAPUSetByteZ(IAPU.Registers.YA.B.Y, OP1);
IAPU.PC += 2;
}
void ApuCC(void)
{
- // MOV abs,Y
+ /* MOV abs,Y */
Absolute();
S9xAPUSetByte(IAPU.Registers.YA.B.Y, IAPU.Address);
IAPU.PC += 3;
@@ -2167,7 +2167,7 @@ void ApuCC(void)
void ApuCD(void)
{
- // MOV X,#00
+ /* MOV X,#00 */
IAPU.Registers.X = OP1;
APUSetZN8(IAPU.Registers.X);
IAPU.PC += 2;
@@ -2175,7 +2175,7 @@ void ApuCD(void)
void ApuCF(void)
{
- // MUL YA
+ /* MUL YA */
IAPU.Registers.YA.W = (uint16_t) IAPU.Registers.YA.B.A * IAPU.Registers.YA.B.Y;
APUSetZN8(IAPU.Registers.YA.B.Y);
IAPU.PC++;
@@ -2183,14 +2183,14 @@ void ApuCF(void)
void ApuD4(void)
{
- // MOV dp+X, A
+ /* MOV dp+X, A */
S9xAPUSetByteZ(IAPU.Registers.YA.B.A, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
void ApuD5(void)
{
- // MOV abs+X,A
+ /* MOV abs+X,A */
AbsoluteX();
S9xAPUSetByte(IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 3;
@@ -2198,7 +2198,7 @@ void ApuD5(void)
void ApuD6(void)
{
- // MOV abs+Y,A
+ /* MOV abs+Y,A */
AbsoluteY();
S9xAPUSetByte(IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 3;
@@ -2206,7 +2206,7 @@ void ApuD6(void)
void ApuD7(void)
{
- // MOV (dp)+Y,A
+ /* MOV (dp)+Y,A */
IndirectIndexedY();
S9xAPUSetByte(IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 2;
@@ -2214,28 +2214,28 @@ void ApuD7(void)
void ApuD8(void)
{
- // MOV dp,X
+ /* MOV dp,X */
S9xAPUSetByteZ(IAPU.Registers.X, OP1);
IAPU.PC += 2;
}
void ApuD9(void)
{
- // MOV dp+Y,X
+ /* MOV dp+Y,X */
S9xAPUSetByteZ(IAPU.Registers.X, OP1 + IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
}
void ApuDB(void)
{
- // MOV dp+X,Y
+ /* MOV dp+X,Y */
S9xAPUSetByteZ(IAPU.Registers.YA.B.Y, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
void ApuDF(void)
{
- // DAA
+ /* DAA */
if (IAPU.Registers.YA.B.A > 0x99 || IAPU._Carry)
{
IAPU.Registers.YA.B.A += 0x60;
@@ -2253,7 +2253,7 @@ void ApuDF(void)
void ApuE4(void)
{
- // MOV A, dp
+ /* MOV A, dp */
IAPU.Registers.YA.B.A = S9xAPUGetByteZ(OP1);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -2261,7 +2261,7 @@ void ApuE4(void)
void ApuE5(void)
{
- // MOV A,abs
+ /* MOV A,abs */
Absolute();
IAPU.Registers.YA.B.A = S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -2270,7 +2270,7 @@ void ApuE5(void)
void ApuE6(void)
{
- // MOV A,(X)
+ /* MOV A,(X) */
IAPU.Registers.YA.B.A = S9xAPUGetByteZ(IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC++;
@@ -2278,7 +2278,7 @@ void ApuE6(void)
void ApuE7(void)
{
- // MOV A,(dp+X)
+ /* MOV A,(dp+X) */
IndexedXIndirect();
IAPU.Registers.YA.B.A = S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -2287,7 +2287,7 @@ void ApuE7(void)
void ApuE8(void)
{
- // MOV A,#00
+ /* MOV A,#00 */
IAPU.Registers.YA.B.A = OP1;
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -2295,7 +2295,7 @@ void ApuE8(void)
void ApuE9(void)
{
- // MOV X, abs
+ /* MOV X, abs */
Absolute();
IAPU.Registers.X = S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.X);
@@ -2304,7 +2304,7 @@ void ApuE9(void)
void ApuEB(void)
{
- // MOV Y,dp
+ /* MOV Y,dp */
IAPU.Registers.YA.B.Y = S9xAPUGetByteZ(OP1);
APUSetZN8(IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
@@ -2312,7 +2312,7 @@ void ApuEB(void)
void ApuEC(void)
{
- // MOV Y,abs
+ /* MOV Y,abs */
Absolute();
IAPU.Registers.YA.B.Y = S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.Y);
@@ -2321,7 +2321,7 @@ void ApuEC(void)
void ApuF4(void)
{
- // MOV A, dp+X
+ /* MOV A, dp+X */
IAPU.Registers.YA.B.A = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.A);
IAPU.PC += 2;
@@ -2329,7 +2329,7 @@ void ApuF4(void)
void ApuF5(void)
{
- // MOV A, abs+X
+ /* MOV A, abs+X */
AbsoluteX();
IAPU.Registers.YA.B.A = S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -2338,7 +2338,7 @@ void ApuF5(void)
void ApuF6(void)
{
- // MOV A, abs+Y
+ /* MOV A, abs+Y */
AbsoluteY();
IAPU.Registers.YA.B.A = S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -2347,7 +2347,7 @@ void ApuF6(void)
void ApuF7(void)
{
- // MOV A, (dp)+Y
+ /* MOV A, (dp)+Y */
IndirectIndexedY();
IAPU.Registers.YA.B.A = S9xAPUGetByte(IAPU.Address);
APUSetZN8(IAPU.Registers.YA.B.A);
@@ -2356,7 +2356,7 @@ void ApuF7(void)
void ApuF8(void)
{
- // MOV X,dp
+ /* MOV X,dp */
IAPU.Registers.X = S9xAPUGetByteZ(OP1);
APUSetZN8(IAPU.Registers.X);
IAPU.PC += 2;
@@ -2364,7 +2364,7 @@ void ApuF8(void)
void ApuF9(void)
{
- // MOV X,dp+Y
+ /* MOV X,dp+Y */
IAPU.Registers.X = S9xAPUGetByteZ(OP1 + IAPU.Registers.YA.B.Y);
APUSetZN8(IAPU.Registers.X);
IAPU.PC += 2;
@@ -2372,14 +2372,14 @@ void ApuF9(void)
void ApuFA(void)
{
- // MOV dp(dest),dp(src)
+ /* MOV dp(dest),dp(src) */
S9xAPUSetByteZ(S9xAPUGetByteZ(OP1), OP2);
IAPU.PC += 3;
}
void ApuFB(void)
{
- // MOV Y,dp+X
+ /* MOV Y,dp+X */
IAPU.Registers.YA.B.Y = S9xAPUGetByteZ(OP1 + IAPU.Registers.X);
APUSetZN8(IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
diff --git a/source/spc7110.c b/source/spc7110.c
index 7ed339d..ac8e0a8 100644
--- a/source/spc7110.c
+++ b/source/spc7110.c
@@ -7,14 +7,14 @@
const char* S9xGetFilename(const char*);
-SPC7110Regs s7r; // SPC7110 registers, about 33KB
-S7RTC rtc_f9; // FEOEZ (and Shounen Jump no SHou) RTC
-void S9xUpdateRTC(void); // S-RTC function hacked to work with the RTC
+SPC7110Regs s7r; /* SPC7110 registers, about 33KB */
+S7RTC rtc_f9; /* FEOEZ (and Shounen Jump no SHou) RTC */
+void S9xUpdateRTC(void); /* S-RTC function hacked to work with the RTC */
-void S9xSpc7110Init(void) // Emulate power on state
+void S9xSpc7110Init(void) /* Emulate power on state */
{
spc7110dec_init();
- s7r.DataRomOffset = 0x00100000; //handy constant!
+ s7r.DataRomOffset = 0x00100000; /* handy constant! */
s7r.DataRomSize = Memory.CalculatedSize - s7r.DataRomOffset;
s7r.reg4800 = 0;
s7r.reg4801 = 0;
@@ -68,17 +68,17 @@ void S9xSpc7110Init(void) // Emulate power on state
memset(s7r.bank50, 0x00, DECOMP_BUFFER_SIZE);
}
-//reads SPC7110 and RTC registers.
+/* reads SPC7110 and RTC registers. */
uint8_t S9xGetSPC7110(uint16_t Address)
{
switch (Address)
{
- //decompressed data read port. decrements 4809-A (with wrap)
- //4805-6 is the offset into the bank
- //AlignBy is set (afaik) at decompression time, and is the offset multiplier
- //bank50internal is an internal pointer to the actual byte to read.
- //so you read from offset*multiplier + bank50internal
- //the offset registers cannot be incremented due to the offset multiplier.
+ /* decompressed data read port. decrements 4809-A (with wrap) */
+ /* 4805-6 is the offset into the bank */
+ /* AlignBy is set (afaik) at decompression time, and is the offset multiplier */
+ /* bank50internal is an internal pointer to the actual byte to read. */
+ /* so you read from offset*multiplier + bank50internal */
+ /* the offset registers cannot be incremented due to the offset multiplier. */
case 0x4800:
{
uint16_t count = s7r.reg4809 | (s7r.reg480A << 8);
@@ -91,44 +91,44 @@ uint8_t S9xGetSPC7110(uint16_t Address)
s7r.reg4800 = spc7110dec_read();
return s7r.reg4800;
}
- case 0x4801: //table register low
+ case 0x4801: /* table register low */
return s7r.reg4801;
- case 0x4802: //table register middle
+ case 0x4802: /* table register middle */
return s7r.reg4802;
- case 0x4803: //table register high
+ case 0x4803: /* table register high */
return s7r.reg4803;
- case 0x4804: //index of pointer in table (each entry is 4 bytes)
+ case 0x4804: /* index of pointer in table (each entry is 4 bytes) */
return s7r.reg4804;
- case 0x4805: //offset register low
+ case 0x4805: /* offset register low */
return s7r.reg4805;
- case 0x4806: //offset register high
+ case 0x4806: /* offset register high */
return s7r.reg4806;
- //DMA channel (not that I see this usually set,
- //regardless of what channel DMA is on)
+ /* DMA channel (not that I see this usually set, */
+ /* regardless of what channel DMA is on) */
case 0x4807:
return s7r.reg4807;
- //C r/w option, unknown, defval:00 is what Dark Force says
- //afaict, Snes9x doesn't use this at all.
+ /* C r/w option, unknown, defval:00 is what Dark Force says */
+ /* afaict, Snes9x doesn't use this at all. */
case 0x4808:
return s7r.reg4808;
- //C-Length low
- //counts down the number of bytes left to read from the decompression buffer.
- //this is set by the ROM, and wraps on bounds.
+ /* C-Length low */
+ /* counts down the number of bytes left to read from the decompression buffer. */
+ /* this is set by the ROM, and wraps on bounds. */
case 0x4809:
return s7r.reg4809;
- case 0x480A: //C Length high
+ case 0x480A: /* C Length high */
return s7r.reg480A;
- //Offset enable.
- //if this is zero, 4805-6 are useless. Emulated by setting AlignBy to 0
+ /* Offset enable. */
+ /* if this is zero, 4805-6 are useless. Emulated by setting AlignBy to 0 */
case 0x480B:
return s7r.reg480B;
- case 0x480C: //decompression finished: just emulated by switching each read.
+ case 0x480C: /* decompression finished: just emulated by switching each read. */
s7r.reg480C ^= 0x80;
return s7r.reg480C ^ 0x80;
- //Data access port
- //reads from the data ROM (anywhere over the first 8 mbits
- //behavior is complex, will document later,
- //possibly missing cases, because of the number of switches in play
+ /* Data access port */
+ /* reads from the data ROM (anywhere over the first 8 mbits */
+ /* behavior is complex, will document later, */
+ /* possibly missing cases, because of the number of switches in play */
case 0x4810:
if (s7r.written == 0)
return 0;
@@ -196,7 +196,7 @@ uint8_t S9xGetSPC7110(uint16_t Address)
}
}
- //is signed
+ /* is signed */
}
else
{
@@ -260,26 +260,26 @@ uint8_t S9xGetSPC7110(uint16_t Address)
}
else
return 0;
- case 0x4811: //direct read address low
+ case 0x4811: /* direct read address low */
return s7r.reg4811;
- case 0x4812: //direct read address middle
+ case 0x4812: /* direct read address middle */
return s7r.reg4812;
- case 0x4813: //direct read access high
+ case 0x4813: /* direct read access high */
return s7r.reg4813;
- case 0x4814: //read adjust low
+ case 0x4814: /* read adjust low */
return s7r.reg4814;
- case 0x4815: //read adjust high
+ case 0x4815: /* read adjust high */
return s7r.reg4815;
- case 0x4816: //read increment low
+ case 0x4816: /* read increment low */
return s7r.reg4816;
- case 0x4817: //read increment high
+ case 0x4817: /* read increment high */
return s7r.reg4817;
- case 0x4818: //Data ROM command mode; essentially, this controls the insane code of $4810 and $481A
+ case 0x4818: /* Data ROM command mode; essentially, this controls the insane code of $4810 and $481A */
return s7r.reg4818;
- //read after adjust port
- //what this does, besides more nasty stuff like 4810,
- //I don't know. Just assume it is a different implementation of $4810,
- //if it helps your sanity
+ /* read after adjust port */
+ /* what this does, besides more nasty stuff like 4810, */
+ /* I don't know. Just assume it is a different implementation of $4810, */
+ /* if it helps your sanity */
case 0x481A:
if (s7r.written == 0x1F)
{
@@ -337,58 +337,58 @@ uint8_t S9xGetSPC7110(uint16_t Address)
}
else
return 0;
- case 0x4820: //multiplicand low or dividend lowest
+ case 0x4820: /* multiplicand low or dividend lowest */
return s7r.reg4820;
- case 0x4821: //multiplicand high or divdend lower
+ case 0x4821: /* multiplicand high or divdend lower */
return s7r.reg4821;
- case 0x4822: //dividend higher
+ case 0x4822: /* dividend higher */
return s7r.reg4822;
- case 0x4823: //dividend highest
+ case 0x4823: /* dividend highest */
return s7r.reg4823;
- case 0x4824: //multiplier low
+ case 0x4824: /* multiplier low */
return s7r.reg4824;
- case 0x4825: //multiplier high
+ case 0x4825: /* multiplier high */
return s7r.reg4825;
- case 0x4826: //divisor low
+ case 0x4826: /* divisor low */
return s7r.reg4826;
- case 0x4827: //divisor high
+ case 0x4827: /* divisor high */
return s7r.reg4827;
- case 0x4828: //result lowest
+ case 0x4828: /* result lowest */
return s7r.reg4828;
- case 0x4829: //result lower
+ case 0x4829: /* result lower */
return s7r.reg4829;
- case 0x482A: //result higher
+ case 0x482A: /* result higher */
return s7r.reg482A;
- case 0x482B: //result highest
+ case 0x482B: /* result highest */
return s7r.reg482B;
- case 0x482C: //remainder (division) low
+ case 0x482C: /* remainder (division) low */
return s7r.reg482C;
- case 0x482D: //remainder (division) high
+ case 0x482D: /* remainder (division) high */
return s7r.reg482D;
- case 0x482E: //signed/unsigned
+ case 0x482E: /* signed/unsigned */
return s7r.reg482E;
- case 0x482F: //finished flag, emulated as an on-read toggle.
+ case 0x482F: /* finished flag, emulated as an on-read toggle. */
if (s7r.reg482F)
{
s7r.reg482F = 0;
return 0x80;
}
return 0;
- case 0x4830: //SRAM toggle
+ case 0x4830: /* SRAM toggle */
return s7r.reg4830;
- case 0x4831: //DX bank mapping
+ case 0x4831: /* DX bank mapping */
return s7r.reg4831;
- case 0x4832: //EX bank mapping
+ case 0x4832: /* EX bank mapping */
return s7r.reg4832;
- case 0x4833: //FX bank mapping
+ case 0x4833: /* FX bank mapping */
return s7r.reg4833;
- case 0x4834: //SRAM mapping? We have no clue!
+ case 0x4834: /* SRAM mapping? We have no clue! */
return s7r.reg4834;
- case 0x4840: //RTC enable
+ case 0x4840: /* RTC enable */
if (!Settings.SPC7110RTC)
return Address >> 8;
return s7r.reg4840;
- case 0x4841: //command/index/value of RTC (essentially, zero unless we're in read mode
+ case 0x4841: /* command/index/value of RTC (essentially, zero unless we're in read mode */
if (!Settings.SPC7110RTC)
return Address >> 8;
if (rtc_f9.init)
@@ -401,7 +401,7 @@ uint8_t S9xGetSPC7110(uint16_t Address)
}
else
return 0;
- case 0x4842: //RTC done flag
+ case 0x4842: /* RTC done flag */
if (!Settings.SPC7110RTC)
return Address >> 8;
s7r.reg4842 ^= 0x80;
@@ -424,8 +424,8 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
{
switch (Address)
{
- //Writes to $4800 are undefined.
- case 0x4801: //table low, middle, and high.
+ /* Writes to $4800 are undefined. */
+ case 0x4801: /* table low, middle, and high. */
s7r.reg4801 = data;
break;
case 0x4802:
@@ -434,13 +434,13 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
case 0x4803:
s7r.reg4803 = data;
break;
- case 0x4804: //table index (4 byte entries, bigendian with a multiplier byte)
+ case 0x4804: /* table index (4 byte entries, bigendian with a multiplier byte) */
s7r.reg4804 = data;
break;
- case 0x4805: //offset low
+ case 0x4805: /* offset low */
s7r.reg4805 = data;
break;
- case 0x4806: //offset high, starts decompression
+ case 0x4806: /* offset high, starts decompression */
{
uint32_t table = (s7r.reg4801 + (s7r.reg4802 << 8) + (s7r.reg4803 << 16));
uint32_t index = (s7r.reg4804 << 2);
@@ -453,21 +453,21 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
s7r.reg480C &= 0x7F;
break;
}
- case 0x4807: //DMA channel register (Is it used??)
+ case 0x4807: /* DMA channel register (Is it used??) */
s7r.reg4807 = data;
break;
- //C r/w? I have no idea. If you get weird values written here before a bug,
- //The Dumper should probably be contacted about running a test.
+ /* C r/w? I have no idea. If you get weird values written here before a bug, */
+ /* The Dumper should probably be contacted about running a test. */
case 0x4808:
s7r.reg4808 = data;
break;
- case 0x4809: //C-Length low
+ case 0x4809: /* C-Length low */
s7r.reg4809 = data;
break;
- case 0x480A: //C-Length high
+ case 0x480A: /* C-Length high */
s7r.reg480A = data;
break;
- case 0x480B: //Offset enable
+ case 0x480B: /* Offset enable */
{
s7r.reg480B = data;
int32_t table = (s7r.reg4803 << 16) | (s7r.reg4802 << 8) | s7r.reg4801;
@@ -496,19 +496,19 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
}
break;
}
- case 0x4811: //Data port address low
+ case 0x4811: /* Data port address low */
s7r.reg4811 = data;
s7r.written |= 0x01;
break;
- case 0x4812: //data port address middle
+ case 0x4812: /* data port address middle */
s7r.reg4812 = data;
s7r.written |= 0x02;
break;
- case 0x4813: //data port address high
+ case 0x4813: /* data port address high */
s7r.reg4813 = data;
s7r.written |= 0x04;
break;
- case 0x4814: //data port adjust low (has a funky immediate increment mode)
+ case 0x4814: /* data port adjust low (has a funky immediate increment mode) */
s7r.reg4814 = data;
if (s7r.reg4818 & 0x02)
{
@@ -554,7 +554,7 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
s7r.written |= 0x08;
break;
- case 0x4815: //data port adjust high (has a funky immediate increment mode)
+ case 0x4815: /* data port adjust high (has a funky immediate increment mode) */
s7r.reg4815 = data;
if (s7r.reg4818 & 0x02)
{
@@ -600,36 +600,36 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
}
s7r.written |= 0x10;
break;
- case 0x4816: //data port increment low
+ case 0x4816: /* data port increment low */
s7r.reg4816 = data;
break;
- case 0x4817: //data port increment high
+ case 0x4817: /* data port increment high */
s7r.reg4817 = data;
break;
- //data port mode switches
- //note that it starts inactive.
+ /* data port mode switches */
+ /* note that it starts inactive. */
case 0x4818:
if ((s7r.written & 0x18) != 0x18)
break;
s7r.offset_add = 0;
s7r.reg4818 = data;
break;
- case 0x4820: //multiplicand low or dividend lowest
+ case 0x4820: /* multiplicand low or dividend lowest */
s7r.reg4820 = data;
break;
- case 0x4821: //multiplicand high or dividend lower
+ case 0x4821: /* multiplicand high or dividend lower */
s7r.reg4821 = data;
break;
- case 0x4822: //dividend higher
+ case 0x4822: /* dividend higher */
s7r.reg4822 = data;
break;
- case 0x4823: //dividend highest
+ case 0x4823: /* dividend highest */
s7r.reg4823 = data;
break;
- case 0x4824: //multiplier low
+ case 0x4824: /* multiplier low */
s7r.reg4824 = data;
break;
- case 0x4825: //multiplier high (triggers operation)
+ case 0x4825: /* multiplier high (triggers operation) */
s7r.reg4825 = data;
if (s7r.reg482E & 0x01)
{
@@ -653,10 +653,10 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
}
s7r.reg482F = 0x80;
break;
- case 0x4826: //divisor low
+ case 0x4826: /* divisor low */
s7r.reg4826 = data;
break;
- case 0x4827: //divisor high (triggers operation)
+ case 0x4827: /* divisor high (triggers operation) */
s7r.reg4827 = data;
if (s7r.reg482E & 0x01)
{
@@ -706,32 +706,32 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
}
s7r.reg482F = 0x80;
break;
- //result registers are possibly read-only
+ /* result registers are possibly read-only */
- //reset: writes here nuke the whole math unit
- //Zero indicates unsigned math, resets with non-zero values turn on signed math
+ /* reset: writes here nuke the whole math unit */
+ /* Zero indicates unsigned math, resets with non-zero values turn on signed math */
case 0x482E:
s7r.reg4820 = s7r.reg4821 = s7r.reg4822 = s7r.reg4823 = s7r.reg4824 = s7r.reg4825 = s7r.reg4826 = s7r.reg4827 = s7r.reg4828 = s7r.reg4829 = s7r.reg482A = s7r.reg482B = s7r.reg482C = s7r.reg482D = 0;
s7r.reg482E = data;
break;
- //math status register possibly read only
- case 0x4830: //SRAM toggle
+ /* math status register possibly read only */
+ case 0x4830: /* SRAM toggle */
SPC7110Sram(data);
s7r.reg4830 = data;
break;
- case 0x4831: //Bank DX mapping
+ case 0x4831: /* Bank DX mapping */
s7r.reg4831 = data;
break;
- case 0x4832: //Bank EX mapping
+ case 0x4832: /* Bank EX mapping */
s7r.reg4832 = data;
break;
- case 0x4833: //Bank FX mapping
+ case 0x4833: /* Bank FX mapping */
s7r.reg4833 = data;
break;
- case 0x4834: //S-RAM mapping? who knows?
+ case 0x4834: /* S-RAM mapping? who knows? */
s7r.reg4834 = data;
break;
- case 0x4840: //RTC Toggle
+ case 0x4840: /* RTC Toggle */
if(!data)
S9xUpdateRTC();
else if(data & 0x01)
@@ -742,7 +742,7 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
}
s7r.reg4840 = data;
break;
- case 0x4841: //RTC init/command/index register
+ case 0x4841: /* RTC init/command/index register */
if (rtc_f9.init)
{
if (rtc_f9.index == -1)
@@ -824,7 +824,7 @@ void S9xSetSPC7110(uint8_t data, uint16_t Address)
}
}
-//emulate the SPC7110's ability to remap banks Dx, Ex, and Fx.
+/* emulate the SPC7110's ability to remap banks Dx, Ex, and Fx. */
uint8_t S9xGetSPC7110Byte(uint32_t Address)
{
uint32_t i;
@@ -857,7 +857,7 @@ int32_t S9xRTCDaysInMonth(int32_t month, int32_t year)
switch(month)
{
case 2:
- if(year % 4 == 0) // DKJM2 only uses 199x - 22xx
+ if(year % 4 == 0) /* DKJM2 only uses 199x - 22xx */
return 29;
return 28;
case 4:
@@ -865,7 +865,7 @@ int32_t S9xRTCDaysInMonth(int32_t month, int32_t year)
case 9:
case 11:
return 30;
- default: // months 1,3,5,7,8,10,12
+ default: /* months 1,3,5,7,8,10,12 */
return 31;
}
}
@@ -884,18 +884,14 @@ void S9xUpdateRTC(void)
time_t cur_systime;
int32_t time_diff;
- // Keep track of game time by computing the number of seconds that pass on the system
- // clock and adding the same number of seconds to the RTC clock structure.
+ /* Keep track of game time by computing the number of seconds that pass on the system */
+ /* clock and adding the same number of seconds to the RTC clock structure. */
if (rtc_f9.init && 0 == (rtc_f9.reg[0x0D] & 0x01) && 0 == (rtc_f9.reg[0x0F] & 0x03))
{
cur_systime = time(NULL);
- // This method assumes one time_t clock tick is one second
- // which should work on PCs and GNU systems.
- // If your tick interval is different adjust the
- // DAYTICK, HOURTICK, and MINUTETICK defines
-
+ /* This method assumes one time_t clock tick is one second */
time_diff = (int32_t)(cur_systime - rtc_f9.last_used);
rtc_f9.last_used = cur_systime;
@@ -1003,7 +999,7 @@ void S9xUpdateRTC(void)
}
}
-//allows DMA from the ROM (is this even possible on the SPC7110?
+/* allows DMA from the ROM (is this even possible on the SPC7110? */
uint8_t* Get7110BasePtr(uint32_t Address)
{
uint32_t i;
@@ -1025,7 +1021,7 @@ uint8_t* Get7110BasePtr(uint32_t Address)
return &Memory.ROM[i];
}
-//Cache 1 clean up function
+/* Cache 1 clean up function */
void Del7110Gfx(void)
{
spc7110dec_deinit();
@@ -1033,7 +1029,7 @@ void Del7110Gfx(void)
Settings.SPC7110RTC = false;
}
-//emulate a reset.
+/* emulate a reset. */
void S9xSpc7110Reset(void)
{
s7r.reg4800 = 0;
diff --git a/source/spc7110dec.c b/source/spc7110dec.c
index f5dc963..9adb4d6 100644
--- a/source/spc7110dec.c
+++ b/source/spc7110dec.c
@@ -119,7 +119,7 @@ void spc7110dec_clear(uint32_t mode, uint32_t offset, uint32_t index)
decomp.buffer_length = 0;
uint32_t i;
- for(i = 0; i < 32; i++) // reset decomp.context states
+ for(i = 0; i < 32; i++) /* reset decomp.context states */
{
decomp.context[i].index = 0;
decomp.context[i].invert = 0;
@@ -138,7 +138,7 @@ void spc7110dec_clear(uint32_t mode, uint32_t offset, uint32_t index)
break;
}
- while(index--) // decompress up to requested output data index
+ while(index--) /* decompress up to requested output data index */
spc7110dec_read();
decomp.read_counter = 0;
@@ -178,13 +178,13 @@ void spc7110dec_mode0(bool init)
/* Get bit */
uint32_t flag_lps;
- if(val <= span - prob) // mps
+ if(val <= span - prob) /* mps */
{
span = span - prob;
out = (out << 1) + mps;
flag_lps = 0;
}
- else // lps
+ else /* lps */
{
val = val - (span - (prob - 1));
span = prob - 1;
@@ -316,12 +316,12 @@ void spc7110dec_mode1(bool init)
/* Get symbol */
uint32_t flag_lps;
- if(val <= span - prob) // mps
+ if(val <= span - prob) /* mps */
{
span = span - prob;
flag_lps = 0;
}
- else // lps
+ else /* lps */
{
val = val - (span - (prob - 1));
span = prob - 1;
@@ -466,12 +466,12 @@ void spc7110dec_mode2(bool init)
/* Get symbol */
uint32_t flag_lps;
- if(val <= span - prob) // mps
+ if(val <= span - prob) /* mps */
{
span = span - prob;
flag_lps = 0;
}
- else // lps
+ else /* lps */
{
val = val - (span - (prob - 1));
span = prob - 1;
diff --git a/source/srtc.c b/source/srtc.c
index 6427f0b..bdb2970 100644
--- a/source/srtc.c
+++ b/source/srtc.c
@@ -64,7 +64,7 @@ void S9xHardResetSRTC(void)
rtc.mode = MODE_READ;
rtc.count_enable = false;
rtc.needs_init = true;
- rtc.system_timestamp = time(NULL); // Get system timestamp
+ rtc.system_timestamp = time(NULL); /* Get system timestamp */
}
/**********************************************************************************************/
@@ -79,7 +79,7 @@ uint32_t S9xSRTCComputeDayOfWeek(void)
uint32_t day_of_week;
year += (rtc.data[11] - 9) * 100;
- // Range check the month for valid array indices
+ /* Range check the month for valid array indices */
if (month > 12)
month = 1;
@@ -130,9 +130,9 @@ void S9xUpdateSrtcTime(void)
time_t cur_systime;
int32_t time_diff;
- // Keep track of game time by computing the number of seconds that pass on the system
- // clock and adding the same number of seconds to the S-RTC clock structure.
- // Note: Dai Kaijyu Monogatari II only allows dates in the range 1996-21xx.
+ /* Keep track of game time by computing the number of seconds that pass on the system */
+ /* clock and adding the same number of seconds to the S-RTC clock structure. */
+ /* Note: Dai Kaijyu Monogatari II only allows dates in the range 1996-21xx. */
if (rtc.count_enable && !rtc.needs_init)
{
@@ -251,9 +251,9 @@ void S9xUpdateSrtcTime(void)
/**********************************************************************************************/
void S9xSetSRTC(uint8_t data, uint16_t Address)
{
- data &= 0x0F; // Data is only 4-bits, mask out unused bits.
+ data &= 0x0F; /* Data is only 4-bits, mask out unused bits. */
- if (data >= 0xD) // It's an RTC command
+ if (data >= 0xD) /* It's an RTC command */
{
switch (data)
{
@@ -277,12 +277,12 @@ void S9xSetSRTC(uint8_t data, uint16_t Address)
{
rtc.data[rtc.index++] = data;
- if (rtc.index == MAX_RTC_INDEX) // We have all the data for the RTC load
+ if (rtc.index == MAX_RTC_INDEX) /* We have all the data for the RTC load */
{
- rtc.system_timestamp = time(NULL); // Get local system time
- rtc.data[rtc.index++] = S9xSRTCComputeDayOfWeek(); // Get the day of the week
+ rtc.system_timestamp = time(NULL); /* Get local system time */
+ rtc.data[rtc.index++] = S9xSRTCComputeDayOfWeek(); /* Get the day of the week */
- // Start RTC counting again
+ /* Start RTC counting again */
rtc.count_enable = true;
rtc.needs_init = false;
}
@@ -295,18 +295,18 @@ void S9xSetSRTC(uint8_t data, uint16_t Address)
switch (data)
{
case COMMAND_CLEAR_RTC:
- rtc.count_enable = false; // Disable RTC counter
+ rtc.count_enable = false; /* Disable RTC counter */
memset(rtc.data, 0, MAX_RTC_INDEX + 1);
rtc.index = -1;
rtc.mode = MODE_COMMAND_DONE;
break;
case COMMAND_LOAD_RTC:
- rtc.count_enable = false; // Disable RTC counter
- rtc.index = 0; // Setup for writing
+ rtc.count_enable = false; /* Disable RTC counter */
+ rtc.index = 0; /* Setup for writing */
rtc.mode = MODE_LOAD_RTC;
break;
default:
- rtc.mode = MODE_COMMAND_DONE; // unrecognized command - need to implement.
+ rtc.mode = MODE_COMMAND_DONE; /* unrecognized command - need to implement. */
}
return;
@@ -323,17 +323,17 @@ uint8_t S9xGetSRTC(uint16_t Address)
{
if (rtc.index < 0)
{
- S9xUpdateSrtcTime(); // Only update it if the game reads it
+ S9xUpdateSrtcTime(); /* Only update it if the game reads it */
rtc.index++;
- return 0x0f; // Send start marker.
+ return 0x0f; /* Send start marker. */
}
else if (rtc.index > MAX_RTC_INDEX)
{
- rtc.index = -1; // Setup for next set of reads
- return 0x0f; // Data done marker.
+ rtc.index = -1; /* Setup for next set of reads */
+ return 0x0f; /* Data done marker. */
}
else
- return rtc.data[rtc.index++]; // Feed out the data
+ return rtc.data[rtc.index++]; /* Feed out the data */
}
else
return 0x0;
@@ -351,7 +351,7 @@ void S9xSRTCPreSaveState()
Memory.SRAM [s + 0] = rtc.needs_init;
Memory.SRAM [s + 1] = rtc.count_enable;
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(&Memory.SRAM [s + 2], rtc.data, MAX_RTC_INDEX + 1);
Memory.SRAM [s + 3 + MAX_RTC_INDEX] = rtc.index;
Memory.SRAM [s + 4 + MAX_RTC_INDEX] = rtc.mode;
@@ -366,7 +366,7 @@ void S9xSRTCPreSaveState()
Memory.SRAM [s + 11 + MAX_RTC_INDEX] = (uint8_t)(rtc.system_timestamp >> 48);
Memory.SRAM [s + 12 + MAX_RTC_INDEX] = (uint8_t)(rtc.system_timestamp >> 56);
#else
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(&Memory.SRAM [s + 5 + MAX_RTC_INDEX], &rtc.system_timestamp, 8);
#endif
}
@@ -382,7 +382,7 @@ void S9xSRTCPostLoadState()
rtc.needs_init = Memory.SRAM [s + 0];
rtc.count_enable = Memory.SRAM [s + 1];
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(rtc.data, &Memory.SRAM [s + 2], MAX_RTC_INDEX + 1);
rtc.index = Memory.SRAM [s + 3 + MAX_RTC_INDEX];
rtc.mode = Memory.SRAM [s + 4 + MAX_RTC_INDEX];
@@ -397,7 +397,7 @@ void S9xSRTCPostLoadState()
rtc.system_timestamp |= (Memory.SRAM [s + 11 + MAX_RTC_INDEX] << 48);
rtc.system_timestamp |= (Memory.SRAM [s + 12 + MAX_RTC_INDEX] << 56);
#else
- // memmove converted: Different mallocs [Neb]
+ /* memmove converted: Different mallocs [Neb] */
memcpy(&rtc.system_timestamp, &Memory.SRAM [s + 5 + MAX_RTC_INDEX], 8);
#endif
S9xUpdateSrtcTime();