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authorNebuleon Fumika2012-12-26 14:42:02 -0500
committerNebuleon Fumika2012-12-26 14:42:02 -0500
commite5869adc4469115c7eac9abf70145fc178e017de (patch)
tree552805b1c150fea2f5e905e550d034f71c03fb75 /source
parent139c793b584a76acd42d72ec019d2cabab7d3ee7 (diff)
downloadsnesemu-e5869adc4469115c7eac9abf70145fc178e017de.tar.gz
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Merge Registers structures into their respective CPUs to avoid additional memory addresses being loaded every opcode.
Diffstat (limited to 'source')
-rw-r--r--source/65c816.h34
-rw-r--r--source/apu.cpp12
-rw-r--r--source/apu.h15
-rw-r--r--source/cpu.cpp20
-rw-r--r--source/cpuaddr.h60
-rw-r--r--source/cpuexec.cpp12
-rw-r--r--source/cpuexec.h13
-rw-r--r--source/cpumacro.h236
-rw-r--r--source/cpuops.cpp550
-rw-r--r--source/globals.cpp10
-rw-r--r--source/sa1.cpp26
-rw-r--r--source/sa1.h30
-rw-r--r--source/sa1cpu.cpp1
-rw-r--r--source/snaporig.cpp12
-rw-r--r--source/snapshot.cpp78
-rw-r--r--source/spc700.cpp572
-rw-r--r--source/spc700.h32
17 files changed, 852 insertions, 861 deletions
diff --git a/source/65c816.h b/source/65c816.h
index a82de8d..04b591c 100644
--- a/source/65c816.h
+++ b/source/65c816.h
@@ -117,14 +117,14 @@
#define SetCarry() (ICPU._Carry = 1)
#define SetZero() (ICPU._Zero = 0)
#define ClearZero() (ICPU._Zero = 1)
-#define SetIRQ() (Registers.PL |= IRQ)
-#define ClearIRQ() (Registers.PL &= ~IRQ)
-#define SetDecimal() (Registers.PL |= Decimal)
-#define ClearDecimal() (Registers.PL &= ~Decimal)
-#define SetIndex() (Registers.PL |= IndexFlag)
-#define ClearIndex() (Registers.PL &= ~IndexFlag)
-#define SetMemory() (Registers.PL |= MemoryFlag)
-#define ClearMemory() (Registers.PL &= ~MemoryFlag)
+#define SetIRQ() (ICPU.Registers.PL |= IRQ)
+#define ClearIRQ() (ICPU.Registers.PL &= ~IRQ)
+#define SetDecimal() (ICPU.Registers.PL |= Decimal)
+#define ClearDecimal() (ICPU.Registers.PL &= ~Decimal)
+#define SetIndex() (ICPU.Registers.PL |= IndexFlag)
+#define ClearIndex() (ICPU.Registers.PL &= ~IndexFlag)
+#define SetMemory() (ICPU.Registers.PL |= MemoryFlag)
+#define ClearMemory() (ICPU.Registers.PL &= ~MemoryFlag)
#define SetOverflow() (ICPU._Overflow = 1)
#define ClearOverflow() (ICPU._Overflow = 0)
#define SetNegative() (ICPU._Negative = 0x80)
@@ -132,17 +132,17 @@
#define CheckZero() (ICPU._Zero == 0)
#define CheckCarry() (ICPU._Carry)
-#define CheckIRQ() (Registers.PL & IRQ)
-#define CheckDecimal() (Registers.PL & Decimal)
-#define CheckIndex() (Registers.PL & IndexFlag)
-#define CheckMemory() (Registers.PL & MemoryFlag)
+#define CheckIRQ() (ICPU.Registers.PL & IRQ)
+#define CheckDecimal() (ICPU.Registers.PL & Decimal)
+#define CheckIndex() (ICPU.Registers.PL & IndexFlag)
+#define CheckMemory() (ICPU.Registers.PL & MemoryFlag)
#define CheckOverflow() (ICPU._Overflow)
#define CheckNegative() (ICPU._Negative & 0x80)
-#define CheckEmulation() (Registers.P.W & Emulation)
+#define CheckEmulation() (ICPU.Registers.P.W & Emulation)
-#define ClearFlags(f) (Registers.P.W &= ~(f))
-#define SetFlags(f) (Registers.P.W |= (f))
-#define CheckFlag(f) (Registers.PL & (f))
+#define ClearFlags(f) (ICPU.Registers.P.W &= ~(f))
+#define SetFlags(f) (ICPU.Registers.P.W |= (f))
+#define CheckFlag(f) (ICPU.Registers.PL & (f))
typedef union
{
@@ -166,7 +166,5 @@ struct SRegisters{
uint16 PC;
};
-EXTERN_C struct SRegisters Registers;
-
#endif
diff --git a/source/apu.cpp b/source/apu.cpp
index 3abb669..3c1a5d3 100644
--- a/source/apu.cpp
+++ b/source/apu.cpp
@@ -181,12 +181,12 @@ void S9xResetAPU ()
memmove (APU.ExtraRAM, APUROM, sizeof (APUROM));
IAPU.PC = IAPU.RAM + IAPU.RAM [0xfffe] + (IAPU.RAM [0xffff] << 8);
APU.Cycles = 0;
- APURegisters.YA.W = 0;
- APURegisters.X = 0;
- APURegisters.S = 0xff;
- APURegisters.P = 0;
+ IAPU.Registers.YA.W = 0;
+ IAPU.Registers.X = 0;
+ IAPU.Registers.S = 0xff;
+ IAPU.Registers.P = 0;
S9xAPUUnpackStatus ();
- APURegisters.PC = 0;
+ IAPU.Registers.PC = 0;
IAPU.APUExecuting = Settings.APUEnabled;
#ifdef SPC700_SHUTDOWN
IAPU.WaitAddress1 = NULL;
@@ -419,7 +419,7 @@ void S9xSetAPUDSP (uint8 byte)
{
if (byte & ~spc_is_dumping_temp)
{
- APURegisters.PC = IAPU.PC - IAPU.RAM;
+ IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
S9xAPUPackStatus();
S9xSPCDump (S9xGetFilenameInc (".spc"));
spc_is_dumping = 0;
diff --git a/source/apu.h b/source/apu.h
index 0a64e34..67b2525 100644
--- a/source/apu.h
+++ b/source/apu.h
@@ -95,6 +95,7 @@
struct SIAPU
{
uint8 *PC;
+ struct SAPURegisters Registers;
uint8 *RAM;
uint8 *DirectPage;
bool8 APUExecuting;
@@ -136,15 +137,15 @@ extern int spc_is_dumping_temp;
extern uint8 spc_dump_dsp[0x100];
STATIC inline void S9xAPUUnpackStatus()
{
- IAPU._Zero = ((APURegisters.P & Zero) == 0) | (APURegisters.P & Negative);
- IAPU._Carry = (APURegisters.P & Carry);
- IAPU._Overflow = (APURegisters.P & Overflow) >> 6;
+ IAPU._Zero = ((IAPU.Registers.P & Zero) == 0) | (IAPU.Registers.P & Negative);
+ IAPU._Carry = (IAPU.Registers.P & Carry);
+ IAPU._Overflow = (IAPU.Registers.P & Overflow) >> 6;
}
STATIC inline void S9xAPUPackStatus()
{
- APURegisters.P &= ~(Zero | Negative | Carry | Overflow);
- APURegisters.P |= IAPU._Carry | ((IAPU._Zero == 0) << 1) |
+ IAPU.Registers.P &= ~(Zero | Negative | Carry | Overflow);
+ IAPU.Registers.P |= IAPU._Carry | ((IAPU._Zero == 0) << 1) |
(IAPU._Zero & 0x80) | (IAPU._Overflow << 6);
}
@@ -162,8 +163,8 @@ void S9xSetAPUTimer (uint16 Address, uint8 byte);
bool8 S9xInitSound (int quality, bool8 stereo, int buffer_size);
void S9xOpenCloseSoundTracingFile (bool8);
void S9xPrintAPUState ();
-extern int32 S9xAPUCycles [256]; // Scaled cycle lengths
-extern int32 S9xAPUCycleLengths [256]; // Raw data.
+extern uint16 S9xAPUCycles [256]; // Scaled cycle lengths
+extern uint16 S9xAPUCycleLengths [256]; // Raw data.
extern void (*S9xApuOpcodes [256]) (void);
END_EXTERN_C
diff --git a/source/cpu.cpp b/source/cpu.cpp
index 80e387f..d6e8f53 100644
--- a/source/cpu.cpp
+++ b/source/cpu.cpp
@@ -117,15 +117,15 @@ void S9xResetSuperFX ()
void S9xResetCPU ()
{
- Registers.PB = 0;
- Registers.PC = S9xGetWord (0xFFFC);
- Registers.D.W = 0;
- Registers.DB = 0;
- Registers.SH = 1;
- Registers.SL = 0xFF;
- Registers.XH = 0;
- Registers.YH = 0;
- Registers.P.W = 0;
+ ICPU.Registers.PB = 0;
+ ICPU.Registers.PC = S9xGetWord (0xFFFC);
+ ICPU.Registers.D.W = 0;
+ ICPU.Registers.DB = 0;
+ ICPU.Registers.SH = 1;
+ ICPU.Registers.SL = 0xFF;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
+ ICPU.Registers.P.W = 0;
ICPU.ShiftedPB = 0;
ICPU.ShiftedDB = 0;
@@ -157,7 +157,7 @@ void S9xResetCPU ()
//CPU.TriedInterleavedMode2 = FALSE; // Reset when ROM image loaded
CPU.NMICycleCount = 0;
CPU.IRQCycleCount = 0;
- S9xSetPCBase (Registers.PC);
+ S9xSetPCBase (ICPU.Registers.PC);
ICPU.S9xOpcodes = S9xOpcodesE1;
ICPU.CPUExecuting = TRUE;
diff --git a/source/cpuaddr.h b/source/cpuaddr.h
index 09f5788..34fb41b 100644
--- a/source/cpuaddr.h
+++ b/source/cpuaddr.h
@@ -163,9 +163,9 @@ static void AbsoluteIndexedIndirect (AccessMode a, InternalOp op)
{
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = (Registers.X.W + *(uint16 *) CPU.PC) & 0xffff;
+ Addr = (ICPU.Registers.X.W + *(uint16 *) CPU.PC) & 0xffff;
#else
- Addr = (Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff;
+ Addr = (ICPU.Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff;
#endif
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
@@ -274,11 +274,11 @@ static void Direct(AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
-// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
(*op)(Addr);
}
@@ -287,7 +287,7 @@ static void DirectIndirectIndexed (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
@@ -296,9 +296,9 @@ static void DirectIndirectIndexed (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = (uint8)(Addr>>8);
#endif
- Addr += ICPU.ShiftedDB + Registers.Y.W;
+ Addr += ICPU.ShiftedDB + ICPU.Registers.Y.W;
-// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
// XXX: always add one if STA
// XXX: else Add one cycle if crosses page boundary
(*op)(Addr);
@@ -309,21 +309,21 @@ static void DirectIndirectIndexedLong (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
#ifndef NO_OPEN_BUS
if(a&READ){
- Addr = S9xGetWord (Addr) + ((OpenBus = S9xGetByte (Addr + 2)) << 16) + Registers.Y.W;
+ Addr = S9xGetWord (Addr) + ((OpenBus = S9xGetByte (Addr + 2)) << 16) + ICPU.Registers.Y.W;
} else {
#endif
- Addr = S9xGetWord (Addr) + (S9xGetByte (Addr + 2) << 16) + Registers.Y.W;
+ Addr = S9xGetWord (Addr) + (S9xGetByte (Addr + 2) << 16) + ICPU.Registers.Y.W;
#ifndef NO_OPEN_BUS
}
#endif
-// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
(*op)(Addr);
}
@@ -332,7 +332,7 @@ static void DirectIndexedIndirect(AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
@@ -344,7 +344,7 @@ static void DirectIndexedIndirect(AccessMode a, InternalOp op)
Addr += ICPU.ShiftedDB;
#ifndef SA1_OPCODES
-// if (Registers.DL != 0)
+// if (ICPU.Registers.DL != 0)
// CPU.Cycles += TWO_CYCLES;
// else
CPU.Cycles += ONE_CYCLE;
@@ -357,12 +357,12 @@ static void DirectIndexedX (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W + Registers.X.W);
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W);
Addr &= CheckEmulation() ? 0xff : 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-// if (Registers.DL != 0)
+// if (ICPU.Registers.DL != 0)
// CPU.Cycles += TWO_CYCLES;
// else
// CPU.Cycles += ONE_CYCLE;
@@ -375,11 +375,11 @@ static void DirectIndexedY (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W + Registers.Y.W);
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.Y.W);
Addr &= CheckEmulation() ? 0xff : 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-// if (Registers.DL != 0)
+// if (ICPU.Registers.DL != 0)
// CPU.Cycles += TWO_CYCLES;
// else
// CPU.Cycles += ONE_CYCLE;
@@ -391,10 +391,10 @@ static void AbsoluteIndexedX (AccessMode a, InternalOp op)
{
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = ICPU.ShiftedDB + *(uint16 *) CPU.PC + Registers.X.W;
+ Addr = ICPU.ShiftedDB + *(uint16 *) CPU.PC + ICPU.Registers.X.W;
#else
Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
- Registers.X.W;
+ ICPU.Registers.X.W;
#endif
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = *(CPU.PC+1);
@@ -412,10 +412,10 @@ static void AbsoluteIndexedY (AccessMode a, InternalOp op)
{
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = ICPU.ShiftedDB + *(uint16 *) CPU.PC + Registers.Y.W;
+ Addr = ICPU.ShiftedDB + *(uint16 *) CPU.PC + ICPU.Registers.Y.W;
#else
Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
- Registers.Y.W;
+ ICPU.Registers.Y.W;
#endif
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = *(CPU.PC+1);
@@ -433,9 +433,9 @@ static void AbsoluteLongIndexedX (AccessMode a, InternalOp op)
{
long Addr;
#ifdef FAST_LSB_WORD_ACCESS
- Addr = (*(uint32 *) CPU.PC + Registers.X.W) & 0xffffff;
+ Addr = (*(uint32 *) CPU.PC + ICPU.Registers.X.W) & 0xffffff;
#else
- Addr = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + Registers.X.W) & 0xffffff;
+ Addr = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xffffff;
#endif
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = *(CPU.PC+2);
@@ -452,7 +452,7 @@ static void DirectIndirect (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
@@ -462,7 +462,7 @@ static void DirectIndirect (AccessMode a, InternalOp op)
#endif
Addr += ICPU.ShiftedDB;
-// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
(*op)(Addr);
}
@@ -471,7 +471,7 @@ static void DirectIndirectLong (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.D.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
@@ -484,7 +484,7 @@ static void DirectIndirectLong (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
}
#endif
-// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
+// if (ICPU.Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
(*op)(Addr);
}
@@ -493,7 +493,7 @@ static void StackRelative (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
if(a&READ) OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.S.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
#endif
@@ -505,7 +505,7 @@ static void StackRelativeIndirectIndexed (AccessMode a, InternalOp op)
#ifndef NO_OPEN_BUS
OpenBus = *CPU.PC;
#endif
- long Addr = (*CPU.PC++ + Registers.S.W) & 0xffff;
+ long Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
#endif
@@ -514,7 +514,7 @@ static void StackRelativeIndirectIndexed (AccessMode a, InternalOp op)
if(a&READ) OpenBus = (uint8)(Addr>>8);
#endif
Addr = (Addr + ICPU.ShiftedDB +
- Registers.Y.W) & 0xffffff;
+ ICPU.Registers.Y.W) & 0xffffff;
(*op)(Addr);
}
#endif
diff --git a/source/cpuexec.cpp b/source/cpuexec.cpp
index 5fb79e5..66bb8da 100644
--- a/source/cpuexec.cpp
+++ b/source/cpuexec.cpp
@@ -171,9 +171,9 @@ void S9xMainLoop (void)
DO_HBLANK_CHECK();
}
- Registers.PC = CPU.PC - CPU.PCBase;
+ ICPU.Registers.PC = CPU.PC - CPU.PCBase;
S9xPackStatus ();
- APURegisters.PC = IAPU.PC - IAPU.RAM;
+ IAPU.Registers.PC = IAPU.PC - IAPU.RAM;
S9xAPUPackStatus ();
if (CPU.Flags & SCAN_KEYS_FLAG)
{
@@ -235,10 +235,10 @@ void S9xDoHBlankProcessing ()
// ppu.cpp will determine with greater accuracy whether a key was
// pressed or released during the frame.
uint32 i;
- for (i = 0; i < 5; i++)
- {
- IPPU.JoypadsAtHBlanks [i][CPU.V_Counter] = S9xReadJoypad (i);
- }
+ for (i = 0; i < 5; i++)
+ {
+ IPPU.JoypadsAtHBlanks [i][CPU.V_Counter] = S9xReadJoypad (i);
+ }
#endif
if (IPPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight)
IPPU.HDMA = S9xDoHDMA (IPPU.HDMA);
diff --git a/source/cpuexec.h b/source/cpuexec.h
index 9a26081..a094220 100644
--- a/source/cpuexec.h
+++ b/source/cpuexec.h
@@ -109,6 +109,7 @@ struct SICPU
{
uint8 *Speed;
struct SOpcodes *S9xOpcodes;
+ struct SRegisters Registers;
uint8 _Carry;
uint8 _Zero;
uint8 _Negative;
@@ -140,16 +141,16 @@ END_EXTERN_C
STATIC inline void S9xUnpackStatus()
{
- ICPU._Zero = (Registers.PL & Zero) == 0;
- ICPU._Negative = (Registers.PL & Negative);
- ICPU._Carry = (Registers.PL & Carry);
- ICPU._Overflow = (Registers.PL & Overflow) >> 6;
+ ICPU._Zero = (ICPU.Registers.PL & Zero) == 0;
+ ICPU._Negative = (ICPU.Registers.PL & Negative);
+ ICPU._Carry = (ICPU.Registers.PL & Carry);
+ ICPU._Overflow = (ICPU.Registers.PL & Overflow) >> 6;
}
STATIC inline void S9xPackStatus()
{
- Registers.PL &= ~(Zero | Negative | Carry | Overflow);
- Registers.PL |= ICPU._Carry | ((ICPU._Zero == 0) << 1) |
+ ICPU.Registers.PL &= ~(Zero | Negative | Carry | Overflow);
+ ICPU.Registers.PL |= ICPU._Carry | ((ICPU._Zero == 0) << 1) |
(ICPU._Negative & 0x80) | (ICPU._Overflow << 6);
}
diff --git a/source/cpumacro.h b/source/cpumacro.h
index 1bd5d2f..c70c2ba 100644
--- a/source/cpumacro.h
+++ b/source/cpumacro.h
@@ -108,8 +108,8 @@ static void ADC8 (long Addr)
if (CheckDecimal ())
{
- uint8 A1 = (Registers.A.W) & 0xF;
- uint8 A2 = (Registers.A.W >> 4) & 0xF;
+ uint8 A1 = (ICPU.Registers.A.W) & 0xF;
+ uint8 A2 = (ICPU.Registers.A.W >> 4) & 0xF;
uint8 W1 = Work8 & 0xF;
uint8 W2 = (Work8 >> 4) & 0xF;
@@ -134,27 +134,27 @@ static void ADC8 (long Addr)
}
int8 Ans8 = (A2 << 4) | A1;
- if (~(Registers.AL ^ Work8) &
+ if (~(ICPU.Registers.AL ^ Work8) &
(Work8 ^ Ans8) & 0x80)
SetOverflow();
else
ClearOverflow();
- Registers.AL = Ans8;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL = Ans8;
+ SetZN8 (ICPU.Registers.AL);
}
else
{
- int16 Ans16 = Registers.AL + Work8 + CheckCarry();
+ int16 Ans16 = ICPU.Registers.AL + Work8 + CheckCarry();
ICPU._Carry = Ans16 >= 0x100;
- if (~(Registers.AL ^ Work8) &
+ if (~(ICPU.Registers.AL ^ Work8) &
(Work8 ^ (uint8) Ans16) & 0x80)
SetOverflow();
else
ClearOverflow();
- Registers.AL = (uint8) Ans16;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL = (uint8) Ans16;
+ SetZN8 (ICPU.Registers.AL);
}
}
@@ -165,10 +165,10 @@ static void ADC16 (long Addr)
if (CheckDecimal ())
{
- uint8 A1 = (Registers.A.W) & 0xF;
- uint8 A2 = (Registers.A.W >> 4) & 0xF;
- uint8 A3 = (Registers.A.W >> 8) & 0xF;
- uint8 A4 = (Registers.A.W >> 12) & 0xF;
+ uint8 A1 = (ICPU.Registers.A.W) & 0xF;
+ uint8 A2 = (ICPU.Registers.A.W >> 4) & 0xF;
+ uint8 A3 = (ICPU.Registers.A.W >> 8) & 0xF;
+ uint8 A4 = (ICPU.Registers.A.W >> 12) & 0xF;
uint8 W1 = Work16 & 0xF;
uint8 W2 = (Work16 >> 4) & 0xF;
uint8 W3 = (Work16 >> 8) & 0xF;
@@ -211,40 +211,40 @@ static void ADC16 (long Addr)
}
uint16 Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
- if (~(Registers.A.W ^ Work16) &
+ if (~(ICPU.Registers.A.W ^ Work16) &
(Work16 ^ Ans16) & 0x8000)
SetOverflow();
else
ClearOverflow();
- Registers.A.W = Ans16;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = Ans16;
+ SetZN16 (ICPU.Registers.A.W);
}
else
{
- uint32 Ans32 = Registers.A.W + Work16 + CheckCarry();
+ uint32 Ans32 = ICPU.Registers.A.W + Work16 + CheckCarry();
ICPU._Carry = Ans32 >= 0x10000;
- if (~(Registers.A.W ^ Work16) &
+ if (~(ICPU.Registers.A.W ^ Work16) &
(Work16 ^ (uint16) Ans32) & 0x8000)
SetOverflow();
else
ClearOverflow();
- Registers.A.W = (uint16) Ans32;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = (uint16) Ans32;
+ SetZN16 (ICPU.Registers.A.W);
}
}
static void AND16 (long Addr)
{
- Registers.A.W &= S9xGetWord (Addr);
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W &= S9xGetWord (Addr);
+ SetZN16 (ICPU.Registers.A.W);
}
static void AND8 (long Addr)
{
- Registers.AL &= S9xGetByte (Addr);
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL &= S9xGetByte (Addr);
+ SetZN8 (ICPU.Registers.AL);
}
static inline void A_ASL16 ()
@@ -252,9 +252,9 @@ static inline void A_ASL16 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- ICPU._Carry = (Registers.AH & 0x80) != 0;
- Registers.A.W <<= 1;
- SetZN16 (Registers.A.W);
+ ICPU._Carry = (ICPU.Registers.AH & 0x80) != 0;
+ ICPU.Registers.A.W <<= 1;
+ SetZN16 (ICPU.Registers.A.W);
}
static inline void A_ASL8 ()
@@ -262,9 +262,9 @@ static inline void A_ASL8 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- ICPU._Carry = (Registers.AL & 0x80) != 0;
- Registers.AL <<= 1;
- SetZN8 (Registers.AL);
+ ICPU._Carry = (ICPU.Registers.AL & 0x80) != 0;
+ ICPU.Registers.AL <<= 1;
+ SetZN8 (ICPU.Registers.AL);
}
static void ASL16 (long Addr)
@@ -298,7 +298,7 @@ static void BIT16 (long Addr)
uint16 Work16 = S9xGetWord (Addr);
ICPU._Overflow = (Work16 & 0x4000) != 0;
ICPU._Negative = (uint8) (Work16 >> 8);
- ICPU._Zero = (Work16 & Registers.A.W) != 0;
+ ICPU._Zero = (Work16 & ICPU.Registers.A.W) != 0;
}
static void BIT8 (long Addr)
@@ -306,12 +306,12 @@ static void BIT8 (long Addr)
uint8 Work8 = S9xGetByte (Addr);
ICPU._Overflow = (Work8 & 0x40) != 0;
ICPU._Negative = Work8;
- ICPU._Zero = Work8 & Registers.AL;
+ ICPU._Zero = Work8 & ICPU.Registers.AL;
}
static void CMP16 (long Addr)
{
- int32 Int32 = (long) Registers.A.W -
+ int32 Int32 = (long) ICPU.Registers.A.W -
(long) S9xGetWord (Addr);
ICPU._Carry = Int32 >= 0;
SetZN16 ((uint16) Int32);
@@ -319,7 +319,7 @@ static void CMP16 (long Addr)
static void CMP8 (long Addr)
{
- int16 Int16 = (short) Registers.AL -
+ int16 Int16 = (short) ICPU.Registers.AL -
(short) S9xGetByte (Addr);
ICPU._Carry = Int16 >= 0;
SetZN8 ((uint8) Int16);
@@ -327,7 +327,7 @@ static void CMP8 (long Addr)
static void CMX16 (long Addr)
{
- int32 Int32 = (long) Registers.X.W -
+ int32 Int32 = (long) ICPU.Registers.X.W -
(long) S9xGetWord (Addr);
ICPU._Carry = Int32 >= 0;
SetZN16 ((uint16) Int32);
@@ -335,7 +335,7 @@ static void CMX16 (long Addr)
static void CMX8 (long Addr)
{
- int16 Int16 = (short) Registers.XL -
+ int16 Int16 = (short) ICPU.Registers.XL -
(short) S9xGetByte (Addr);
ICPU._Carry = Int16 >= 0;
SetZN8 ((uint8) Int16);
@@ -343,7 +343,7 @@ static void CMX8 (long Addr)
static void CMY16 (long Addr)
{
- int32 Int32 = (long) Registers.Y.W -
+ int32 Int32 = (long) ICPU.Registers.Y.W -
(long) S9xGetWord (Addr);
ICPU._Carry = Int32 >= 0;
SetZN16 ((uint16) Int32);
@@ -351,7 +351,7 @@ static void CMY16 (long Addr)
static void CMY8 (long Addr)
{
- int16 Int16 = (short) Registers.YL -
+ int16 Int16 = (short) ICPU.Registers.YL -
(short) S9xGetByte (Addr);
ICPU._Carry = Int16 >= 0;
SetZN8 ((uint8) Int16);
@@ -366,8 +366,8 @@ static inline void A_DEC16 ()
CPU.WaitAddress = NULL;
#endif
- Registers.A.W--;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W--;
+ SetZN16 (ICPU.Registers.A.W);
}
static inline void A_DEC8 ()
@@ -379,8 +379,8 @@ static inline void A_DEC8 ()
CPU.WaitAddress = NULL;
#endif
- Registers.AL--;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL--;
+ SetZN8 (ICPU.Registers.AL);
}
static void DEC16 (long Addr)
@@ -415,14 +415,14 @@ static void DEC8 (long Addr)
static void EOR16 (long Addr)
{
- Registers.A.W ^= S9xGetWord (Addr);
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W ^= S9xGetWord (Addr);
+ SetZN16 (ICPU.Registers.A.W);
}
static void EOR8 (long Addr)
{
- Registers.AL ^= S9xGetByte (Addr);
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL ^= S9xGetByte (Addr);
+ SetZN8 (ICPU.Registers.AL);
}
static inline void A_INC16 ()
@@ -434,8 +434,8 @@ static inline void A_INC16 ()
CPU.WaitAddress = NULL;
#endif
- Registers.A.W++;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W++;
+ SetZN16 (ICPU.Registers.A.W);
}
static inline void A_INC8 ()
@@ -447,8 +447,8 @@ static inline void A_INC8 ()
CPU.WaitAddress = NULL;
#endif
- Registers.AL++;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL++;
+ SetZN8 (ICPU.Registers.AL);
}
static void INC16 (long Addr)
@@ -483,38 +483,38 @@ static void INC8 (long Addr)
static void LDA16 (long Addr)
{
- Registers.A.W = S9xGetWord (Addr);
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = S9xGetWord (Addr);
+ SetZN16 (ICPU.Registers.A.W);
}
static void LDA8 (long Addr)
{
- Registers.AL = S9xGetByte (Addr);
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL = S9xGetByte (Addr);
+ SetZN8 (ICPU.Registers.AL);
}
static void LDX16 (long Addr)
{
- Registers.X.W = S9xGetWord (Addr);
- SetZN16 (Registers.X.W);
+ ICPU.Registers.X.W = S9xGetWord (Addr);
+ SetZN16 (ICPU.Registers.X.W);
}
static void LDX8 (long Addr)
{
- Registers.XL = S9xGetByte (Addr);
- SetZN8 (Registers.XL);
+ ICPU.Registers.XL = S9xGetByte (Addr);
+ SetZN8 (ICPU.Registers.XL);
}
static void LDY16 (long Addr)
{
- Registers.Y.W = S9xGetWord (Addr);
- SetZN16 (Registers.Y.W);
+ ICPU.Registers.Y.W = S9xGetWord (Addr);
+ SetZN16 (ICPU.Registers.Y.W);
}
static void LDY8 (long Addr)
{
- Registers.YL = S9xGetByte (Addr);
- SetZN8 (Registers.YL);
+ ICPU.Registers.YL = S9xGetByte (Addr);
+ SetZN8 (ICPU.Registers.YL);
}
static inline void A_LSR16 ()
@@ -522,9 +522,9 @@ static inline void A_LSR16 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- ICPU._Carry = Registers.AL & 1;
- Registers.A.W >>= 1;
- SetZN16 (Registers.A.W);
+ ICPU._Carry = ICPU.Registers.AL & 1;
+ ICPU.Registers.A.W >>= 1;
+ SetZN16 (ICPU.Registers.A.W);
}
static inline void A_LSR8 ()
@@ -532,9 +532,9 @@ static inline void A_LSR8 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- ICPU._Carry = Registers.AL & 1;
- Registers.AL >>= 1;
- SetZN8 (Registers.AL);
+ ICPU._Carry = ICPU.Registers.AL & 1;
+ ICPU.Registers.AL >>= 1;
+ SetZN8 (ICPU.Registers.AL);
}
static void LSR16 (long Addr)
@@ -565,14 +565,14 @@ static void LSR8 (long Addr)
static void ORA16 (long Addr)
{
- Registers.A.W |= S9xGetWord (Addr);
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W |= S9xGetWord (Addr);
+ SetZN16 (ICPU.Registers.A.W);
}
static void ORA8 (long Addr)
{
- Registers.AL |= S9xGetByte (Addr);
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL |= S9xGetByte (Addr);
+ SetZN8 (ICPU.Registers.AL);
}
static inline void A_ROL16 ()
@@ -580,9 +580,9 @@ static inline void A_ROL16 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- uint32 Work32 = (Registers.A.W << 1) | CheckCarry();
+ uint32 Work32 = (ICPU.Registers.A.W << 1) | CheckCarry();
ICPU._Carry = Work32 >= 0x10000;
- Registers.A.W = (uint16) Work32;
+ ICPU.Registers.A.W = (uint16) Work32;
SetZN16 ((uint16) Work32);
}
@@ -591,11 +591,11 @@ static inline void A_ROL8 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- uint16 Work16 = Registers.AL;
+ uint16 Work16 = ICPU.Registers.AL;
Work16 <<= 1;
Work16 |= CheckCarry();
ICPU._Carry = Work16 >= 0x100;
- Registers.AL = (uint8) Work16;
+ ICPU.Registers.AL = (uint8) Work16;
SetZN8 ((uint8) Work16);
}
@@ -632,11 +632,11 @@ static inline void A_ROR16 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- uint32 Work32 = Registers.A.W;
+ uint32 Work32 = ICPU.Registers.A.W;
Work32 |= (int) CheckCarry() << 16;
ICPU._Carry = (uint8) (Work32 & 1);
Work32 >>= 1;
- Registers.A.W = (uint16) Work32;
+ ICPU.Registers.A.W = (uint16) Work32;
SetZN16 ((uint16) Work32);
}
@@ -645,10 +645,10 @@ static inline void A_ROR8 ()
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- uint16 Work16 = Registers.AL | ((uint16) CheckCarry() << 8);
+ uint16 Work16 = ICPU.Registers.AL | ((uint16) CheckCarry() << 8);
ICPU._Carry = (uint8) Work16 & 1;
Work16 >>= 1;
- Registers.AL = (uint8) Work16;
+ ICPU.Registers.AL = (uint8) Work16;
SetZN8 ((uint8) Work16);
}
@@ -686,10 +686,10 @@ static void SBC16 (long Addr)
if (CheckDecimal ())
{
- uint8 A1 = (Registers.A.W) & 0xF;
- uint8 A2 = (Registers.A.W >> 4) & 0xF;
- uint8 A3 = (Registers.A.W >> 8) & 0xF;
- uint8 A4 = (Registers.A.W >> 12) & 0xF;
+ uint8 A1 = (ICPU.Registers.A.W) & 0xF;
+ uint8 A2 = (ICPU.Registers.A.W >> 4) & 0xF;
+ uint8 A3 = (ICPU.Registers.A.W >> 8) & 0xF;
+ uint8 A4 = (ICPU.Registers.A.W >> 12) & 0xF;
uint8 W1 = Work16 & 0xF;
uint8 W2 = (Work16 >> 4) & 0xF;
uint8 W3 = (Work16 >> 8) & 0xF;
@@ -725,28 +725,28 @@ static void SBC16 (long Addr)
}
uint16 Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
- if ((Registers.A.W ^ Work16) &
- (Registers.A.W ^ Ans16) & 0x8000)
+ if ((ICPU.Registers.A.W ^ Work16) &
+ (ICPU.Registers.A.W ^ Ans16) & 0x8000)
SetOverflow();
else
ClearOverflow();
- Registers.A.W = Ans16;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = Ans16;
+ SetZN16 (ICPU.Registers.A.W);
}
else
{
- int32 Int32 = (long) Registers.A.W - (long) Work16 + (long) CheckCarry() - 1;
+ int32 Int32 = (long) ICPU.Registers.A.W - (long) Work16 + (long) CheckCarry() - 1;
ICPU._Carry = Int32 >= 0;
- if ((Registers.A.W ^ Work16) &
- (Registers.A.W ^ (uint16) Int32) & 0x8000)
+ if ((ICPU.Registers.A.W ^ Work16) &
+ (ICPU.Registers.A.W ^ (uint16) Int32) & 0x8000)
SetOverflow();
else
ClearOverflow ();
- Registers.A.W = (uint16) Int32;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = (uint16) Int32;
+ SetZN16 (ICPU.Registers.A.W);
}
}
@@ -755,8 +755,8 @@ static void SBC8 (long Addr)
uint8 Work8 = S9xGetByte (Addr);
if (CheckDecimal ())
{
- uint8 A1 = (Registers.A.W) & 0xF;
- uint8 A2 = (Registers.A.W >> 4) & 0xF;
+ uint8 A1 = (ICPU.Registers.A.W) & 0xF;
+ uint8 A2 = (ICPU.Registers.A.W >> 4) & 0xF;
uint8 W1 = Work8 & 0xF;
uint8 W2 = (Work8 >> 4) & 0xF;
@@ -778,57 +778,57 @@ static void SBC8 (long Addr)
}
uint8 Ans8 = (A2 << 4) | A1;
- if ((Registers.AL ^ Work8) &
- (Registers.AL ^ Ans8) & 0x80)
+ if ((ICPU.Registers.AL ^ Work8) &
+ (ICPU.Registers.AL ^ Ans8) & 0x80)
SetOverflow ();
else
ClearOverflow ();
- Registers.AL = Ans8;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL = Ans8;
+ SetZN8 (ICPU.Registers.AL);
}
else
{
- int16 Int16 = (short) Registers.AL - (short) Work8 + (short) CheckCarry() - 1;
+ int16 Int16 = (short) ICPU.Registers.AL - (short) Work8 + (short) CheckCarry() - 1;
ICPU._Carry = Int16 >= 0;
- if ((Registers.AL ^ Work8) &
- (Registers.AL ^ (uint8) Int16) & 0x80)
+ if ((ICPU.Registers.AL ^ Work8) &
+ (ICPU.Registers.AL ^ (uint8) Int16) & 0x80)
SetOverflow ();
else
ClearOverflow ();
- Registers.AL = (uint8) Int16;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL = (uint8) Int16;
+ SetZN8 (ICPU.Registers.AL);
}
}
static void STA16 (long Addr)
{
- S9xSetWord (Registers.A.W, Addr);
+ S9xSetWord (ICPU.Registers.A.W, Addr);
}
static void STA8 (long Addr)
{
- S9xSetByte (Registers.AL, Addr);
+ S9xSetByte (ICPU.Registers.AL, Addr);
}
static void STX16 (long Addr)
{
- S9xSetWord (Registers.X.W, Addr);
+ S9xSetWord (ICPU.Registers.X.W, Addr);
}
static void STX8 (long Addr)
{
- S9xSetByte (Registers.XL, Addr);
+ S9xSetByte (ICPU.Registers.XL, Addr);
}
static void STY16 (long Addr)
{
- S9xSetWord (Registers.Y.W, Addr);
+ S9xSetWord (ICPU.Registers.Y.W, Addr);
}
static void STY8 (long Addr)
{
- S9xSetByte (Registers.YL, Addr);
+ S9xSetByte (ICPU.Registers.YL, Addr);
}
static void STZ16 (long Addr)
@@ -847,8 +847,8 @@ static void TSB16 (long Addr)
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetWord (Addr);
- ICPU._Zero = (Work16 & Registers.A.W) != 0;
- Work16 |= Registers.A.W;
+ ICPU._Zero = (Work16 & ICPU.Registers.A.W) != 0;
+ Work16 |= ICPU.Registers.A.W;
//S9xSetWord (Work16, Addr);
S9xSetByte (Work16>>8, Addr+1);
S9xSetByte (Work16&0xFF, Addr);
@@ -860,8 +860,8 @@ static void TSB8 (long Addr)
CPU.Cycles += ONE_CYCLE;
#endif
uint8 Work8 = S9xGetByte (Addr);
- ICPU._Zero = Work8 & Registers.AL;
- Work8 |= Registers.AL;
+ ICPU._Zero = Work8 & ICPU.Registers.AL;
+ Work8 |= ICPU.Registers.AL;
S9xSetByte (Work8, Addr);
}
@@ -871,8 +871,8 @@ static void TRB16 (long Addr)
CPU.Cycles += ONE_CYCLE;
#endif
uint16 Work16 = S9xGetWord (Addr);
- ICPU._Zero = (Work16 & Registers.A.W) != 0;
- Work16 &= ~Registers.A.W;
+ ICPU._Zero = (Work16 & ICPU.Registers.A.W) != 0;
+ Work16 &= ~ICPU.Registers.A.W;
//S9xSetWord (Work16, Addr);
S9xSetByte (Work16>>8, Addr+1);
S9xSetByte (Work16&0xFF, Addr);
@@ -884,8 +884,8 @@ static void TRB8 (long Addr)
CPU.Cycles += ONE_CYCLE;
#endif
uint8 Work8 = S9xGetByte (Addr);
- ICPU._Zero = Work8 & Registers.AL;
- Work8 &= ~Registers.AL;
+ ICPU._Zero = Work8 & ICPU.Registers.AL;
+ Work8 &= ~ICPU.Registers.AL;
S9xSetByte (Work8, Addr);
}
#endif
diff --git a/source/cpuops.cpp b/source/cpuops.cpp
index 719465e..4ddcb6b 100644
--- a/source/cpuops.cpp
+++ b/source/cpuops.cpp
@@ -268,25 +268,25 @@ static void Op73M0 (void)
/* AND *************************************************************************************** */
static void Op29M1 (void)
{
- Registers.AL &= *CPU.PC++;
+ ICPU.Registers.AL &= *CPU.PC++;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
- SetZN8 (Registers.AL);
+ SetZN8 (ICPU.Registers.AL);
}
static void Op29M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
- Registers.A.W &= *(uint16 *) CPU.PC;
+ ICPU.Registers.A.W &= *(uint16 *) CPU.PC;
#else
- Registers.A.W &= *CPU.PC + (*(CPU.PC + 1) << 8);
+ ICPU.Registers.A.W &= *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
CPU.PC += 2;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
#endif
- SetZN16 (Registers.A.W);
+ SetZN16 (ICPU.Registers.A.W);
}
static void Op25M1 (void)
@@ -485,7 +485,7 @@ static void Op1EM0 (void)
/* BIT *************************************************************************************** */
static void Op89M1 (void)
{
- ICPU._Zero = Registers.AL & *CPU.PC++;
+ ICPU._Zero = ICPU.Registers.AL & *CPU.PC++;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
@@ -494,9 +494,9 @@ static void Op89M1 (void)
static void Op89M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
- ICPU._Zero = (Registers.A.W & *(uint16 *) CPU.PC) != 0;
+ ICPU._Zero = (ICPU.Registers.A.W & *(uint16 *) CPU.PC) != 0;
#else
- ICPU._Zero = (Registers.A.W & (*CPU.PC + (*(CPU.PC + 1) << 8))) != 0;
+ ICPU._Zero = (ICPU.Registers.A.W & (*CPU.PC + (*(CPU.PC + 1) << 8))) != 0;
#endif
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
@@ -548,7 +548,7 @@ static void Op3CM0 (void)
/* CMP *************************************************************************************** */
static void OpC9M1 (void)
{
- int32 Int32 = (int) Registers.AL - (int) *CPU.PC++;
+ int32 Int32 = (int) ICPU.Registers.AL - (int) *CPU.PC++;
ICPU._Carry = Int32 >= 0;
SetZN8 ((uint8) Int32);
#ifndef SA1_OPCODES
@@ -560,9 +560,9 @@ static void OpC9M0 (void)
{
int32 Int32;
#ifdef FAST_LSB_WORD_ACCESS
- Int32 = (long) Registers.A.W - (long) *(uint16 *) CPU.PC;
+ Int32 = (long) ICPU.Registers.A.W - (long) *(uint16 *) CPU.PC;
#else
- Int32 = (long) Registers.A.W -
+ Int32 = (long) ICPU.Registers.A.W -
(long) (*CPU.PC + (*(CPU.PC + 1) << 8));
#endif
ICPU._Carry = Int32 >= 0;
@@ -718,7 +718,7 @@ static void OpD3M0 (void)
/* CMX *************************************************************************************** */
static void OpE0X1 (void)
{
- int32 Int32 = (int) Registers.XL - (int) *CPU.PC++;
+ int32 Int32 = (int) ICPU.Registers.XL - (int) *CPU.PC++;
ICPU._Carry = Int32 >= 0;
SetZN8 ((uint8) Int32);
#ifndef SA1_OPCODES
@@ -730,9 +730,9 @@ static void OpE0X0 (void)
{
int32 Int32;
#ifdef FAST_LSB_WORD_ACCESS
- Int32 = (long) Registers.X.W - (long) *(uint16 *) CPU.PC;
+ Int32 = (long) ICPU.Registers.X.W - (long) *(uint16 *) CPU.PC;
#else
- Int32 = (long) Registers.X.W -
+ Int32 = (long) ICPU.Registers.X.W -
(long) (*CPU.PC + (*(CPU.PC + 1) << 8));
#endif
ICPU._Carry = Int32 >= 0;
@@ -768,7 +768,7 @@ static void OpECX0 (void)
/* CMY *************************************************************************************** */
static void OpC0X1 (void)
{
- int32 Int32 = (int) Registers.YL - (int) *CPU.PC++;
+ int32 Int32 = (int) ICPU.Registers.YL - (int) *CPU.PC++;
ICPU._Carry = Int32 >= 0;
SetZN8 ((uint8) Int32);
#ifndef SA1_OPCODES
@@ -780,9 +780,9 @@ static void OpC0X0 (void)
{
int32 Int32;
#ifdef FAST_LSB_WORD_ACCESS
- Int32 = (long) Registers.Y.W - (long) *(uint16 *) CPU.PC;
+ Int32 = (long) ICPU.Registers.Y.W - (long) *(uint16 *) CPU.PC;
#else
- Int32 = (long) Registers.Y.W -
+ Int32 = (long) ICPU.Registers.Y.W -
(long) (*CPU.PC + (*(CPU.PC + 1) << 8));
#endif
ICPU._Carry = Int32 >= 0;
@@ -871,25 +871,25 @@ static void OpDEM0 (void)
/* EOR *************************************************************************************** */
static void Op49M1 (void)
{
- Registers.AL ^= *CPU.PC++;
+ ICPU.Registers.AL ^= *CPU.PC++;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
- SetZN8 (Registers.AL);
+ SetZN8 (ICPU.Registers.AL);
}
static void Op49M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
- Registers.A.W ^= *(uint16 *) CPU.PC;
+ ICPU.Registers.A.W ^= *(uint16 *) CPU.PC;
#else
- Registers.A.W ^= *CPU.PC + (*(CPU.PC + 1) << 8);
+ ICPU.Registers.A.W ^= *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
CPU.PC += 2;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
#endif
- SetZN16 (Registers.A.W);
+ SetZN16 (ICPU.Registers.A.W);
}
static void Op45M1 (void)
@@ -1089,26 +1089,26 @@ static void OpFEM0 (void)
/* LDA *************************************************************************************** */
static void OpA9M1 (void)
{
- Registers.AL = *CPU.PC++;
+ ICPU.Registers.AL = *CPU.PC++;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
- SetZN8 (Registers.AL);
+ SetZN8 (ICPU.Registers.AL);
}
static void OpA9M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
- Registers.A.W = *(uint16 *) CPU.PC;
+ ICPU.Registers.A.W = *(uint16 *) CPU.PC;
#else
- Registers.A.W = *CPU.PC + (*(CPU.PC + 1) << 8);
+ ICPU.Registers.A.W = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
CPU.PC += 2;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
#endif
- SetZN16 (Registers.A.W);
+ SetZN16 (ICPU.Registers.A.W);
}
static void OpA5M1 (void)
@@ -1256,25 +1256,25 @@ static void OpB3M0 (void)
/* LDX *************************************************************************************** */
static void OpA2X1 (void)
{
- Registers.XL = *CPU.PC++;
+ ICPU.Registers.XL = *CPU.PC++;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
- SetZN8 (Registers.XL);
+ SetZN8 (ICPU.Registers.XL);
}
static void OpA2X0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
- Registers.X.W = *(uint16 *) CPU.PC;
+ ICPU.Registers.X.W = *(uint16 *) CPU.PC;
#else
- Registers.X.W = *CPU.PC + (*(CPU.PC + 1) << 8);
+ ICPU.Registers.X.W = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
CPU.PC += 2;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
#endif
- SetZN16 (Registers.X.W);
+ SetZN16 (ICPU.Registers.X.W);
}
static void OpA6X1 (void)
@@ -1321,26 +1321,26 @@ static void OpBEX0 (void)
/* LDY *************************************************************************************** */
static void OpA0X1 (void)
{
- Registers.YL = *CPU.PC++;
+ ICPU.Registers.YL = *CPU.PC++;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
- SetZN8 (Registers.YL);
+ SetZN8 (ICPU.Registers.YL);
}
static void OpA0X0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
- Registers.Y.W = *(uint16 *) CPU.PC;
+ ICPU.Registers.Y.W = *(uint16 *) CPU.PC;
#else
- Registers.Y.W = *CPU.PC + (*(CPU.PC + 1) << 8);
+ ICPU.Registers.Y.W = *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
CPU.PC += 2;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
#endif
- SetZN16 (Registers.Y.W);
+ SetZN16 (ICPU.Registers.Y.W);
}
static void OpA4X1 (void)
@@ -1440,25 +1440,25 @@ static void Op5EM0 (void)
/* ORA *************************************************************************************** */
static void Op09M1 (void)
{
- Registers.AL |= *CPU.PC++;
+ ICPU.Registers.AL |= *CPU.PC++;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeed;
#endif
- SetZN8 (Registers.AL);
+ SetZN8 (ICPU.Registers.AL);
}
static void Op09M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
- Registers.A.W |= *(uint16 *) CPU.PC;
+ ICPU.Registers.A.W |= *(uint16 *) CPU.PC;
#else
- Registers.A.W |= *CPU.PC + (*(CPU.PC + 1) << 8);
+ ICPU.Registers.A.W |= *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
CPU.PC += 2;
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2;
#endif
- SetZN16 (Registers.A.W);
+ SetZN16 (ICPU.Registers.A.W);
}
static void Op05M1 (void)
@@ -2447,8 +2447,8 @@ static void OpCAX1 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.XL--;
- SetZN8 (Registers.XL);
+ ICPU.Registers.XL--;
+ SetZN8 (ICPU.Registers.XL);
}
static void OpCAX0 (void)
@@ -2460,8 +2460,8 @@ static void OpCAX0 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.X.W--;
- SetZN16 (Registers.X.W);
+ ICPU.Registers.X.W--;
+ SetZN16 (ICPU.Registers.X.W);
}
static void Op88X1 (void)
@@ -2473,8 +2473,8 @@ static void Op88X1 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.YL--;
- SetZN8 (Registers.YL);
+ ICPU.Registers.YL--;
+ SetZN8 (ICPU.Registers.YL);
}
static void Op88X0 (void)
@@ -2486,8 +2486,8 @@ static void Op88X0 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.Y.W--;
- SetZN16 (Registers.Y.W);
+ ICPU.Registers.Y.W--;
+ SetZN16 (ICPU.Registers.Y.W);
}
/**********************************************************************************************/
@@ -2501,8 +2501,8 @@ static void OpE8X1 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.XL++;
- SetZN8 (Registers.XL);
+ ICPU.Registers.XL++;
+ SetZN8 (ICPU.Registers.XL);
}
static void OpE8X0 (void)
@@ -2514,8 +2514,8 @@ static void OpE8X0 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.X.W++;
- SetZN16 (Registers.X.W);
+ ICPU.Registers.X.W++;
+ SetZN16 (ICPU.Registers.X.W);
}
static void OpC8X1 (void)
@@ -2527,8 +2527,8 @@ static void OpC8X1 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.YL++;
- SetZN8 (Registers.YL);
+ ICPU.Registers.YL++;
+ SetZN8 (ICPU.Registers.YL);
}
static void OpC8X0 (void)
@@ -2540,8 +2540,8 @@ static void OpC8X0 (void)
CPU.WaitAddress = NULL;
#endif
- Registers.Y.W++;
- SetZN16 (Registers.Y.W);
+ ICPU.Registers.Y.W++;
+ SetZN16 (ICPU.Registers.Y.W);
}
/**********************************************************************************************/
@@ -2558,32 +2558,32 @@ static void OpEA (void)
/* PUSH Instructions ************************************************************************* */
/* #define PushW(w) \
- * S9xSetWord (w, Registers.S.W - 1);\
- * Registers.S.W -= 2;
+ * S9xSetWord (w, ICPU.Registers.S.W - 1);\
+ * ICPU.Registers.S.W -= 2;
*/
#define PushB(b)\
- S9xSetByte (b, Registers.S.W--);
+ S9xSetByte (b, ICPU.Registers.S.W--);
#define PushBE(b)\
- S9xSetByte (b, Registers.S.W--);\
- Registers.SH=0x01;
+ S9xSetByte (b, ICPU.Registers.S.W--);\
+ ICPU.Registers.SH=0x01;
#define PushW(w) \
- S9xSetByte ((w)>>8, Registers.S.W);\
- S9xSetByte ((w)&0xff, (Registers.S.W - 1)&0xFFFF);\
- Registers.S.W -= 2;
+ S9xSetByte ((w)>>8, ICPU.Registers.S.W);\
+ S9xSetByte ((w)&0xff, (ICPU.Registers.S.W - 1)&0xFFFF);\
+ ICPU.Registers.S.W -= 2;
#define PushWE(w) \
- S9xSetByte ((w)>>8, Registers.S.W--);\
- Registers.SH=0x01;\
- S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF);\
- Registers.SH = 0x01;
+ S9xSetByte ((w)>>8, ICPU.Registers.S.W--);\
+ ICPU.Registers.SH=0x01;\
+ S9xSetByte ((w)&0xff, (ICPU.Registers.S.W--)&0xFFFF);\
+ ICPU.Registers.SH = 0x01;
#define PushWENew(w) \
- S9xSetByte ((w)>>8, Registers.S.W--);\
- S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF);\
- Registers.SH = 0x01;
+ S9xSetByte ((w)>>8, ICPU.Registers.S.W--);\
+ S9xSetByte ((w)&0xff, (ICPU.Registers.S.W--)&0xFFFF);\
+ ICPU.Registers.SH = 0x01;
//PEA NL
static void OpF4E1 (void)
@@ -2628,7 +2628,7 @@ static void Op62 (void)
//PHA
static void Op48E1 (void)
{
- PushBE (Registers.AL);
+ PushBE (ICPU.Registers.AL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2636,7 +2636,7 @@ static void Op48E1 (void)
static void Op48M1 (void)
{
- PushB (Registers.AL);
+ PushB (ICPU.Registers.AL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2644,7 +2644,7 @@ static void Op48M1 (void)
static void Op48M0 (void)
{
- PushW (Registers.A.W);
+ PushW (ICPU.Registers.A.W);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2653,14 +2653,14 @@ static void Op48M0 (void)
//PHB
static void Op8BE1 (void)
{
- PushBE (Registers.DB);
+ PushBE (ICPU.Registers.DB);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
}
static void Op8B (void)
{
- PushB (Registers.DB);
+ PushB (ICPU.Registers.DB);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2669,7 +2669,7 @@ static void Op8B (void)
//PHD NL
static void Op0BE1 (void)
{
- PushWENew (Registers.D.W);
+ PushWENew (ICPU.Registers.D.W);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2677,7 +2677,7 @@ static void Op0BE1 (void)
static void Op0B (void)
{
- PushW (Registers.D.W);
+ PushW (ICPU.Registers.D.W);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2686,7 +2686,7 @@ static void Op0B (void)
//PHK
static void Op4BE1 (void)
{
- PushBE (Registers.PB);
+ PushBE (ICPU.Registers.PB);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2694,7 +2694,7 @@ static void Op4BE1 (void)
static void Op4B (void)
{
- PushB (Registers.PB);
+ PushB (ICPU.Registers.PB);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2704,7 +2704,7 @@ static void Op4B (void)
static void Op08E1 (void)
{
S9xPackStatus ();
- PushBE (Registers.PL);
+ PushBE (ICPU.Registers.PL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2713,7 +2713,7 @@ static void Op08E1 (void)
static void Op08 (void)
{
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2722,7 +2722,7 @@ static void Op08 (void)
//PHX
static void OpDAE1 (void)
{
- PushBE (Registers.XL);
+ PushBE (ICPU.Registers.XL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2730,7 +2730,7 @@ static void OpDAE1 (void)
static void OpDAX1 (void)
{
- PushB (Registers.XL);
+ PushB (ICPU.Registers.XL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2738,7 +2738,7 @@ static void OpDAX1 (void)
static void OpDAX0 (void)
{
- PushW (Registers.X.W);
+ PushW (ICPU.Registers.X.W);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2747,7 +2747,7 @@ static void OpDAX0 (void)
//PHY
static void Op5AE1 (void)
{
- PushBE (Registers.YL);
+ PushBE (ICPU.Registers.YL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2755,7 +2755,7 @@ static void Op5AE1 (void)
static void Op5AX1 (void)
{
- PushB (Registers.YL);
+ PushB (ICPU.Registers.YL);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2763,7 +2763,7 @@ static void Op5AX1 (void)
static void Op5AX0 (void)
{
- PushW (Registers.Y.W);
+ PushW (ICPU.Registers.Y.W);
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
@@ -2772,32 +2772,32 @@ static void Op5AX0 (void)
/* PULL Instructions ************************************************************************* */
#define PullW(w) \
- w = S9xGetByte (++Registers.S.W); \
- w |= (S9xGetByte (++Registers.S.W)<<8);
+ w = S9xGetByte (++ICPU.Registers.S.W); \
+ w |= (S9xGetByte (++ICPU.Registers.S.W)<<8);
-/* w = S9xGetWord (Registers.S.W + 1); \
- Registers.S.W += 2;
+/* w = S9xGetWord (ICPU.Registers.S.W + 1); \
+ ICPU.Registers.S.W += 2;
*/
#define PullB(b)\
- b = S9xGetByte (++Registers.S.W);
+ b = S9xGetByte (++ICPU.Registers.S.W);
#define PullBE(b)\
- Registers.S.W++;\
- Registers.SH=0x01;\
- b = S9xGetByte (Registers.S.W);
+ ICPU.Registers.S.W++;\
+ ICPU.Registers.SH=0x01;\
+ b = S9xGetByte (ICPU.Registers.S.W);
#define PullWE(w) \
- Registers.S.W++;\
- Registers.SH=0x01;\
- w = S9xGetByte (Registers.S.W); \
- Registers.S.W++; \
- Registers.SH=0x01;\
- w |= (S9xGetByte (Registers.S.W)<<8);
+ ICPU.Registers.S.W++;\
+ ICPU.Registers.SH=0x01;\
+ w = S9xGetByte (ICPU.Registers.S.W); \
+ ICPU.Registers.S.W++; \
+ ICPU.Registers.SH=0x01;\
+ w |= (S9xGetByte (ICPU.Registers.S.W)<<8);
#define PullWENew(w) \
PullW(w);\
- Registers.SH=0x01;
+ ICPU.Registers.SH=0x01;
//PLA
static void Op68E1 (void)
@@ -2805,8 +2805,8 @@ static void Op68E1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullBE (Registers.AL);
- SetZN8 (Registers.AL);
+ PullBE (ICPU.Registers.AL);
+ SetZN8 (ICPU.Registers.AL);
}
static void Op68M1 (void)
@@ -2814,8 +2814,8 @@ static void Op68M1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullB (Registers.AL);
- SetZN8 (Registers.AL);
+ PullB (ICPU.Registers.AL);
+ SetZN8 (ICPU.Registers.AL);
}
static void Op68M0 (void)
@@ -2823,8 +2823,8 @@ static void Op68M0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullW (Registers.A.W);
- SetZN16 (Registers.A.W);
+ PullW (ICPU.Registers.A.W);
+ SetZN16 (ICPU.Registers.A.W);
}
//PLB
@@ -2833,9 +2833,9 @@ static void OpABE1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullBE (Registers.DB);
- SetZN8 (Registers.DB);
- ICPU.ShiftedDB = Registers.DB << 16;
+ PullBE (ICPU.Registers.DB);
+ SetZN8 (ICPU.Registers.DB);
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
}
static void OpAB (void)
@@ -2843,9 +2843,9 @@ static void OpAB (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullB (Registers.DB);
- SetZN8 (Registers.DB);
- ICPU.ShiftedDB = Registers.DB << 16;
+ PullB (ICPU.Registers.DB);
+ SetZN8 (ICPU.Registers.DB);
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
}
/* PHP */
@@ -2855,8 +2855,8 @@ static void Op2BE1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullWENew (Registers.D.W);
- SetZN16 (Registers.D.W);
+ PullWENew (ICPU.Registers.D.W);
+ SetZN16 (ICPU.Registers.D.W);
}
static void Op2B (void)
@@ -2864,8 +2864,8 @@ static void Op2B (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullW (Registers.D.W);
- SetZN16 (Registers.D.W);
+ PullW (ICPU.Registers.D.W);
+ SetZN16 (ICPU.Registers.D.W);
}
/* PLP */
@@ -2874,13 +2874,13 @@ static void Op28E1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullBE (Registers.PL);
+ PullBE (ICPU.Registers.PL);
S9xUnpackStatus ();
if (CheckIndex ())
{
- Registers.XH = 0;
- Registers.YH = 0;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
}
S9xFixCycles();
/* CHECK_FOR_IRQ();*/
@@ -2891,13 +2891,13 @@ static void Op28 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullB (Registers.PL);
+ PullB (ICPU.Registers.PL);
S9xUnpackStatus ();
if (CheckIndex ())
{
- Registers.XH = 0;
- Registers.YH = 0;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
}
S9xFixCycles();
/* CHECK_FOR_IRQ();*/
@@ -2909,8 +2909,8 @@ static void OpFAE1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullBE (Registers.XL);
- SetZN8 (Registers.XL);
+ PullBE (ICPU.Registers.XL);
+ SetZN8 (ICPU.Registers.XL);
}
static void OpFAX1 (void)
@@ -2918,8 +2918,8 @@ static void OpFAX1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullB (Registers.XL);
- SetZN8 (Registers.XL);
+ PullB (ICPU.Registers.XL);
+ SetZN8 (ICPU.Registers.XL);
}
static void OpFAX0 (void)
@@ -2927,8 +2927,8 @@ static void OpFAX0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullW (Registers.X.W);
- SetZN16 (Registers.X.W);
+ PullW (ICPU.Registers.X.W);
+ SetZN16 (ICPU.Registers.X.W);
}
//PLY
@@ -2937,8 +2937,8 @@ static void Op7AE1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullBE (Registers.YL);
- SetZN8 (Registers.YL);
+ PullBE (ICPU.Registers.YL);
+ SetZN8 (ICPU.Registers.YL);
}
static void Op7AX1 (void)
@@ -2946,8 +2946,8 @@ static void Op7AX1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullB (Registers.YL);
- SetZN8 (Registers.YL);
+ PullB (ICPU.Registers.YL);
+ SetZN8 (ICPU.Registers.YL);
}
static void Op7AX0 (void)
@@ -2955,8 +2955,8 @@ static void Op7AX0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
- PullW (Registers.Y.W);
- SetZN16 (Registers.Y.W);
+ PullW (ICPU.Registers.Y.W);
+ SetZN16 (ICPU.Registers.Y.W);
}
/**********************************************************************************************/
@@ -2998,8 +2998,8 @@ static void OpAAX1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.XL = Registers.AL;
- SetZN8 (Registers.XL);
+ ICPU.Registers.XL = ICPU.Registers.AL;
+ SetZN8 (ICPU.Registers.XL);
}
/* TAX16 */
@@ -3008,8 +3008,8 @@ static void OpAAX0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.X.W = Registers.A.W;
- SetZN16 (Registers.X.W);
+ ICPU.Registers.X.W = ICPU.Registers.A.W;
+ SetZN16 (ICPU.Registers.X.W);
}
/* TAY8 */
@@ -3018,8 +3018,8 @@ static void OpA8X1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.YL = Registers.AL;
- SetZN8 (Registers.YL);
+ ICPU.Registers.YL = ICPU.Registers.AL;
+ SetZN8 (ICPU.Registers.YL);
}
/* TAY16 */
@@ -3028,8 +3028,8 @@ static void OpA8X0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.Y.W = Registers.A.W;
- SetZN16 (Registers.Y.W);
+ ICPU.Registers.Y.W = ICPU.Registers.A.W;
+ SetZN16 (ICPU.Registers.Y.W);
}
static void Op5B (void)
@@ -3037,8 +3037,8 @@ static void Op5B (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.D.W = Registers.A.W;
- SetZN16 (Registers.D.W);
+ ICPU.Registers.D.W = ICPU.Registers.A.W;
+ SetZN16 (ICPU.Registers.D.W);
}
static void Op1B (void)
@@ -3046,9 +3046,9 @@ static void Op1B (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.S.W = Registers.A.W;
+ ICPU.Registers.S.W = ICPU.Registers.A.W;
if (CheckEmulation())
- Registers.SH = 1;
+ ICPU.Registers.SH = 1;
}
static void Op7B (void)
@@ -3056,8 +3056,8 @@ static void Op7B (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.A.W = Registers.D.W;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = ICPU.Registers.D.W;
+ SetZN16 (ICPU.Registers.A.W);
}
static void Op3B (void)
@@ -3065,8 +3065,8 @@ static void Op3B (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.A.W = Registers.S.W;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = ICPU.Registers.S.W;
+ SetZN16 (ICPU.Registers.A.W);
}
static void OpBAX1 (void)
@@ -3074,8 +3074,8 @@ static void OpBAX1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.XL = Registers.SL;
- SetZN8 (Registers.XL);
+ ICPU.Registers.XL = ICPU.Registers.SL;
+ SetZN8 (ICPU.Registers.XL);
}
static void OpBAX0 (void)
@@ -3083,8 +3083,8 @@ static void OpBAX0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.X.W = Registers.S.W;
- SetZN16 (Registers.X.W);
+ ICPU.Registers.X.W = ICPU.Registers.S.W;
+ SetZN16 (ICPU.Registers.X.W);
}
static void Op8AM1 (void)
@@ -3092,8 +3092,8 @@ static void Op8AM1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.AL = Registers.XL;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL = ICPU.Registers.XL;
+ SetZN8 (ICPU.Registers.AL);
}
static void Op8AM0 (void)
@@ -3101,8 +3101,8 @@ static void Op8AM0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.A.W = Registers.X.W;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = ICPU.Registers.X.W;
+ SetZN16 (ICPU.Registers.A.W);
}
static void Op9A (void)
@@ -3110,9 +3110,9 @@ static void Op9A (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.S.W = Registers.X.W;
+ ICPU.Registers.S.W = ICPU.Registers.X.W;
if (CheckEmulation())
- Registers.SH = 1;
+ ICPU.Registers.SH = 1;
}
static void Op9BX1 (void)
@@ -3120,8 +3120,8 @@ static void Op9BX1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.YL = Registers.XL;
- SetZN8 (Registers.YL);
+ ICPU.Registers.YL = ICPU.Registers.XL;
+ SetZN8 (ICPU.Registers.YL);
}
static void Op9BX0 (void)
@@ -3129,8 +3129,8 @@ static void Op9BX0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.Y.W = Registers.X.W;
- SetZN16 (Registers.Y.W);
+ ICPU.Registers.Y.W = ICPU.Registers.X.W;
+ SetZN16 (ICPU.Registers.Y.W);
}
static void Op98M1 (void)
@@ -3138,8 +3138,8 @@ static void Op98M1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.AL = Registers.YL;
- SetZN8 (Registers.AL);
+ ICPU.Registers.AL = ICPU.Registers.YL;
+ SetZN8 (ICPU.Registers.AL);
}
static void Op98M0 (void)
@@ -3147,8 +3147,8 @@ static void Op98M0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.A.W = Registers.Y.W;
- SetZN16 (Registers.A.W);
+ ICPU.Registers.A.W = ICPU.Registers.Y.W;
+ SetZN16 (ICPU.Registers.A.W);
}
static void OpBBX1 (void)
@@ -3156,8 +3156,8 @@ static void OpBBX1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.XL = Registers.YL;
- SetZN8 (Registers.XL);
+ ICPU.Registers.XL = ICPU.Registers.YL;
+ SetZN8 (ICPU.Registers.XL);
}
static void OpBBX0 (void)
@@ -3165,8 +3165,8 @@ static void OpBBX0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE;
#endif
- Registers.X.W = Registers.Y.W;
- SetZN16 (Registers.X.W);
+ ICPU.Registers.X.W = ICPU.Registers.Y.W;
+ SetZN16 (ICPU.Registers.X.W);
}
/**********************************************************************************************/
@@ -3179,20 +3179,20 @@ static void OpFB (void)
#endif
uint8 A1 = ICPU._Carry;
- uint8 A2 = Registers.PH;
+ uint8 A2 = ICPU.Registers.PH;
ICPU._Carry = A2 & 1;
- Registers.PH = A1;
+ ICPU.Registers.PH = A1;
if (CheckEmulation())
{
SetFlags (MemoryFlag | IndexFlag);
- Registers.SH = 1;
+ ICPU.Registers.SH = 1;
missing.emulate6502 = 1;
}
if (CheckIndex ())
{
- Registers.XH = 0;
- Registers.YH = 0;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
}
S9xFixCycles();
}
@@ -3212,17 +3212,17 @@ static void Op00 (void)
if (!CheckEmulation())
{
- PushB (Registers.PB);
+ PushB (ICPU.Registers.PB);
PushW (CPU.PC - CPU.PCBase + 1);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
S9xSetPCBase (S9xGetWord (0xFFE6));
#ifndef SA1_OPCODES
@@ -3233,14 +3233,14 @@ static void Op00 (void)
{
PushW (CPU.PC - CPU.PCBase);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
S9xSetPCBase (S9xGetWord (0xFFFE));
#ifndef SA1_OPCODES
@@ -3267,17 +3267,17 @@ void S9xOpcode_IRQ (void)
#endif
if (!CheckEmulation())
{
- PushB (Registers.PB);
+ PushB (ICPU.Registers.PB);
PushW (CPU.PC - CPU.PCBase);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
#ifdef SA1_OPCODES
S9xSA1SetPCBase (Memory.FillRAM [0x2207] |
@@ -3297,14 +3297,14 @@ void S9xOpcode_IRQ (void)
{
PushW (CPU.PC - CPU.PCBase);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
#ifdef SA1_OPCODES
S9xSA1SetPCBase (Memory.FillRAM [0x2207] |
@@ -3333,17 +3333,17 @@ void S9xOpcode_NMI (void)
#endif
if (!CheckEmulation())
{
- PushB (Registers.PB);
+ PushB (ICPU.Registers.PB);
PushW (CPU.PC - CPU.PCBase);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
#ifdef SA1_OPCODES
S9xSA1SetPCBase (Memory.FillRAM [0x2205] |
@@ -3363,14 +3363,14 @@ void S9xOpcode_NMI (void)
{
PushW (CPU.PC - CPU.PCBase);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
#ifdef SA1_OPCODES
S9xSA1SetPCBase (Memory.FillRAM [0x2205] |
@@ -3398,17 +3398,17 @@ static void Op02 (void)
#endif
if (!CheckEmulation())
{
- PushB (Registers.PB);
+ PushB (ICPU.Registers.PB);
PushW (CPU.PC - CPU.PCBase + 1);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
S9xSetPCBase (S9xGetWord (0xFFE4));
#ifndef SA1_OPCODES
@@ -3419,14 +3419,14 @@ static void Op02 (void)
{
PushW (CPU.PC - CPU.PCBase);
S9xPackStatus ();
- PushB (Registers.PL);
+ PushB (ICPU.Registers.PL);
#ifndef NO_OPEN_BUS
- OpenBus = Registers.PL;
+ OpenBus = ICPU.Registers.PL;
#endif
ClearDecimal ();
SetIRQ ();
- Registers.PB = 0;
+ ICPU.Registers.PB = 0;
ICPU.ShiftedPB = 0;
S9xSetPCBase (S9xGetWord (0xFFF4));
#ifndef SA1_OPCODES
@@ -3440,7 +3440,7 @@ static void Op02 (void)
static void OpDC (void)
{
AbsoluteIndirectLong (JUMP, OpAddressPassthrough);
- Registers.PB = (uint8) (OpAddress >> 16);
+ ICPU.Registers.PB = (uint8) (OpAddress >> 16);
ICPU.ShiftedPB = OpAddress & 0xff0000;
S9xSetPCBase (OpAddress);
#ifndef SA1_OPCODES
@@ -3451,7 +3451,7 @@ static void OpDC (void)
static void Op5C (void)
{
AbsoluteLong (JUMP, OpAddressPassthrough);
- Registers.PB = (uint8) (OpAddress >> 16);
+ ICPU.Registers.PB = (uint8) (OpAddress >> 16);
ICPU.ShiftedPB = OpAddress & 0xff0000;
S9xSetPCBase (OpAddress);
}
@@ -3487,9 +3487,9 @@ static void Op7C (void)
static void Op22E1 (void)
{
AbsoluteLong (JUMP, OpAddressPassthrough);
- PushB (Registers.PB);
+ PushB (ICPU.Registers.PB);
PushWENew (CPU.PC - CPU.PCBase - 1);
- Registers.PB = (uint8) (OpAddress >> 16);
+ ICPU.Registers.PB = (uint8) (OpAddress >> 16);
ICPU.ShiftedPB = OpAddress & 0xff0000;
S9xSetPCBase (OpAddress);
}
@@ -3497,19 +3497,19 @@ static void Op22E1 (void)
static void Op22 (void)
{
AbsoluteLong (JUMP, OpAddressPassthrough);
- PushB (Registers.PB);
+ PushB (ICPU.Registers.PB);
PushW (CPU.PC - CPU.PCBase - 1);
- Registers.PB = (uint8) (OpAddress >> 16);
+ ICPU.Registers.PB = (uint8) (OpAddress >> 16);
ICPU.ShiftedPB = OpAddress & 0xff0000;
S9xSetPCBase (OpAddress);
}
static void Op6BE1 (void)
{
- PullWENew (Registers.PC);
- PullB (Registers.PB);
- ICPU.ShiftedPB = Registers.PB << 16;
- S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff));
+ PullWENew (ICPU.Registers.PC);
+ PullB (ICPU.Registers.PB);
+ ICPU.ShiftedPB = ICPU.Registers.PB << 16;
+ S9xSetPCBase (ICPU.ShiftedPB + ((ICPU.Registers.PC + 1) & 0xffff));
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
@@ -3517,10 +3517,10 @@ static void Op6BE1 (void)
static void Op6B (void)
{
- PullW (Registers.PC);
- PullB (Registers.PB);
- ICPU.ShiftedPB = Registers.PB << 16;
- S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff));
+ PullW (ICPU.Registers.PC);
+ PullB (ICPU.Registers.PB);
+ ICPU.ShiftedPB = ICPU.Registers.PB << 16;
+ S9xSetPCBase (ICPU.ShiftedPB + ((ICPU.Registers.PC + 1) & 0xffff));
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
@@ -3561,8 +3561,8 @@ static void OpFC (void)
static void Op60 (void)
{
- PullW (Registers.PC);
- S9xSetPCBase (ICPU.ShiftedPB + ((Registers.PC + 1) & 0xffff));
+ PullW (ICPU.Registers.PC);
+ S9xSetPCBase (ICPU.ShiftedPB + ((ICPU.Registers.PC + 1) & 0xffff));
#ifndef SA1_OPCODES
CPU.Cycles += ONE_CYCLE * 3;
#endif
@@ -3579,20 +3579,20 @@ static void Op54X1 (void)
CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
#endif
- Registers.DB = *CPU.PC++;
- ICPU.ShiftedDB = Registers.DB << 16;
+ ICPU.Registers.DB = *CPU.PC++;
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
#ifndef NO_OPEN_BUS
OpenBus =
#endif
SrcBank = *CPU.PC++;
- S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
- ICPU.ShiftedDB + Registers.Y.W);
+ S9xSetByte (S9xGetByte ((SrcBank << 16) + ICPU.Registers.X.W),
+ ICPU.ShiftedDB + ICPU.Registers.Y.W);
- Registers.XL++;
- Registers.YL++;
- Registers.A.W--;
- if (Registers.A.W != 0xffff)
+ ICPU.Registers.XL++;
+ ICPU.Registers.YL++;
+ ICPU.Registers.A.W--;
+ if (ICPU.Registers.A.W != 0xffff)
CPU.PC -= 3;
}
@@ -3604,20 +3604,20 @@ static void Op54X0 (void)
CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
#endif
- Registers.DB = *CPU.PC++;
- ICPU.ShiftedDB = Registers.DB << 16;
+ ICPU.Registers.DB = *CPU.PC++;
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
#ifndef NO_OPEN_BUS
OpenBus =
#endif
SrcBank = *CPU.PC++;
- S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
- ICPU.ShiftedDB + Registers.Y.W);
+ S9xSetByte (S9xGetByte ((SrcBank << 16) + ICPU.Registers.X.W),
+ ICPU.ShiftedDB + ICPU.Registers.Y.W);
- Registers.X.W++;
- Registers.Y.W++;
- Registers.A.W--;
- if (Registers.A.W != 0xffff)
+ ICPU.Registers.X.W++;
+ ICPU.Registers.Y.W++;
+ ICPU.Registers.A.W--;
+ if (ICPU.Registers.A.W != 0xffff)
CPU.PC -= 3;
}
@@ -3628,19 +3628,19 @@ static void Op44X1 (void)
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
#endif
- Registers.DB = *CPU.PC++;
- ICPU.ShiftedDB = Registers.DB << 16;
+ ICPU.Registers.DB = *CPU.PC++;
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
#ifndef NO_OPEN_BUS
OpenBus =
#endif
SrcBank = *CPU.PC++;
- S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
- ICPU.ShiftedDB + Registers.Y.W);
+ S9xSetByte (S9xGetByte ((SrcBank << 16) + ICPU.Registers.X.W),
+ ICPU.ShiftedDB + ICPU.Registers.Y.W);
- Registers.XL--;
- Registers.YL--;
- Registers.A.W--;
- if (Registers.A.W != 0xffff)
+ ICPU.Registers.XL--;
+ ICPU.Registers.YL--;
+ ICPU.Registers.A.W--;
+ if (ICPU.Registers.A.W != 0xffff)
CPU.PC -= 3;
}
@@ -3651,19 +3651,19 @@ static void Op44X0 (void)
#ifndef SA1_OPCODES
CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
#endif
- Registers.DB = *CPU.PC++;
- ICPU.ShiftedDB = Registers.DB << 16;
+ ICPU.Registers.DB = *CPU.PC++;
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
#ifndef NO_OPEN_BUS
OpenBus =
#endif
SrcBank = *CPU.PC++;
- S9xSetByte (S9xGetByte ((SrcBank << 16) + Registers.X.W),
- ICPU.ShiftedDB + Registers.Y.W);
+ S9xSetByte (S9xGetByte ((SrcBank << 16) + ICPU.Registers.X.W),
+ ICPU.ShiftedDB + ICPU.Registers.Y.W);
- Registers.X.W--;
- Registers.Y.W--;
- Registers.A.W--;
- if (Registers.A.W != 0xffff)
+ ICPU.Registers.X.W--;
+ ICPU.Registers.Y.W--;
+ ICPU.Registers.A.W--;
+ if (ICPU.Registers.A.W != 0xffff)
CPU.PC -= 3;
}
@@ -3673,7 +3673,7 @@ static void Op44X0 (void)
static void OpC2 (void)
{
uint8 Work8 = ~*CPU.PC++;
- Registers.PL &= Work8;
+ ICPU.Registers.PL &= Work8;
ICPU._Carry &= Work8;
ICPU._Overflow &= (Work8 >> 6);
ICPU._Negative &= Work8;
@@ -3689,8 +3689,8 @@ static void OpC2 (void)
}
if (CheckIndex ())
{
- Registers.XH = 0;
- Registers.YH = 0;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
}
S9xFixCycles();
/* CHECK_FOR_IRQ(); */
@@ -3699,7 +3699,7 @@ static void OpC2 (void)
static void OpE2 (void)
{
uint8 Work8 = *CPU.PC++;
- Registers.PL |= Work8;
+ ICPU.Registers.PL |= Work8;
ICPU._Carry |= Work8 & 1;
ICPU._Overflow |= (Work8 >> 6) & 1;
ICPU._Negative |= Work8;
@@ -3715,8 +3715,8 @@ static void OpE2 (void)
}
if (CheckIndex ())
{
- Registers.XH = 0;
- Registers.YH = 0;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
}
S9xFixCycles();
}
@@ -3725,11 +3725,11 @@ static void OpE2 (void)
/* XBA *************************************************************************************** */
static void OpEB (void)
{
- uint8 Work8 = Registers.AL;
- Registers.AL = Registers.AH;
- Registers.AH = Work8;
+ uint8 Work8 = ICPU.Registers.AL;
+ ICPU.Registers.AL = ICPU.Registers.AH;
+ ICPU.Registers.AH = Work8;
- SetZN8 (Registers.AL);
+ SetZN8 (ICPU.Registers.AL);
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
#endif
@@ -3739,24 +3739,24 @@ static void OpEB (void)
/* RTI *************************************************************************************** */
static void Op40 (void)
{
- PullB (Registers.PL);
+ PullB (ICPU.Registers.PL);
S9xUnpackStatus ();
- PullW (Registers.PC);
+ PullW (ICPU.Registers.PC);
if (!CheckEmulation())
{
- PullB (Registers.PB);
- ICPU.ShiftedPB = Registers.PB << 16;
+ PullB (ICPU.Registers.PB);
+ ICPU.ShiftedPB = ICPU.Registers.PB << 16;
}
else
{
SetFlags (MemoryFlag | IndexFlag);
missing.emulate6502 = 1;
}
- S9xSetPCBase (ICPU.ShiftedPB + Registers.PC);
+ S9xSetPCBase (ICPU.ShiftedPB + ICPU.Registers.PC);
if (CheckIndex ())
{
- Registers.XH = 0;
- Registers.YH = 0;
+ ICPU.Registers.XH = 0;
+ ICPU.Registers.YH = 0;
}
#ifndef SA1_OPCODES
CPU.Cycles += TWO_CYCLES;
diff --git a/source/globals.cpp b/source/globals.cpp
index ca2b12b..adb9ab4 100644
--- a/source/globals.cpp
+++ b/source/globals.cpp
@@ -113,20 +113,14 @@ struct SICPU ICPU;
struct SCPUState CPU;
-struct SRegisters Registers;
-
struct SAPU APU;
struct SIAPU IAPU;
-struct SAPURegisters APURegisters;
-
struct SSettings Settings;
struct SDSP1 DSP1;
-struct SSA1Registers SA1Registers;
-
struct SSA1 SA1;
SSoundData SoundData;
@@ -361,7 +355,7 @@ struct SNetPlay NetPlay;
#endif
// Raw SPC700 instruction cycle lengths
-int32 S9xAPUCycleLengths [256] =
+uint16 S9xAPUCycleLengths [256] =
{
/* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */
/* 00 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 6, 8,
@@ -384,7 +378,7 @@ int32 S9xAPUCycleLengths [256] =
// Actual data used by CPU emulation, will be scaled by APUReset routine
// to be relative to the 65c816 instruction lengths.
-int32 S9xAPUCycles [256] =
+uint16 S9xAPUCycles [256] =
{
/* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */
/* 00 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 6, 8,
diff --git a/source/sa1.cpp b/source/sa1.cpp
index eb10d33..1f6b13f 100644
--- a/source/sa1.cpp
+++ b/source/sa1.cpp
@@ -122,16 +122,16 @@ void S9xSA1Init ()
void S9xSA1Reset ()
{
- SA1Registers.PB = 0;
- SA1Registers.PC = Memory.FillRAM [0x2203] |
+ SA1.Registers.PB = 0;
+ SA1.Registers.PC = Memory.FillRAM [0x2203] |
(Memory.FillRAM [0x2204] << 8);
- SA1Registers.D.W = 0;
- SA1Registers.DB = 0;
- SA1Registers.SH = 1;
- SA1Registers.SL = 0xFF;
- SA1Registers.XH = 0;
- SA1Registers.YH = 0;
- SA1Registers.P.W = 0;
+ SA1.Registers.D.W = 0;
+ SA1.Registers.DB = 0;
+ SA1.Registers.SH = 1;
+ SA1.Registers.SL = 0xFF;
+ SA1.Registers.XH = 0;
+ SA1.Registers.YH = 0;
+ SA1.Registers.P.W = 0;
SA1.ShiftedPB = 0;
SA1.ShiftedDB = 0;
@@ -141,7 +141,7 @@ void S9xSA1Reset ()
SA1.WaitingForInterrupt = FALSE;
SA1.PC = NULL;
SA1.PCBase = NULL;
- S9xSA1SetPCBase (SA1Registers.PC);
+ S9xSA1SetPCBase (SA1.Registers.PC);
SA1.S9xOpcodes = S9xSA1OpcodesM1X1;
S9xSA1UnpackStatus();
@@ -181,10 +181,10 @@ void S9xSA1SetBWRAMMemMap (uint8 val)
void S9xFixSA1AfterSnapshotLoad ()
{
- SA1.ShiftedPB = (uint32) SA1Registers.PB << 16;
- SA1.ShiftedDB = (uint32) SA1Registers.DB << 16;
+ SA1.ShiftedPB = (uint32) SA1.Registers.PB << 16;
+ SA1.ShiftedDB = (uint32) SA1.Registers.DB << 16;
- S9xSA1SetPCBase (SA1.ShiftedPB + SA1Registers.PC);
+ S9xSA1SetPCBase (SA1.ShiftedPB + SA1.Registers.PC);
S9xSA1UnpackStatus ();
S9xSA1FixCycles ();
SA1.VirtualBitmapFormat = (Memory.FillRAM [0x223f] & 0x80) ? 2 : 4;
diff --git a/source/sa1.h b/source/sa1.h
index 21353d5..708fb68 100644
--- a/source/sa1.h
+++ b/source/sa1.h
@@ -141,21 +141,22 @@ struct SSA1 {
uint8 VirtualBitmapFormat;
bool8 in_char_dma;
uint8 variable_bit_pos;
+ struct SSA1Registers Registers;
};
#define SA1CheckZero() (SA1._Zero == 0)
#define SA1CheckCarry() (SA1._Carry)
-#define SA1CheckIRQ() (SA1Registers.PL & IRQ)
-#define SA1CheckDecimal() (SA1Registers.PL & Decimal)
-#define SA1CheckIndex() (SA1Registers.PL & IndexFlag)
-#define SA1CheckMemory() (SA1Registers.PL & MemoryFlag)
+#define SA1CheckIRQ() (SA1.Registers.PL & IRQ)
+#define SA1CheckDecimal() (SA1.Registers.PL & Decimal)
+#define SA1CheckIndex() (SA1.Registers.PL & IndexFlag)
+#define SA1CheckMemory() (SA1.Registers.PL & MemoryFlag)
#define SA1CheckOverflow() (SA1._Overflow)
#define SA1CheckNegative() (SA1._Negative & 0x80)
-#define SA1CheckEmulation() (SA1Registers.P.W & Emulation)
+#define SA1CheckEmulation() (SA1.Registers.P.W & Emulation)
-#define SA1ClearFlags(f) (SA1Registers.P.W &= ~(f))
-#define SA1SetFlags(f) (SA1Registers.P.W |= (f))
-#define SA1CheckFlag(f) (SA1Registers.PL & (f))
+#define SA1ClearFlags(f) (SA1.Registers.P.W &= ~(f))
+#define SA1SetFlags(f) (SA1.Registers.P.W |= (f))
+#define SA1CheckFlag(f) (SA1.Registers.PL & (f))
START_EXTERN_C
@@ -171,7 +172,6 @@ extern struct SOpcodes S9xSA1OpcodesM1X1 [256];
extern struct SOpcodes S9xSA1OpcodesM1X0 [256];
extern struct SOpcodes S9xSA1OpcodesM0X1 [256];
extern struct SOpcodes S9xSA1OpcodesM0X0 [256];
-extern struct SSA1Registers SA1Registers;
extern struct SSA1 SA1;
void S9xSA1MainLoop ();
@@ -186,16 +186,16 @@ END_EXTERN_C
STATIC inline void S9xSA1UnpackStatus()
{
- SA1._Zero = (SA1Registers.PL & Zero) == 0;
- SA1._Negative = (SA1Registers.PL & Negative);
- SA1._Carry = (SA1Registers.PL & Carry);
- SA1._Overflow = (SA1Registers.PL & Overflow) >> 6;
+ SA1._Zero = (SA1.Registers.PL & Zero) == 0;
+ SA1._Negative = (SA1.Registers.PL & Negative);
+ SA1._Carry = (SA1.Registers.PL & Carry);
+ SA1._Overflow = (SA1.Registers.PL & Overflow) >> 6;
}
STATIC inline void S9xSA1PackStatus()
{
- SA1Registers.PL &= ~(Zero | Negative | Carry | Overflow);
- SA1Registers.PL |= SA1._Carry | ((SA1._Zero == 0) << 1) |
+ SA1.Registers.PL &= ~(Zero | Negative | Carry | Overflow);
+ SA1.Registers.PL |= SA1._Carry | ((SA1._Zero == 0) << 1) |
(SA1._Negative & 0x80) | (SA1._Overflow << 6);
}
diff --git a/source/sa1cpu.cpp b/source/sa1cpu.cpp
index 655fa5c..5382528 100644
--- a/source/sa1cpu.cpp
+++ b/source/sa1cpu.cpp
@@ -95,7 +95,6 @@
#include "sa1.h"
#define CPU SA1
#define ICPU SA1
-#define Registers SA1Registers
#define S9xGetByte S9xSA1GetByte
#define S9xGetWord S9xSA1GetWord
#define S9xSetByte S9xSA1SetByte
diff --git a/source/snaporig.cpp b/source/snaporig.cpp
index 090c378..219f67f 100644
--- a/source/snaporig.cpp
+++ b/source/snaporig.cpp
@@ -230,7 +230,7 @@ static int ReadOrigSnapshot (STREAM snap)
if ((result = ReadBlock ("REG:", &OrigRegisters, sizeof (OrigRegisters), snap)) != SUCCESS)
return (result);
- Registers = *(struct SRegisters *) &OrigRegisters;
+ ICPU.Registers = *(struct SRegisters *) &OrigRegisters;
if ((result = ReadBlock ("PPU:", &OrigPPU, sizeof (OrigPPU), snap)) != SUCCESS)
return (result);
@@ -379,7 +379,7 @@ static int ReadOrigSnapshot (STREAM snap)
if ((result = ReadBlock ("ARE:", &OrigAPURegisters,
sizeof (OrigAPURegisters), snap)) != SUCCESS)
return (result);
- APURegisters = *(struct SAPURegisters *) &OrigAPURegisters;
+ IAPU.Registers = *(struct SAPURegisters *) &OrigAPURegisters;
if ((result = ReadBlock ("ARA:", IAPU.RAM, 0x10000, snap)) != SUCCESS)
return (result);
if ((result = ReadBlock ("SOU:", &OrigSoundData,
@@ -437,7 +437,7 @@ static int ReadOrigSnapshot (STREAM snap)
}
S9xSetSoundMute (FALSE);
- IAPU.PC = IAPU.RAM + APURegisters.PC;
+ IAPU.PC = IAPU.RAM + IAPU.Registers.PC;
S9xAPUUnpackStatus ();
if (APUCheckDirectPage ())
IAPU.DirectPage = IAPU.RAM + 0x100;
@@ -453,9 +453,9 @@ static int ReadOrigSnapshot (STREAM snap)
S9xSetSoundMute (TRUE);
}
S9xFixSoundAfterSnapshotLoad ();
- ICPU.ShiftedPB = Registers.PB << 16;
- ICPU.ShiftedDB = Registers.DB << 16;
- S9xSetPCBase (ICPU.ShiftedPB + Registers.PC);
+ ICPU.ShiftedPB = ICPU.Registers.PB << 16;
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
+ S9xSetPCBase (ICPU.ShiftedPB + ICPU.Registers.PC);
S9xUnpackStatus ();
S9xFixCycles ();
S9xReschedule ();
diff --git a/source/snapshot.cpp b/source/snapshot.cpp
index fda8d62..8dd7f8c 100644
--- a/source/snapshot.cpp
+++ b/source/snapshot.cpp
@@ -658,7 +658,7 @@ void S9xFreezeToStream (STREAM stream)
Memory.ROMFilename, 0);
WRITE_STREAM (buffer, strlen (buffer) + 1, stream);
FreezeStruct (stream, "CPU", &CPU, SnapCPU, COUNT (SnapCPU));
- FreezeStruct (stream, "REG", &Registers, SnapRegisters, COUNT (SnapRegisters));
+ FreezeStruct (stream, "REG", &ICPU.Registers, SnapRegisters, COUNT (SnapRegisters));
FreezeStruct (stream, "PPU", &PPU, SnapPPU, COUNT (SnapPPU));
FreezeStruct (stream, "DMA", DMA, SnapDMA, COUNT (SnapDMA));
@@ -671,7 +671,7 @@ void S9xFreezeToStream (STREAM stream)
{
// APU
FreezeStruct (stream, "APU", &APU, SnapAPU, COUNT (SnapAPU));
- FreezeStruct (stream, "ARE", &APURegisters, SnapAPURegisters,
+ FreezeStruct (stream, "ARE", &IAPU.Registers, SnapAPURegisters,
COUNT (SnapAPURegisters));
FreezeBlock (stream, "ARA", IAPU.RAM, 0x10000);
FreezeStruct (stream, "SOU", &SoundData, SnapSoundData,
@@ -679,10 +679,10 @@ void S9xFreezeToStream (STREAM stream)
}
if (Settings.SA1)
{
- SA1Registers.PC = SA1.PC - SA1.PCBase;
+ SA1.Registers.PC = SA1.PC - SA1.PCBase;
S9xSA1PackStatus ();
FreezeStruct (stream, "SA1", &SA1, SnapSA1, COUNT (SnapSA1));
- FreezeStruct (stream, "SAR", &SA1Registers, SnapSA1Registers,
+ FreezeStruct (stream, "SAR", &SA1.Registers, SnapSA1Registers,
COUNT (SnapSA1Registers));
}
@@ -841,7 +841,7 @@ int S9xUnfreezeFromStream (STREAM stream)
S9xSetSoundMute (TRUE);
UnfreezeStructFromCopy (&CPU, SnapCPU, COUNT (SnapCPU), local_cpu);
- UnfreezeStructFromCopy (&Registers, SnapRegisters, COUNT (SnapRegisters), local_registers);
+ UnfreezeStructFromCopy (&ICPU.Registers, SnapRegisters, COUNT (SnapRegisters), local_registers);
UnfreezeStructFromCopy (&PPU, SnapPPU, COUNT (SnapPPU), local_ppu);
UnfreezeStructFromCopy (DMA, SnapDMA, COUNT (SnapDMA), local_dma);
memcpy (Memory.VRAM, local_vram, 0x10000);
@@ -851,14 +851,14 @@ int S9xUnfreezeFromStream (STREAM stream)
if(local_apu)
{
UnfreezeStructFromCopy (&APU, SnapAPU, COUNT (SnapAPU), local_apu);
- UnfreezeStructFromCopy (&APURegisters, SnapAPURegisters, COUNT (SnapAPURegisters), local_apu_registers);
+ UnfreezeStructFromCopy (&IAPU.Registers, SnapAPURegisters, COUNT (SnapAPURegisters), local_apu_registers);
memcpy (IAPU.RAM, local_apu_ram, 0x10000);
UnfreezeStructFromCopy (&SoundData, SnapSoundData, COUNT (SnapSoundData), local_apu_sounddata);
}
if(local_sa1)
{
UnfreezeStructFromCopy (&SA1, SnapSA1, COUNT (SnapSA1), local_sa1);
- UnfreezeStructFromCopy (&SA1Registers, SnapSA1Registers, COUNT (SnapSA1Registers), local_sa1_registers);
+ UnfreezeStructFromCopy (&SA1.Registers, SnapSA1Registers, COUNT (SnapSA1Registers), local_sa1_registers);
}
if(local_spc)
{
@@ -882,7 +882,7 @@ int S9xUnfreezeFromStream (STREAM stream)
if (local_apu)
{
S9xSetSoundMute (FALSE);
- IAPU.PC = IAPU.RAM + APURegisters.PC;
+ IAPU.PC = IAPU.RAM + IAPU.Registers.PC;
S9xAPUUnpackStatus ();
if (APUCheckDirectPage ())
IAPU.DirectPage = IAPU.RAM + 0x100;
@@ -921,9 +921,9 @@ int S9xUnfreezeFromStream (STREAM stream)
Memory.FillRAM[0x4213]=Memory.FillRAM[0x4201]=0xFF;
}
- ICPU.ShiftedPB = Registers.PB << 16;
- ICPU.ShiftedDB = Registers.DB << 16;
- S9xSetPCBase (ICPU.ShiftedPB + Registers.PC);
+ ICPU.ShiftedPB = ICPU.Registers.PB << 16;
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
+ S9xSetPCBase (ICPU.ShiftedPB + ICPU.Registers.PC);
S9xUnpackStatus ();
S9xFixCycles ();
// S9xReschedule (); // <-- this causes desync when recording or playing movies
@@ -1390,15 +1390,15 @@ bool8 S9xUnfreezeZSNES (const char *filename)
// 34 bcycpl cycles per scanline
// 35 cycphb cyclers per hblank
- Registers.A.W = READ_WORD (&t [41]);
- Registers.DB = t [43];
- Registers.PB = t [44];
- Registers.S.W = READ_WORD (&t [45]);
- Registers.D.W = READ_WORD (&t [47]);
- Registers.X.W = READ_WORD (&t [49]);
- Registers.Y.W = READ_WORD (&t [51]);
- Registers.P.W = READ_WORD (&t [53]);
- Registers.PC = READ_WORD (&t [55]);
+ ICPU.Registers.A.W = READ_WORD (&t [41]);
+ ICPU.Registers.DB = t [43];
+ ICPU.Registers.PB = t [44];
+ ICPU.Registers.S.W = READ_WORD (&t [45]);
+ ICPU.Registers.D.W = READ_WORD (&t [47]);
+ ICPU.Registers.X.W = READ_WORD (&t [49]);
+ ICPU.Registers.Y.W = READ_WORD (&t [51]);
+ ICPU.Registers.P.W = READ_WORD (&t [53]);
+ ICPU.Registers.PC = READ_WORD (&t [55]);
fread ((char*)t, 1, 8, fs);
fread ((char*)t, 1, 3019, fs);
@@ -1552,12 +1552,12 @@ bool8 S9xUnfreezeZSNES (const char *filename)
// SNES SPC700 state and internal ZSNES SPC700 emulation state
fread ((char*)t, 1, 304, fs);
- APURegisters.PC = READ_DWORD (&t [0]);
- APURegisters.YA.B.A = t [4];
- APURegisters.X = t [8];
- APURegisters.YA.B.Y = t [12];
- APURegisters.P = t [16];
- APURegisters.S = t [24];
+ IAPU.Registers.PC = READ_DWORD (&t [0]);
+ IAPU.Registers.YA.B.A = t [4];
+ IAPU.Registers.X = t [8];
+ IAPU.Registers.YA.B.Y = t [12];
+ IAPU.Registers.P = t [16];
+ IAPU.Registers.S = t [24];
APU.Cycles = READ_DWORD (&t [32]);
APU.ShowROM = (IAPU.RAM [0xf1] & 0x80) != 0;
@@ -1606,7 +1606,7 @@ bool8 S9xUnfreezeZSNES (const char *filename)
IAPU.RAM [0xf2] = saved;
S9xSetSoundMute (FALSE);
- IAPU.PC = IAPU.RAM + APURegisters.PC;
+ IAPU.PC = IAPU.RAM + IAPU.Registers.PC;
S9xAPUUnpackStatus ();
if (APUCheckDirectPage ())
IAPU.DirectPage = IAPU.RAM + 0x100;
@@ -1642,15 +1642,15 @@ bool8 S9xUnfreezeZSNES (const char *filename)
S9xSetSA1 (t [36], 0x2201);
S9xSetSA1 (t [41], 0x2209);
- SA1Registers.A.W = READ_DWORD (&t [592]);
- SA1Registers.X.W = READ_DWORD (&t [596]);
- SA1Registers.Y.W = READ_DWORD (&t [600]);
- SA1Registers.D.W = READ_DWORD (&t [604]);
- SA1Registers.DB = t [608];
- SA1Registers.PB = t [612];
- SA1Registers.S.W = READ_DWORD (&t [616]);
- SA1Registers.PC = READ_DWORD (&t [636]);
- SA1Registers.P.W = t [620] | (t [624] << 8);
+ SA1.Registers.A.W = READ_DWORD (&t [592]);
+ SA1.Registers.X.W = READ_DWORD (&t [596]);
+ SA1.Registers.Y.W = READ_DWORD (&t [600]);
+ SA1.Registers.D.W = READ_DWORD (&t [604]);
+ SA1.Registers.DB = t [608];
+ SA1.Registers.PB = t [612];
+ SA1.Registers.S.W = READ_DWORD (&t [616]);
+ SA1.Registers.PC = READ_DWORD (&t [636]);
+ SA1.Registers.P.W = t [620] | (t [624] << 8);
memmove (&Memory.FillRAM [0x3000], t + 692, 2 * 1024);
@@ -1806,9 +1806,9 @@ fread(&temp, 1, 4, fs);
IPPU.RenderThisFrame = FALSE;
S9xFixSoundAfterSnapshotLoad ();
- ICPU.ShiftedPB = Registers.PB << 16;
- ICPU.ShiftedDB = Registers.DB << 16;
- S9xSetPCBase (ICPU.ShiftedPB + Registers.PC);
+ ICPU.ShiftedPB = ICPU.Registers.PB << 16;
+ ICPU.ShiftedDB = ICPU.Registers.DB << 16;
+ S9xSetPCBase (ICPU.ShiftedPB + ICPU.Registers.PC);
S9xUnpackStatus ();
S9xFixCycles ();
S9xReschedule ();
diff --git a/source/spc700.cpp b/source/spc700.cpp
index 1cd27d3..69ed120 100644
--- a/source/spc700.cpp
+++ b/source/spc700.cpp
@@ -219,28 +219,28 @@ APUSetZN8 ((uint8) Int16);
APUSetZN8 (b);
#define Push(b)\
- *(IAPU.RAM + 0x100 + APURegisters.S) = b;\
- APURegisters.S--;
+ *(IAPU.RAM + 0x100 + IAPU.Registers.S) = b;\
+ IAPU.Registers.S--;
#define Pop(b)\
- APURegisters.S++;\
- (b) = *(IAPU.RAM + 0x100 + APURegisters.S);
+ IAPU.Registers.S++;\
+ (b) = *(IAPU.RAM + 0x100 + IAPU.Registers.S);
#ifdef FAST_LSB_WORD_ACCESS
#define PushW(w)\
- *(uint16 *) (IAPU.RAM + 0xff + APURegisters.S) = w;\
- APURegisters.S -= 2;
+ *(uint16 *) (IAPU.RAM + 0xff + IAPU.Registers.S) = w;\
+ IAPU.Registers.S -= 2;
#define PopW(w)\
- APURegisters.S += 2;\
- w = *(uint16 *) (IAPU.RAM + 0xff + APURegisters.S);
+ IAPU.Registers.S += 2;\
+ w = *(uint16 *) (IAPU.RAM + 0xff + IAPU.Registers.S);
#else
#define PushW(w)\
- *(IAPU.RAM + 0xff + APURegisters.S) = w;\
- *(IAPU.RAM + 0x100 + APURegisters.S) = (w >> 8);\
- APURegisters.S -= 2;
+ *(IAPU.RAM + 0xff + IAPU.Registers.S) = w;\
+ *(IAPU.RAM + 0x100 + IAPU.Registers.S) = (w >> 8);\
+ IAPU.Registers.S -= 2;
#define PopW(w)\
- APURegisters.S += 2; \
- (w) = *(IAPU.RAM + 0xff + APURegisters.S) + (*(IAPU.RAM + 0x100 + APURegisters.S) << 8);
+ IAPU.Registers.S += 2; \
+ (w) = *(IAPU.RAM + 0xff + IAPU.Registers.S) + (*(IAPU.RAM + 0x100 + IAPU.Registers.S) << 8);
#endif
#define Relative()\
@@ -253,16 +253,16 @@ APUSetZN8 ((uint8) Int16);
#ifdef FAST_LSB_WORD_ACCESS
#define IndexedXIndirect()\
- IAPU.Address = *(uint16 *) (IAPU.DirectPage + ((OP1 + APURegisters.X) & 0xff));
+ IAPU.Address = *(uint16 *) (IAPU.DirectPage + ((OP1 + IAPU.Registers.X) & 0xff));
#define Absolute()\
IAPU.Address = *(uint16 *) (IAPU.PC + 1);
#define AbsoluteX()\
- IAPU.Address = *(uint16 *) (IAPU.PC + 1) + APURegisters.X;
+ IAPU.Address = *(uint16 *) (IAPU.PC + 1) + IAPU.Registers.X;
#define AbsoluteY()\
- IAPU.Address = *(uint16 *) (IAPU.PC + 1) + APURegisters.YA.B.Y;
+ IAPU.Address = *(uint16 *) (IAPU.PC + 1) + IAPU.Registers.YA.B.Y;
#define MemBit()\
IAPU.Address = *(uint16 *) (IAPU.PC + 1);\
@@ -270,19 +270,19 @@ APUSetZN8 ((uint8) Int16);
IAPU.Address &= 0x1fff;
#define IndirectIndexedY()\
- IAPU.Address = *(uint16 *) (IAPU.DirectPage + OP1) + APURegisters.YA.B.Y;
+ IAPU.Address = *(uint16 *) (IAPU.DirectPage + OP1) + IAPU.Registers.YA.B.Y;
#else
#define IndexedXIndirect()\
- IAPU.Address = *(IAPU.DirectPage + ((OP1 + APURegisters.X) & 0xff)) + \
- (*(IAPU.DirectPage + ((OP1 + APURegisters.X + 1) & 0xff)) << 8);
+ IAPU.Address = *(IAPU.DirectPage + ((OP1 + IAPU.Registers.X) & 0xff)) + \
+ (*(IAPU.DirectPage + ((OP1 + IAPU.Registers.X + 1) & 0xff)) << 8);
#define Absolute()\
IAPU.Address = OP1 + (OP2 << 8);
#define AbsoluteX()\
- IAPU.Address = OP1 + (OP2 << 8) + APURegisters.X;
+ IAPU.Address = OP1 + (OP2 << 8) + IAPU.Registers.X;
#define AbsoluteY()\
- IAPU.Address = OP1 + (OP2 << 8) + APURegisters.YA.B.Y;
+ IAPU.Address = OP1 + (OP2 << 8) + IAPU.Registers.YA.B.Y;
#define MemBit()\
IAPU.Address = OP1 + (OP2 << 8);\
@@ -292,7 +292,7 @@ APUSetZN8 ((uint8) Int16);
#define IndirectIndexedY()\
IAPU.Address = *(IAPU.DirectPage + OP1) + \
(*(IAPU.DirectPage + OP1 + 1) << 8) + \
- APURegisters.YA.B.Y;
+ IAPU.Registers.YA.B.Y;
#endif
void Apu00 ()
@@ -541,8 +541,8 @@ void ApuF3 ()
void Apu04 ()
{
// OR A,dp
- APURegisters.YA.B.A |= S9xAPUGetByteZ (OP1);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByteZ (OP1);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -550,16 +550,16 @@ void Apu05 ()
{
// OR A,abs
Absolute ();
- APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
void Apu06 ()
{
// OR A,(X)
- APURegisters.YA.B.A |= S9xAPUGetByteZ (APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByteZ (IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -567,16 +567,16 @@ void Apu07 ()
{
// OR A,(dp+X)
IndexedXIndirect ();
- APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
void Apu08 ()
{
// OR A,#00
- APURegisters.YA.B.A |= OP1;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= OP1;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -593,8 +593,8 @@ void Apu09 ()
void Apu14 ()
{
// OR A,dp+X
- APURegisters.YA.B.A |= S9xAPUGetByteZ (OP1 + APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -602,8 +602,8 @@ void Apu15 ()
{
// OR A,abs+X
AbsoluteX ();
- APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -611,8 +611,8 @@ void Apu16 ()
{
// OR A,abs+Y
AbsoluteY ();
- APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -620,8 +620,8 @@ void Apu17 ()
{
// OR A,(dp)+Y
IndirectIndexedY ();
- APURegisters.YA.B.A |= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A |= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -638,9 +638,9 @@ void Apu18 ()
void Apu19 ()
{
// OR (X),(Y)
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.X) | S9xAPUGetByteZ (APURegisters.YA.B.Y);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.X) | S9xAPUGetByteZ (IAPU.Registers.YA.B.Y);
APUSetZN8 (Work8);
- S9xAPUSetByteZ (Work8, APURegisters.X);
+ S9xAPUSetByteZ (Work8, IAPU.Registers.X);
IAPU.PC++;
}
@@ -765,16 +765,16 @@ void Apu0C ()
void Apu1B ()
{
// ASL dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
ASL (Work8);
- S9xAPUSetByteZ (Work8, OP1 + APURegisters.X);
+ S9xAPUSetByteZ (Work8, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
void Apu1C ()
{
// ASL A
- ASL (APURegisters.YA.B.A);
+ ASL (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -782,35 +782,35 @@ void Apu0D ()
{
// PUSH PSW
S9xAPUPackStatus ();
- Push (APURegisters.P);
+ Push (IAPU.Registers.P);
IAPU.PC++;
}
void Apu2D ()
{
// PUSH A
- Push (APURegisters.YA.B.A);
+ Push (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu4D ()
{
// PUSH X
- Push (APURegisters.X);
+ Push (IAPU.Registers.X);
IAPU.PC++;
}
void Apu6D ()
{
// PUSH Y
- Push (APURegisters.YA.B.Y);
+ Push (IAPU.Registers.YA.B.Y);
IAPU.PC++;
}
void Apu8E ()
{
// POP PSW
- Pop (APURegisters.P);
+ Pop (IAPU.Registers.P);
S9xAPUUnpackStatus ();
if (APUCheckDirectPage ())
IAPU.DirectPage = IAPU.RAM + 0x100;
@@ -822,21 +822,21 @@ void Apu8E ()
void ApuAE ()
{
// POP A
- Pop (APURegisters.YA.B.A);
+ Pop (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void ApuCE ()
{
// POP X
- Pop (APURegisters.X);
+ Pop (IAPU.Registers.X);
IAPU.PC++;
}
void ApuEE ()
{
// POP Y
- Pop (APURegisters.YA.B.Y);
+ Pop (IAPU.Registers.YA.B.Y);
IAPU.PC++;
}
@@ -845,8 +845,8 @@ void Apu0E ()
// TSET1 abs
Absolute ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- S9xAPUSetByte (Work8 | APURegisters.YA.B.A, IAPU.Address);
- Work8 &= APURegisters.YA.B.A;
+ S9xAPUSetByte (Work8 | IAPU.Registers.YA.B.A, IAPU.Address);
+ Work8 &= IAPU.Registers.YA.B.A;
APUSetZN8 (Work8);
IAPU.PC += 3;
}
@@ -856,8 +856,8 @@ void Apu4E ()
// TCLR1 abs
Absolute ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- S9xAPUSetByte (Work8 & ~APURegisters.YA.B.A, IAPU.Address);
- Work8 &= APURegisters.YA.B.A;
+ S9xAPUSetByte (Work8 & ~IAPU.Registers.YA.B.A, IAPU.Address);
+ Work8 &= IAPU.Registers.YA.B.A;
APUSetZN8 (Work8);
IAPU.PC += 3;
}
@@ -871,7 +871,7 @@ void Apu0F ()
#else
PushW (IAPU.PC + 1 - IAPU.RAM);
S9xAPUPackStatus ();
- Push (APURegisters.P);
+ Push (IAPU.Registers.P);
APUSetBreak ();
APUClearInterrupt ();
// XXX:Where is the BRK vector ???
@@ -1050,7 +1050,7 @@ void Apu5A ()
{
// CMPW YA,dp
uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8);
- int32 Int32 = (long) APURegisters.YA.W - (long) Work16;
+ int32 Int32 = (long) IAPU.Registers.YA.W - (long) Work16;
IAPU._Carry = Int32 >= 0;
APUSetZN16 ((uint16) Int32);
IAPU.PC += 2;
@@ -1072,17 +1072,17 @@ void Apu7A ()
{
// ADDW YA,dp
uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8);
- uint32 Work32 = (uint32) APURegisters.YA.W + Work16;
+ uint32 Work32 = (uint32) IAPU.Registers.YA.W + Work16;
IAPU._Carry = Work32 >= 0x10000;
- if (~(APURegisters.YA.W ^ Work16) & (Work16 ^ (uint16) Work32) & 0x8000)
+ if (~(IAPU.Registers.YA.W ^ Work16) & (Work16 ^ (uint16) Work32) & 0x8000)
APUSetOverflow ();
else
APUClearOverflow ();
APUClearHalfCarry ();
- if((APURegisters.YA.W ^ Work16 ^ (uint16) Work32) & 0x10)
+ if((IAPU.Registers.YA.W ^ Work16 ^ (uint16) Work32) & 0x10)
APUSetHalfCarry ();
- APURegisters.YA.W = (uint16) Work32;
- APUSetZN16 (APURegisters.YA.W);
+ IAPU.Registers.YA.W = (uint16) Work32;
+ APUSetZN16 (IAPU.Registers.YA.W);
IAPU.PC += 2;
}
@@ -1093,39 +1093,39 @@ void Apu9A ()
{
// SUBW YA,dp
uint16 Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8);
- int32 Int32 = (long) APURegisters.YA.W - (long) Work16;
+ int32 Int32 = (long) IAPU.Registers.YA.W - (long) Work16;
APUClearHalfCarry ();
IAPU._Carry = Int32 >= 0;
- if (((APURegisters.YA.W ^ Work16) & 0x8000) &&
- ((APURegisters.YA.W ^ (uint16) Int32) & 0x8000))
+ if (((IAPU.Registers.YA.W ^ Work16) & 0x8000) &&
+ ((IAPU.Registers.YA.W ^ (uint16) Int32) & 0x8000))
APUSetOverflow ();
else
APUClearOverflow ();
- if (((APURegisters.YA.W ^ Work16) & 0x0080) &&
- ((APURegisters.YA.W ^ (uint16) Int32) & 0x0080))
+ if (((IAPU.Registers.YA.W ^ Work16) & 0x0080) &&
+ ((IAPU.Registers.YA.W ^ (uint16) Int32) & 0x0080))
APUSetHalfCarry ();
APUSetHalfCarry ();
- if((APURegisters.YA.W ^ Work16 ^ (uint16) Int32) & 0x10)
+ if((IAPU.Registers.YA.W ^ Work16 ^ (uint16) Int32) & 0x10)
APUClearHalfCarry ();
- APURegisters.YA.W = (uint16) Int32;
- APUSetZN16 (APURegisters.YA.W);
+ IAPU.Registers.YA.W = (uint16) Int32;
+ APUSetZN16 (IAPU.Registers.YA.W);
IAPU.PC += 2;
}
void ApuBA ()
{
// MOVW YA,dp
- APURegisters.YA.B.A = S9xAPUGetByteZ (OP1);
- APURegisters.YA.B.Y = S9xAPUGetByteZ (OP1 + 1);
- APUSetZN16 (APURegisters.YA.W);
+ IAPU.Registers.YA.B.A = S9xAPUGetByteZ (OP1);
+ IAPU.Registers.YA.B.Y = S9xAPUGetByteZ (OP1 + 1);
+ APUSetZN16 (IAPU.Registers.YA.W);
IAPU.PC += 2;
}
void ApuDA ()
{
// MOVW dp,YA
- S9xAPUSetByteZ (APURegisters.YA.B.A, OP1);
- S9xAPUSetByteZ (APURegisters.YA.B.Y, OP1 + 1);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.A, OP1);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.Y, OP1 + 1);
IAPU.PC += 2;
}
@@ -1133,7 +1133,7 @@ void Apu64 ()
{
// CMP A,dp
uint8 Work8 = S9xAPUGetByteZ (OP1);
- CMP (APURegisters.YA.B.A, Work8);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1142,15 +1142,15 @@ void Apu65 ()
// CMP A,abs
Absolute ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- CMP (APURegisters.YA.B.A, Work8);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
void Apu66 ()
{
// CMP A,(X)
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.X);
- CMP (APURegisters.YA.B.A, Work8);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.X);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC++;
}
@@ -1159,7 +1159,7 @@ void Apu67 ()
// CMP A,(dp+X)
IndexedXIndirect ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- CMP (APURegisters.YA.B.A, Work8);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1167,7 +1167,7 @@ void Apu68 ()
{
// CMP A,#00
uint8 Work8 = OP1;
- CMP (APURegisters.YA.B.A, Work8);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1183,8 +1183,8 @@ void Apu69 ()
void Apu74 ()
{
// CMP A, dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X);
- CMP (APURegisters.YA.B.A, Work8);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1193,7 +1193,7 @@ void Apu75 ()
// CMP A,abs+X
AbsoluteX ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- CMP (APURegisters.YA.B.A, Work8);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
@@ -1202,7 +1202,7 @@ void Apu76 ()
// CMP A, abs+Y
AbsoluteY ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- CMP (APURegisters.YA.B.A, Work8);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
@@ -1211,7 +1211,7 @@ void Apu77 ()
// CMP A,(dp)+Y
IndirectIndexedY ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- CMP (APURegisters.YA.B.A, Work8);
+ CMP (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1227,8 +1227,8 @@ void Apu78 ()
void Apu79 ()
{
// CMP (X),(Y)
- uint8 W1 = S9xAPUGetByteZ (APURegisters.X);
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y);
+ uint8 W1 = S9xAPUGetByteZ (IAPU.Registers.X);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.YA.B.Y);
CMP (W1, Work8);
IAPU.PC++;
}
@@ -1238,7 +1238,7 @@ void Apu1E ()
// CMP X,abs
Absolute ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- CMP (APURegisters.X, Work8);
+ CMP (IAPU.Registers.X, Work8);
IAPU.PC += 3;
}
@@ -1246,14 +1246,14 @@ void Apu3E ()
{
// CMP X,dp
uint8 Work8 = S9xAPUGetByteZ (OP1);
- CMP (APURegisters.X, Work8);
+ CMP (IAPU.Registers.X, Work8);
IAPU.PC += 2;
}
void ApuC8 ()
{
// CMP X,#00
- CMP (APURegisters.X, OP1);
+ CMP (IAPU.Registers.X, OP1);
IAPU.PC += 2;
}
@@ -1262,7 +1262,7 @@ void Apu5E ()
// CMP Y,abs
Absolute ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- CMP (APURegisters.YA.B.Y, Work8);
+ CMP (IAPU.Registers.YA.B.Y, Work8);
IAPU.PC += 3;
}
@@ -1270,7 +1270,7 @@ void Apu7E ()
{
// CMP Y,dp
uint8 Work8 = S9xAPUGetByteZ (OP1);
- CMP (APURegisters.YA.B.Y, Work8);
+ CMP (IAPU.Registers.YA.B.Y, Work8);
IAPU.PC += 2;
}
@@ -1278,7 +1278,7 @@ void ApuAD ()
{
// CMP Y,#00
uint8 Work8 = OP1;
- CMP (APURegisters.YA.B.Y, Work8);
+ CMP (IAPU.Registers.YA.B.Y, Work8);
IAPU.PC += 2;
}
@@ -1286,8 +1286,8 @@ void Apu1F ()
{
// JMP (abs+X)
Absolute ();
- IAPU.PC = IAPU.RAM + S9xAPUGetByte (IAPU.Address + APURegisters.X) +
- (S9xAPUGetByte (IAPU.Address + APURegisters.X + 1) << 8);
+ IAPU.PC = IAPU.RAM + S9xAPUGetByte (IAPU.Address + IAPU.Registers.X) +
+ (S9xAPUGetByte (IAPU.Address + IAPU.Registers.X + 1) << 8);
// XXX: HERE:
// APU.Flags |= TRACE_FLAG;
}
@@ -1325,8 +1325,8 @@ void ApuE0 ()
void Apu24 ()
{
// AND A,dp
- APURegisters.YA.B.A &= S9xAPUGetByteZ (OP1);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByteZ (OP1);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1334,16 +1334,16 @@ void Apu25 ()
{
// AND A,abs
Absolute ();
- APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
void Apu26 ()
{
// AND A,(X)
- APURegisters.YA.B.A &= S9xAPUGetByteZ (APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByteZ (IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -1351,16 +1351,16 @@ void Apu27 ()
{
// AND A,(dp+X)
IndexedXIndirect ();
- APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
void Apu28 ()
{
// AND A,#00
- APURegisters.YA.B.A &= OP1;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= OP1;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1377,8 +1377,8 @@ void Apu29 ()
void Apu34 ()
{
// AND A,dp+X
- APURegisters.YA.B.A &= S9xAPUGetByteZ (OP1 + APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1386,8 +1386,8 @@ void Apu35 ()
{
// AND A,abs+X
AbsoluteX ();
- APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -1395,8 +1395,8 @@ void Apu36 ()
{
// AND A,abs+Y
AbsoluteY ();
- APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -1404,8 +1404,8 @@ void Apu37 ()
{
// AND A,(dp)+Y
IndirectIndexedY ();
- APURegisters.YA.B.A &= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A &= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1422,9 +1422,9 @@ void Apu38 ()
void Apu39 ()
{
// AND (X),(Y)
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.X) & S9xAPUGetByteZ (APURegisters.YA.B.Y);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.X) & S9xAPUGetByteZ (IAPU.Registers.YA.B.Y);
APUSetZN8 (Work8);
- S9xAPUSetByteZ (Work8, APURegisters.X);
+ S9xAPUSetByteZ (Work8, IAPU.Registers.X);
IAPU.PC++;
}
@@ -1450,16 +1450,16 @@ void Apu2C ()
void Apu3B ()
{
// ROL dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
ROL (Work8);
- S9xAPUSetByteZ (Work8, OP1 + APURegisters.X);
+ S9xAPUSetByteZ (Work8, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
void Apu3C ()
{
// ROL A
- ROL (APURegisters.YA.B.A);
+ ROL (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -1469,7 +1469,7 @@ void Apu2E ()
uint8 Work8 = OP1;
Relative2 ();
- if (S9xAPUGetByteZ (Work8) != APURegisters.YA.B.A)
+ if (S9xAPUGetByteZ (Work8) != IAPU.Registers.YA.B.A)
{
IAPU.PC = IAPU.RAM + (uint16) Int16;
APU.Cycles += IAPU.TwoCycles;
@@ -1482,10 +1482,10 @@ void Apu2E ()
void ApuDE ()
{
// CBNE dp+X,rel
- uint8 Work8 = OP1 + APURegisters.X;
+ uint8 Work8 = OP1 + IAPU.Registers.X;
Relative2 ();
- if (S9xAPUGetByteZ (Work8) != APURegisters.YA.B.A)
+ if (S9xAPUGetByteZ (Work8) != IAPU.Registers.YA.B.A)
{
IAPU.PC = IAPU.RAM + (uint16) Int16;
APU.Cycles += IAPU.TwoCycles;
@@ -1498,8 +1498,8 @@ void ApuDE ()
void Apu3D ()
{
// INC X
- APURegisters.X++;
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X++;
+ APUSetZN8 (IAPU.Registers.X);
#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
@@ -1511,8 +1511,8 @@ void Apu3D ()
void ApuFC ()
{
// INC Y
- APURegisters.YA.B.Y++;
- APUSetZN8 (APURegisters.YA.B.Y);
+ IAPU.Registers.YA.B.Y++;
+ APUSetZN8 (IAPU.Registers.YA.B.Y);
#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
@@ -1524,8 +1524,8 @@ void ApuFC ()
void Apu1D ()
{
// DEC X
- APURegisters.X--;
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X--;
+ APUSetZN8 (IAPU.Registers.X);
#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
@@ -1537,8 +1537,8 @@ void Apu1D ()
void ApuDC ()
{
// DEC Y
- APURegisters.YA.B.Y--;
- APUSetZN8 (APURegisters.YA.B.Y);
+ IAPU.Registers.YA.B.Y--;
+ APUSetZN8 (IAPU.Registers.YA.B.Y);
#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
@@ -1579,8 +1579,8 @@ void ApuAC ()
void ApuBB ()
{
// INC dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X) + 1;
- S9xAPUSetByteZ (Work8, OP1 + APURegisters.X);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X) + 1;
+ S9xAPUSetByteZ (Work8, OP1 + IAPU.Registers.X);
APUSetZN8 (Work8);
#ifdef SPC700_SHUTDOWN
@@ -1593,8 +1593,8 @@ void ApuBB ()
void ApuBC ()
{
// INC A
- APURegisters.YA.B.A++;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A++;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
@@ -1635,8 +1635,8 @@ void Apu8C ()
void Apu9B ()
{
// DEC dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X) - 1;
- S9xAPUSetByteZ (Work8, OP1 + APURegisters.X);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X) - 1;
+ S9xAPUSetByteZ (Work8, OP1 + IAPU.Registers.X);
APUSetZN8 (Work8);
#ifdef SPC700_SHUTDOWN
@@ -1649,8 +1649,8 @@ void Apu9B ()
void Apu9C ()
{
// DEC A
- APURegisters.YA.B.A--;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A--;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
#ifdef SPC700_SHUTDOWN
IAPU.WaitCounter++;
@@ -1662,8 +1662,8 @@ void Apu9C ()
void Apu44 ()
{
// EOR A,dp
- APURegisters.YA.B.A ^= S9xAPUGetByteZ (OP1);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByteZ (OP1);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1671,16 +1671,16 @@ void Apu45 ()
{
// EOR A,abs
Absolute ();
- APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
void Apu46 ()
{
// EOR A,(X)
- APURegisters.YA.B.A ^= S9xAPUGetByteZ (APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByteZ (IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -1688,16 +1688,16 @@ void Apu47 ()
{
// EOR A,(dp+X)
IndexedXIndirect ();
- APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
void Apu48 ()
{
// EOR A,#00
- APURegisters.YA.B.A ^= OP1;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= OP1;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1714,8 +1714,8 @@ void Apu49 ()
void Apu54 ()
{
// EOR A,dp+X
- APURegisters.YA.B.A ^= S9xAPUGetByteZ (OP1 + APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1723,8 +1723,8 @@ void Apu55 ()
{
// EOR A,abs+X
AbsoluteX ();
- APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -1732,8 +1732,8 @@ void Apu56 ()
{
// EOR A,abs+Y
AbsoluteY ();
- APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -1741,8 +1741,8 @@ void Apu57 ()
{
// EOR A,(dp)+Y
IndirectIndexedY ();
- APURegisters.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A ^= S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -1759,9 +1759,9 @@ void Apu58 ()
void Apu59 ()
{
// EOR (X),(Y)
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.X) ^ S9xAPUGetByteZ (APURegisters.YA.B.Y);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.X) ^ S9xAPUGetByteZ (IAPU.Registers.YA.B.Y);
APUSetZN8 (Work8);
- S9xAPUSetByteZ (Work8, APURegisters.X);
+ S9xAPUSetByteZ (Work8, IAPU.Registers.X);
IAPU.PC++;
}
@@ -1787,63 +1787,63 @@ void Apu4C ()
void Apu5B ()
{
// LSR dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
LSR (Work8);
- S9xAPUSetByteZ (Work8, OP1 + APURegisters.X);
+ S9xAPUSetByteZ (Work8, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
void Apu5C ()
{
// LSR A
- LSR (APURegisters.YA.B.A);
+ LSR (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu7D ()
{
// MOV A,X
- APURegisters.YA.B.A = APURegisters.X;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = IAPU.Registers.X;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void ApuDD ()
{
// MOV A,Y
- APURegisters.YA.B.A = APURegisters.YA.B.Y;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = IAPU.Registers.YA.B.Y;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu5D ()
{
// MOV X,A
- APURegisters.X = APURegisters.YA.B.A;
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X = IAPU.Registers.YA.B.A;
+ APUSetZN8 (IAPU.Registers.X);
IAPU.PC++;
}
void ApuFD ()
{
// MOV Y,A
- APURegisters.YA.B.Y = APURegisters.YA.B.A;
- APUSetZN8 (APURegisters.YA.B.Y);
+ IAPU.Registers.YA.B.Y = IAPU.Registers.YA.B.A;
+ APUSetZN8 (IAPU.Registers.YA.B.Y);
IAPU.PC++;
}
void Apu9D ()
{
//MOV X,SP
- APURegisters.X = APURegisters.S;
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X = IAPU.Registers.S;
+ APUSetZN8 (IAPU.Registers.X);
IAPU.PC++;
}
void ApuBD ()
{
// MOV SP,X
- APURegisters.S = APURegisters.X;
+ IAPU.Registers.S = IAPU.Registers.X;
IAPU.PC++;
}
@@ -1869,16 +1869,16 @@ void Apu6C ()
void Apu7B ()
{
// ROR dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
ROR (Work8);
- S9xAPUSetByteZ (Work8, OP1 + APURegisters.X);
+ S9xAPUSetByteZ (Work8, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
void Apu7C ()
{
// ROR A
- ROR (APURegisters.YA.B.A);
+ ROR (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -1902,8 +1902,8 @@ void ApuFE ()
{
// DBNZ Y,rel
Relative ();
- APURegisters.YA.B.Y--;
- if (APURegisters.YA.B.Y != 0)
+ IAPU.Registers.YA.B.Y--;
+ if (IAPU.Registers.YA.B.Y != 0)
{
IAPU.PC = IAPU.RAM + (uint16) Int16;
APU.Cycles += IAPU.TwoCycles;
@@ -1915,25 +1915,25 @@ void ApuFE ()
void Apu6F ()
{
// RET
- PopW (APURegisters.PC);
- IAPU.PC = IAPU.RAM + APURegisters.PC;
+ PopW (IAPU.Registers.PC);
+ IAPU.PC = IAPU.RAM + IAPU.Registers.PC;
}
void Apu7F ()
{
// RETI
// STOP ("RETI");
- Pop (APURegisters.P);
+ Pop (IAPU.Registers.P);
S9xAPUUnpackStatus ();
- PopW (APURegisters.PC);
- IAPU.PC = IAPU.RAM + APURegisters.PC;
+ PopW (IAPU.Registers.PC);
+ IAPU.PC = IAPU.RAM + IAPU.Registers.PC;
}
void Apu84 ()
{
// ADC A,dp
uint8 Work8 = S9xAPUGetByteZ (OP1);
- ADC (APURegisters.YA.B.A, Work8);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1942,15 +1942,15 @@ void Apu85 ()
// ADC A, abs
Absolute ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- ADC (APURegisters.YA.B.A, Work8);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
void Apu86 ()
{
// ADC A,(X)
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.X);
- ADC (APURegisters.YA.B.A, Work8);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.X);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC++;
}
@@ -1959,7 +1959,7 @@ void Apu87 ()
// ADC A,(dp+X)
IndexedXIndirect ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- ADC (APURegisters.YA.B.A, Work8);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1967,7 +1967,7 @@ void Apu88 ()
{
// ADC A,#00
uint8 Work8 = OP1;
- ADC (APURegisters.YA.B.A, Work8);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1984,8 +1984,8 @@ void Apu89 ()
void Apu94 ()
{
// ADC A,dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X);
- ADC (APURegisters.YA.B.A, Work8);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -1994,7 +1994,7 @@ void Apu95 ()
// ADC A, abs+X
AbsoluteX ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- ADC (APURegisters.YA.B.A, Work8);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
@@ -2003,7 +2003,7 @@ void Apu96 ()
// ADC A, abs+Y
AbsoluteY ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- ADC (APURegisters.YA.B.A, Work8);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
@@ -2012,7 +2012,7 @@ void Apu97 ()
// ADC A, (dp)+Y
IndirectIndexedY ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- ADC (APURegisters.YA.B.A, Work8);
+ ADC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -2029,18 +2029,18 @@ void Apu98 ()
void Apu99 ()
{
// ADC (X),(Y)
- uint8 W1 = S9xAPUGetByteZ (APURegisters.X);
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y);
+ uint8 W1 = S9xAPUGetByteZ (IAPU.Registers.X);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.YA.B.Y);
ADC (W1, Work8);
- S9xAPUSetByteZ (W1, APURegisters.X);
+ S9xAPUSetByteZ (W1, IAPU.Registers.X);
IAPU.PC++;
}
void Apu8D ()
{
// MOV Y,#00
- APURegisters.YA.B.Y = OP1;
- APUSetZN8 (APURegisters.YA.B.Y);
+ IAPU.Registers.YA.B.Y = OP1;
+ APUSetZN8 (IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
}
@@ -2055,30 +2055,30 @@ void Apu8F ()
void Apu9E ()
{
// DIV YA,X
- if (APURegisters.X == 0)
+ if (IAPU.Registers.X == 0)
{
APUSetOverflow ();
- APURegisters.YA.B.Y = 0xff;
- APURegisters.YA.B.A = 0xff;
+ IAPU.Registers.YA.B.Y = 0xff;
+ IAPU.Registers.YA.B.A = 0xff;
}
else
{
APUClearOverflow ();
- uint8 Work8 = APURegisters.YA.W / APURegisters.X;
- APURegisters.YA.B.Y = APURegisters.YA.W % APURegisters.X;
- APURegisters.YA.B.A = Work8;
+ uint8 Work8 = IAPU.Registers.YA.W / IAPU.Registers.X;
+ IAPU.Registers.YA.B.Y = IAPU.Registers.YA.W % IAPU.Registers.X;
+ IAPU.Registers.YA.B.A = Work8;
}
// XXX How should Overflow, Half Carry, Zero and Negative flags be set??
- // APUSetZN16 (APURegisters.YA.W);
- APUSetZN8 (APURegisters.YA.B.A);
+ // APUSetZN16 (IAPU.Registers.YA.W);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void Apu9F ()
{
// XCN A
- APURegisters.YA.B.A = (APURegisters.YA.B.A >> 4) | (APURegisters.YA.B.A << 4);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = (IAPU.Registers.YA.B.A >> 4) | (IAPU.Registers.YA.B.A << 4);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -2086,7 +2086,7 @@ void ApuA4 ()
{
// SBC A, dp
uint8 Work8 = S9xAPUGetByteZ (OP1);
- SBC (APURegisters.YA.B.A, Work8);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -2095,15 +2095,15 @@ void ApuA5 ()
// SBC A, abs
Absolute ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- SBC (APURegisters.YA.B.A, Work8);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
void ApuA6 ()
{
// SBC A, (X)
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.X);
- SBC (APURegisters.YA.B.A, Work8);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.X);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC++;
}
@@ -2112,7 +2112,7 @@ void ApuA7 ()
// SBC A,(dp+X)
IndexedXIndirect ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- SBC (APURegisters.YA.B.A, Work8);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -2120,7 +2120,7 @@ void ApuA8 ()
{
// SBC A,#00
uint8 Work8 = OP1;
- SBC (APURegisters.YA.B.A, Work8);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -2137,8 +2137,8 @@ void ApuA9 ()
void ApuB4 ()
{
// SBC A, dp+X
- uint8 Work8 = S9xAPUGetByteZ (OP1 + APURegisters.X);
- SBC (APURegisters.YA.B.A, Work8);
+ uint8 Work8 = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -2147,7 +2147,7 @@ void ApuB5 ()
// SBC A,abs+X
AbsoluteX ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- SBC (APURegisters.YA.B.A, Work8);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
@@ -2156,7 +2156,7 @@ void ApuB6 ()
// SBC A,abs+Y
AbsoluteY ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- SBC (APURegisters.YA.B.A, Work8);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 3;
}
@@ -2165,7 +2165,7 @@ void ApuB7 ()
// SBC A,(dp)+Y
IndirectIndexedY ();
uint8 Work8 = S9xAPUGetByte (IAPU.Address);
- SBC (APURegisters.YA.B.A, Work8);
+ SBC (IAPU.Registers.YA.B.A, Work8);
IAPU.PC += 2;
}
@@ -2182,42 +2182,42 @@ void ApuB8 ()
void ApuB9 ()
{
// SBC (X),(Y)
- uint8 W1 = S9xAPUGetByteZ (APURegisters.X);
- uint8 Work8 = S9xAPUGetByteZ (APURegisters.YA.B.Y);
+ uint8 W1 = S9xAPUGetByteZ (IAPU.Registers.X);
+ uint8 Work8 = S9xAPUGetByteZ (IAPU.Registers.YA.B.Y);
SBC (W1, Work8);
- S9xAPUSetByteZ (W1, APURegisters.X);
+ S9xAPUSetByteZ (W1, IAPU.Registers.X);
IAPU.PC++;
}
void ApuAF ()
{
// MOV (X)+, A
- S9xAPUSetByteZ (APURegisters.YA.B.A, APURegisters.X++);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.A, IAPU.Registers.X++);
IAPU.PC++;
}
void ApuBE ()
{
// DAS
- if ((APURegisters.YA.B.A & 0x0f) > 9 || !APUCheckHalfCarry())
+ if ((IAPU.Registers.YA.B.A & 0x0f) > 9 || !APUCheckHalfCarry())
{
- APURegisters.YA.B.A -= 6;
+ IAPU.Registers.YA.B.A -= 6;
}
- if (APURegisters.YA.B.A > 0x9f || !IAPU._Carry)
+ if (IAPU.Registers.YA.B.A > 0x9f || !IAPU._Carry)
{
- APURegisters.YA.B.A -= 0x60;
+ IAPU.Registers.YA.B.A -= 0x60;
APUClearCarry ();
}
else { APUSetCarry (); }
- APUSetZN8 (APURegisters.YA.B.A);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void ApuBF ()
{
// MOV A,(X)+
- APURegisters.YA.B.A = S9xAPUGetByteZ (APURegisters.X++);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByteZ (IAPU.Registers.X++);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -2238,7 +2238,7 @@ void ApuA0 ()
void ApuC4 ()
{
// MOV dp,A
- S9xAPUSetByteZ (APURegisters.YA.B.A, OP1);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.A, OP1);
IAPU.PC += 2;
}
@@ -2246,14 +2246,14 @@ void ApuC5 ()
{
// MOV abs,A
Absolute ();
- S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address);
+ S9xAPUSetByte (IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 3;
}
void ApuC6 ()
{
// MOV (X), A
- S9xAPUSetByteZ (APURegisters.YA.B.A, APURegisters.X);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.A, IAPU.Registers.X);
IAPU.PC++;
}
@@ -2261,7 +2261,7 @@ void ApuC7 ()
{
// MOV (dp+X),A
IndexedXIndirect ();
- S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address);
+ S9xAPUSetByte (IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 2;
}
@@ -2269,14 +2269,14 @@ void ApuC9 ()
{
// MOV abs,X
Absolute ();
- S9xAPUSetByte (APURegisters.X, IAPU.Address);
+ S9xAPUSetByte (IAPU.Registers.X, IAPU.Address);
IAPU.PC += 3;
}
void ApuCB ()
{
// MOV dp,Y
- S9xAPUSetByteZ (APURegisters.YA.B.Y, OP1);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.Y, OP1);
IAPU.PC += 2;
}
@@ -2284,30 +2284,30 @@ void ApuCC ()
{
// MOV abs,Y
Absolute ();
- S9xAPUSetByte (APURegisters.YA.B.Y, IAPU.Address);
+ S9xAPUSetByte (IAPU.Registers.YA.B.Y, IAPU.Address);
IAPU.PC += 3;
}
void ApuCD ()
{
// MOV X,#00
- APURegisters.X = OP1;
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X = OP1;
+ APUSetZN8 (IAPU.Registers.X);
IAPU.PC += 2;
}
void ApuCF ()
{
// MUL YA
- APURegisters.YA.W = (uint16) APURegisters.YA.B.A * APURegisters.YA.B.Y;
- APUSetZN16 (APURegisters.YA.W);
+ IAPU.Registers.YA.W = (uint16) IAPU.Registers.YA.B.A * IAPU.Registers.YA.B.Y;
+ APUSetZN16 (IAPU.Registers.YA.W);
IAPU.PC++;
}
void ApuD4 ()
{
// MOV dp+X, A
- S9xAPUSetByteZ (APURegisters.YA.B.A, OP1 + APURegisters.X);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.A, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
@@ -2315,7 +2315,7 @@ void ApuD5 ()
{
// MOV abs+X,A
AbsoluteX ();
- S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address);
+ S9xAPUSetByte (IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 3;
}
@@ -2323,7 +2323,7 @@ void ApuD6 ()
{
// MOV abs+Y,A
AbsoluteY ();
- S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address);
+ S9xAPUSetByte (IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 3;
}
@@ -2331,56 +2331,56 @@ void ApuD7 ()
{
// MOV (dp)+Y,A
IndirectIndexedY ();
- S9xAPUSetByte (APURegisters.YA.B.A, IAPU.Address);
+ S9xAPUSetByte (IAPU.Registers.YA.B.A, IAPU.Address);
IAPU.PC += 2;
}
void ApuD8 ()
{
// MOV dp,X
- S9xAPUSetByteZ (APURegisters.X, OP1);
+ S9xAPUSetByteZ (IAPU.Registers.X, OP1);
IAPU.PC += 2;
}
void ApuD9 ()
{
// MOV dp+Y,X
- S9xAPUSetByteZ (APURegisters.X, OP1 + APURegisters.YA.B.Y);
+ S9xAPUSetByteZ (IAPU.Registers.X, OP1 + IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
}
void ApuDB ()
{
// MOV dp+X,Y
- S9xAPUSetByteZ (APURegisters.YA.B.Y, OP1 + APURegisters.X);
+ S9xAPUSetByteZ (IAPU.Registers.YA.B.Y, OP1 + IAPU.Registers.X);
IAPU.PC += 2;
}
void ApuDF ()
{
// DAA
- if ((APURegisters.YA.B.A & 0x0f) > 9 || APUCheckHalfCarry())
+ if ((IAPU.Registers.YA.B.A & 0x0f) > 9 || APUCheckHalfCarry())
{
- if(APURegisters.YA.B.A > 0xf0) APUSetCarry ();
- APURegisters.YA.B.A += 6;
+ if(IAPU.Registers.YA.B.A > 0xf0) APUSetCarry ();
+ IAPU.Registers.YA.B.A += 6;
//APUSetHalfCarry (); Intel procs do this, but this is a Sony proc...
}
//else { APUClearHalfCarry (); } ditto as above
- if (APURegisters.YA.B.A > 0x9f || IAPU._Carry)
+ if (IAPU.Registers.YA.B.A > 0x9f || IAPU._Carry)
{
- APURegisters.YA.B.A += 0x60;
+ IAPU.Registers.YA.B.A += 0x60;
APUSetCarry ();
}
else { APUClearCarry (); }
- APUSetZN8 (APURegisters.YA.B.A);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
void ApuE4 ()
{
// MOV A, dp
- APURegisters.YA.B.A = S9xAPUGetByteZ (OP1);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByteZ (OP1);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -2388,16 +2388,16 @@ void ApuE5 ()
{
// MOV A,abs
Absolute ();
- APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
void ApuE6 ()
{
// MOV A,(X)
- APURegisters.YA.B.A = S9xAPUGetByteZ (APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByteZ (IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC++;
}
@@ -2405,16 +2405,16 @@ void ApuE7 ()
{
// MOV A,(dp+X)
IndexedXIndirect ();
- APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
void ApuE8 ()
{
// MOV A,#00
- APURegisters.YA.B.A = OP1;
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = OP1;
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -2422,16 +2422,16 @@ void ApuE9 ()
{
// MOV X, abs
Absolute ();
- APURegisters.X = S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X = S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.X);
IAPU.PC += 3;
}
void ApuEB ()
{
// MOV Y,dp
- APURegisters.YA.B.Y = S9xAPUGetByteZ (OP1);
- APUSetZN8 (APURegisters.YA.B.Y);
+ IAPU.Registers.YA.B.Y = S9xAPUGetByteZ (OP1);
+ APUSetZN8 (IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
}
@@ -2439,16 +2439,16 @@ void ApuEC ()
{
// MOV Y,abs
Absolute ();
- APURegisters.YA.B.Y = S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.Y);
+ IAPU.Registers.YA.B.Y = S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.Y);
IAPU.PC += 3;
}
void ApuF4 ()
{
// MOV A, dp+X
- APURegisters.YA.B.A = S9xAPUGetByteZ (OP1 + APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
@@ -2456,8 +2456,8 @@ void ApuF5 ()
{
// MOV A, abs+X
AbsoluteX ();
- APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -2465,8 +2465,8 @@ void ApuF6 ()
{
// MOV A, abs+Y
AbsoluteY ();
- APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 3;
}
@@ -2474,24 +2474,24 @@ void ApuF7 ()
{
// MOV A, (dp)+Y
IndirectIndexedY ();
- APURegisters.YA.B.A = S9xAPUGetByte (IAPU.Address);
- APUSetZN8 (APURegisters.YA.B.A);
+ IAPU.Registers.YA.B.A = S9xAPUGetByte (IAPU.Address);
+ APUSetZN8 (IAPU.Registers.YA.B.A);
IAPU.PC += 2;
}
void ApuF8 ()
{
// MOV X,dp
- APURegisters.X = S9xAPUGetByteZ (OP1);
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X = S9xAPUGetByteZ (OP1);
+ APUSetZN8 (IAPU.Registers.X);
IAPU.PC += 2;
}
void ApuF9 ()
{
// MOV X,dp+Y
- APURegisters.X = S9xAPUGetByteZ (OP1 + APURegisters.YA.B.Y);
- APUSetZN8 (APURegisters.X);
+ IAPU.Registers.X = S9xAPUGetByteZ (OP1 + IAPU.Registers.YA.B.Y);
+ APUSetZN8 (IAPU.Registers.X);
IAPU.PC += 2;
}
@@ -2505,8 +2505,8 @@ void ApuFA ()
void ApuFB ()
{
// MOV Y,dp+X
- APURegisters.YA.B.Y = S9xAPUGetByteZ (OP1 + APURegisters.X);
- APUSetZN8 (APURegisters.YA.B.Y);
+ IAPU.Registers.YA.B.Y = S9xAPUGetByteZ (OP1 + IAPU.Registers.X);
+ APUSetZN8 (IAPU.Registers.YA.B.Y);
IAPU.PC += 2;
}
diff --git a/source/spc700.h b/source/spc700.h
index 3d09fee..abb413e 100644
--- a/source/spc700.h
+++ b/source/spc700.h
@@ -107,29 +107,29 @@
#define APUClearCarry() (IAPU._Carry = 0)
#define APUSetCarry() (IAPU._Carry = 1)
-#define APUSetInterrupt() (APURegisters.P |= Interrupt)
-#define APUClearInterrupt() (APURegisters.P &= ~Interrupt)
-#define APUSetHalfCarry() (APURegisters.P |= HalfCarry)
-#define APUClearHalfCarry() (APURegisters.P &= ~HalfCarry)
-#define APUSetBreak() (APURegisters.P |= BreakFlag)
-#define APUClearBreak() (APURegisters.P &= ~BreakFlag)
-#define APUSetDirectPage() (APURegisters.P |= DirectPageFlag)
-#define APUClearDirectPage() (APURegisters.P &= ~DirectPageFlag)
+#define APUSetInterrupt() (IAPU.Registers.P |= Interrupt)
+#define APUClearInterrupt() (IAPU.Registers.P &= ~Interrupt)
+#define APUSetHalfCarry() (IAPU.Registers.P |= HalfCarry)
+#define APUClearHalfCarry() (IAPU.Registers.P &= ~HalfCarry)
+#define APUSetBreak() (IAPU.Registers.P |= BreakFlag)
+#define APUClearBreak() (IAPU.Registers.P &= ~BreakFlag)
+#define APUSetDirectPage() (IAPU.Registers.P |= DirectPageFlag)
+#define APUClearDirectPage() (IAPU.Registers.P &= ~DirectPageFlag)
#define APUSetOverflow() (IAPU._Overflow = 1)
#define APUClearOverflow() (IAPU._Overflow = 0)
#define APUCheckZero() (IAPU._Zero == 0)
#define APUCheckCarry() (IAPU._Carry)
-#define APUCheckInterrupt() (APURegisters.P & Interrupt)
-#define APUCheckHalfCarry() (APURegisters.P & HalfCarry)
-#define APUCheckBreak() (APURegisters.P & BreakFlag)
-#define APUCheckDirectPage() (APURegisters.P & DirectPageFlag)
+#define APUCheckInterrupt() (IAPU.Registers.P & Interrupt)
+#define APUCheckHalfCarry() (IAPU.Registers.P & HalfCarry)
+#define APUCheckBreak() (IAPU.Registers.P & BreakFlag)
+#define APUCheckDirectPage() (IAPU.Registers.P & DirectPageFlag)
#define APUCheckOverflow() (IAPU._Overflow)
#define APUCheckNegative() (IAPU._Zero & 0x80)
-#define APUClearFlags(f) (APURegisters.P &= ~(f))
-#define APUSetFlags(f) (APURegisters.P |= (f))
-#define APUCheckFlag(f) (APURegisters.P & (f))
+#define APUClearFlags(f) (IAPU.Registers.P &= ~(f))
+#define APUSetFlags(f) (IAPU.Registers.P |= (f))
+#define APUCheckFlag(f) (IAPU.Registers.P & (f))
typedef union
{
@@ -149,8 +149,6 @@ struct SAPURegisters{
uint16 PC;
};
-EXTERN_C struct SAPURegisters APURegisters;
-
// Needed by ILLUSION OF GAIA
//#define ONE_APU_CYCLE 14
#define ONE_APU_CYCLE 21