CPU and Memory Layout accuracy improvements from uosnes and optimizations from snes9x2002.

6 files changed, 2512 insertions, 3369 deletions

diff --git a/source/cpuaddr.h b/source/cpuaddr.h
index 3531686..1085921 100644
--- a/source/cpuaddr.h
+++ b/source/cpuaddr.h
@@ -3,283 +3,309 @@
 #ifndef _CPUADDR_H_
 #define _CPUADDR_H_
 
-typedef enum
-{
-   NONE = 0,
-   READ = 1,
-   WRITE = 2,
-   MODIFY = 3,
-   JUMP = 4
-} AccessMode;
-
-// The type for a function that can run after the addressing mode is resolved:
-typedef void (*InternalOp)(int32_t);
+extern int32_t OpAddress;
 
-static void Immediate8(AccessMode a, InternalOp op)
+static inline void Immediate8()
 {
-   int32_t Addr = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
+   OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
    CPU.PC++;
-   (*op)(Addr);
 }
 
-static void Immediate16(AccessMode a, InternalOp op)
+static inline void Immediate16()
 {
-   int32_t Addr = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
+   OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
    CPU.PC += 2;
-   (*op)(Addr);
 }
 
-static void Relative(AccessMode a, InternalOp op)
+static inline void Relative()
 {
    int8_t Int8 = *CPU.PC++;
-   int32_t Addr = ((int32_t)(CPU.PC - CPU.PCBase) + Int8) & 0xffff;
-   (*op)(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed;
+#endif
+   OpAddress = ((int32_t)(CPU.PC - CPU.PCBase) + Int8) & 0xffff;
 }
 
-static void RelativeLong(AccessMode a, InternalOp op)
+static inline void RelativeLong()
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = *(uint16_t*) CPU.PC;
+   OpAddress = *(uint16_t*) CPU.PC;
 #else
-   Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
+   OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8);
+#endif
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
 #endif
    CPU.PC += 2;
-   Addr += (CPU.PC - CPU.PCBase);
-   Addr &= 0xffff;
-   (*op)(Addr);
+   OpAddress += (CPU.PC - CPU.PCBase);
+   OpAddress &= 0xffff;
 }
 
-static void AbsoluteIndexedIndirect(AccessMode a, InternalOp op)
+static inline void AbsoluteIndexedIndirect(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = (ICPU.Registers.X.W + * (uint16_t*) CPU.PC) & 0xffff;
+   OpAddress = (ICPU.Registers.X.W + * (uint16_t*) CPU.PC) & 0xffff;
 #else
-   Addr = (ICPU.Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff;
+   OpAddress = (ICPU.Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff;
+#endif
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2;
 #endif
    OpenBus = *(CPU.PC + 1);
    CPU.PC += 2;
-   Addr = S9xGetWord(ICPU.ShiftedPB + Addr);
-   if (a & READ) OpenBus = (uint8_t)(Addr >> 8);
-   (*op)(Addr);
+   OpAddress = S9xGetWord(ICPU.ShiftedPB + OpAddress);
+   if (read)
+      OpenBus = (uint8_t)(OpAddress >> 8);
 }
 
-static void AbsoluteIndirectLong(AccessMode a, InternalOp op)
+static inline void AbsoluteIndirectLong(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = *(uint16_t*) CPU.PC;
+   OpAddress = *(uint16_t*) CPU.PC;
 #else
-   Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
+   OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8);
+#endif
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2;
 #endif
-
    OpenBus = *(CPU.PC + 1);
    CPU.PC += 2;
-   if (a & READ)
-      Addr = S9xGetWord(Addr) | ((OpenBus = S9xGetByte(Addr + 2)) << 16);
+   if (read)
+      OpAddress = S9xGetWord(OpAddress) | ((OpenBus = S9xGetByte(OpAddress + 2)) << 16);
    else
-      Addr = S9xGetWord(Addr) | (S9xGetByte(Addr + 2) << 16);
-   (*op)(Addr);
+      OpAddress = S9xGetWord(OpAddress) | (S9xGetByte(OpAddress + 2) << 16);
 }
 
-static void AbsoluteIndirect(AccessMode a, InternalOp op)
+static inline void AbsoluteIndirect(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = *(uint16_t*) CPU.PC;
+   OpAddress = *(uint16_t*) CPU.PC;
 #else
-   Addr = *CPU.PC + (*(CPU.PC + 1) << 8);
+   OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8);
+#endif
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2;
 #endif
-
    OpenBus = *(CPU.PC + 1);
    CPU.PC += 2;
-   Addr = S9xGetWord(Addr);
-   if (a & READ) OpenBus = (uint8_t)(Addr >> 8);
-   Addr += ICPU.ShiftedPB;
-   (*op)(Addr);
+   OpAddress = S9xGetWord(OpAddress);
+   if (read)
+      OpenBus = (uint8_t) (OpAddress >> 8);
+   OpAddress += ICPU.ShiftedPB;
 }
 
-static void Absolute(AccessMode a, InternalOp op)
+static inline void Absolute(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = *(uint16_t*) CPU.PC + ICPU.ShiftedDB;
+   OpAddress = *(uint16_t*) CPU.PC + ICPU.ShiftedDB;
 #else
-   Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.ShiftedDB;
+   OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.ShiftedDB;
 #endif
-   if (a & READ) OpenBus = *(CPU.PC + 1);
+   if (read)
+      OpenBus = *(CPU.PC + 1);
    CPU.PC += 2;
-   (*op)(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2;
+#endif
 }
 
-static void AbsoluteLong(AccessMode a, InternalOp op)
+static inline void AbsoluteLong(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = (*(uint32_t*) CPU.PC) & 0xffffff;
+   OpAddress = (*(uint32_t*) CPU.PC) & 0xffffff;
 #elif defined FAST_ALIGNED_LSB_WORD_ACCESS
    if (((int32_t) CPU.PC & 1) == 0)
-      Addr = (*(uint16_t*) CPU.PC) + (*(CPU.PC + 2) << 16);
+      OpAddress = (*(uint16_t*) CPU.PC) + (*(CPU.PC + 2) << 16);
    else
-      Addr = *CPU.PC + ((*(uint16_t*)(CPU.PC + 1)) << 8);
+      OpAddress = *CPU.PC + ((*(uint16_t*)(CPU.PC + 1)) << 8);
 #else
-   Addr = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16);
+   OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16);
 #endif
-   if (a & READ) OpenBus = *(CPU.PC + 2);
+   if (read)
+      OpenBus = *(CPU.PC + 2);
    CPU.PC += 3;
-   (*op)(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
+#endif
 }
 
-static void Direct(AccessMode a, InternalOp op)
+static inline void Direct(bool read)
 {
-   if (a & READ) OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
-   (*op)(Addr);
+   if (read)
+      OpenBus = *CPU.PC;
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed;
+#endif
 }
 
-static void DirectIndirectIndexed(AccessMode a, InternalOp op)
+static inline void DirectIndirectIndexed(bool read)
 {
    OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
-
-   Addr = S9xGetWord(Addr);
-   if (a & READ) OpenBus = (uint8_t)(Addr >> 8);
-   Addr += ICPU.ShiftedDB + ICPU.Registers.Y.W;
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed;
+#endif
+   OpAddress = S9xGetWord(OpAddress);
+   if (read)
+      OpenBus = (uint8_t)(OpAddress >> 8);
+   OpAddress += ICPU.ShiftedDB + ICPU.Registers.Y.W;
 
    // XXX: always add one if STA
    // XXX: else Add one cycle if crosses page boundary
-   (*op)(Addr);
 }
 
-static void DirectIndirectIndexedLong(AccessMode a, InternalOp op)
+static inline void DirectIndirectIndexedLong(bool read)
 {
    OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
-
-   if (a & READ)
-      Addr = S9xGetWord(Addr) + ((OpenBus = S9xGetByte(Addr + 2)) << 16) +
-             ICPU.Registers.Y.W;
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed;
+#endif
+   if (read)
+      OpAddress = S9xGetWord(OpAddress) + ((OpenBus = S9xGetByte(OpAddress + 2)) << 16) + ICPU.Registers.Y.W;
    else
-      Addr = S9xGetWord(Addr) + (S9xGetByte(Addr + 2) << 16) + ICPU.Registers.Y.W;
-   (*op)(Addr);
+      OpAddress = S9xGetWord(OpAddress) + (S9xGetByte(OpAddress + 2) << 16) + ICPU.Registers.Y.W;
 }
 
-static void DirectIndexedIndirect(AccessMode a, InternalOp op)
+static inline void DirectIndexedIndirect(bool read)
 {
    OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W) & 0xffff;
-
-   Addr = S9xGetWord(Addr);
-   if (a & READ) OpenBus = (uint8_t)(Addr >> 8);
-   Addr += ICPU.ShiftedDB;
-   (*op)(Addr);
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed;
+#endif
+   OpAddress = S9xGetWord(OpAddress);
+   if (read)
+      OpenBus = (uint8_t)(OpAddress >> 8);
+   OpAddress += ICPU.ShiftedDB;
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 }
 
-static void DirectIndexedX(AccessMode a, InternalOp op)
+static inline void DirectIndexedX(bool read)
 {
-   if (a & READ) OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W);
-   Addr &= CheckEmulation() ? 0xff : 0xffff;
-
-   (*op)(Addr);
+   if (read)
+      OpenBus = *CPU.PC;
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.X.W);
+   OpAddress &= CheckEmulation() ? 0xff : 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+#endif
 }
 
-static void DirectIndexedY(AccessMode a, InternalOp op)
+static void DirectIndexedY(bool read)
 {
-   if (a & READ) OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.Y.W);
-   Addr &= CheckEmulation() ? 0xff : 0xffff;
-   (*op)(Addr);
+   if (read)
+      OpenBus = *CPU.PC;
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W + ICPU.Registers.Y.W);
+   OpAddress &= CheckEmulation() ? 0xff : 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+#endif
 }
 
-static void AbsoluteIndexedX(AccessMode a, InternalOp op)
+static inline void AbsoluteIndexedX(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = ICPU.ShiftedDB + *(uint16_t*) CPU.PC + ICPU.Registers.X.W;
+   OpAddress = ICPU.ShiftedDB + *(uint16_t*) CPU.PC + ICPU.Registers.X.W;
 #else
-   Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
-          ICPU.Registers.X.W;
+   OpAddress = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.Registers.X.W;
 #endif
-   if (a & READ) OpenBus = *(CPU.PC + 1);
+   if (read)
+      OpenBus = *(CPU.PC + 1);
    CPU.PC += 2;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2;
+#endif
    // XXX: always add one cycle for ROL, LSR, etc
    // XXX: else is cross page boundary add one cycle
-   (*op)(Addr);
 }
 
-static void AbsoluteIndexedY(AccessMode a, InternalOp op)
+static inline void AbsoluteIndexedY(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = ICPU.ShiftedDB + *(uint16_t*) CPU.PC + ICPU.Registers.Y.W;
+   OpAddress = ICPU.ShiftedDB + *(uint16_t*) CPU.PC + ICPU.Registers.Y.W;
 #else
-   Addr = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
-          ICPU.Registers.Y.W;
+   OpAddress = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.Registers.Y.W;
 #endif
-   if (a & READ) OpenBus = *(CPU.PC + 1);
+   if (read)
+      OpenBus = *(CPU.PC + 1);
    CPU.PC += 2;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeedx2;
+#endif
    // XXX: always add cycle for STA
    // XXX: else is cross page boundary add one cycle
-   (*op)(Addr);
 }
 
-static void AbsoluteLongIndexedX(AccessMode a, InternalOp op)
+static inline void AbsoluteLongIndexedX(bool read)
 {
-   int32_t Addr;
 #ifdef FAST_LSB_WORD_ACCESS
-   Addr = (*(uint32_t*) CPU.PC + ICPU.Registers.X.W) & 0xffffff;
+    OpAddress = (*(uint32_t*) CPU.PC + ICPU.Registers.X.W) & 0xffffff;
 #elif defined FAST_ALIGNED_LSB_WORD_ACCESS
    if (((int32_t) CPU.PC & 1) == 0)
-      Addr = ((*(uint16_t*) CPU.PC) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xFFFFFF;
+       OpAddress = ((*(uint16_t*) CPU.PC) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xFFFFFF;
    else
-      Addr = (*CPU.PC + ((*(uint16_t*)(CPU.PC + 1)) << 8) + ICPU.Registers.X.W) & 0xFFFFFF;
+       OpAddress = (*CPU.PC + ((*(uint16_t*)(CPU.PC + 1)) << 8) + ICPU.Registers.X.W) & 0xFFFFFF;
 #else
-   Addr = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) +
-           ICPU.Registers.X.W) & 0xffffff;
+    OpAddress = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + ICPU.Registers.X.W) & 0xffffff;
 #endif
-   if (a & READ) OpenBus = *(CPU.PC + 2);
+    if (read)
+       OpenBus = *(CPU.PC + 2);
    CPU.PC += 3;
-   (*op)(Addr);
+#ifndef SA1_OPCODES
+    CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
+#endif
 }
 
-static void DirectIndirect(AccessMode a, InternalOp op)
+static inline void DirectIndirect(bool read)
 {
    OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
-   Addr = S9xGetWord(Addr);
-   if (a & READ) OpenBus = (uint8_t)(Addr >> 8);
-   Addr += ICPU.ShiftedDB;
-   (*op)(Addr);
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed;
+#endif
+   OpAddress = S9xGetWord(OpAddress);
+   if (read)
+      OpenBus = (uint8_t)(OpAddress >> 8);
+   OpAddress += ICPU.ShiftedDB;
 }
 
-static void DirectIndirectLong(AccessMode a, InternalOp op)
+static inline void DirectIndirectLong(bool read)
 {
    OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
-   if (a & READ)
-      Addr = S9xGetWord(Addr) + ((OpenBus = S9xGetByte(Addr + 2)) << 16);
+   OpAddress = (*CPU.PC++ + ICPU.Registers.D.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed;
+#endif
+   if (read)
+      OpAddress = S9xGetWord(OpAddress) + ((OpenBus = S9xGetByte(OpAddress + 2)) << 16);
    else
-      Addr = S9xGetWord(Addr) + (S9xGetByte(Addr + 2) << 16);
-   (*op)(Addr);
+      OpAddress = S9xGetWord(OpAddress) + (S9xGetByte(OpAddress + 2) << 16);
 }
 
-static void StackRelative(AccessMode a, InternalOp op)
+static inline void StackRelative(bool read)
 {
-   if (a & READ) OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
-   (*op)(Addr);
+   if (read)
+      OpenBus = *CPU.PC;
+   OpAddress = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+#endif
 }
 
-static void StackRelativeIndirectIndexed(AccessMode a, InternalOp op)
+static inline void StackRelativeIndirectIndexed(bool read)
 {
    OpenBus = *CPU.PC;
-   int32_t Addr = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
-   Addr = S9xGetWord(Addr);
-   if (a & READ) OpenBus = (uint8_t)(Addr >> 8);
-   Addr = (Addr + ICPU.ShiftedDB +
-           ICPU.Registers.Y.W) & 0xffffff;
-   (*op)(Addr);
+   OpAddress = (*CPU.PC++ + ICPU.Registers.S.W) & 0xffff;
+#ifndef SA1_OPCODES
+   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
+#endif
+   OpAddress = S9xGetWord(OpAddress);
+   if (read)
+      OpenBus = (uint8_t)(OpAddress >> 8);
+   OpAddress = (OpAddress + ICPU.ShiftedDB + ICPU.Registers.Y.W) & 0xffffff;
 }
 #endif
diff --git a/source/cpumacro.h b/source/cpumacro.h
index eb76b69..5868fed 100644
--- a/source/cpumacro.h
+++ b/source/cpumacro.h
@@ -3,50 +3,49 @@
 #ifndef _CPUMACRO_H_
 #define _CPUMACRO_H_
 
-static void SetZN16(uint16_t Work)
+extern int32_t OpAddress;
+
+static inline void SetZN16(uint16_t Work)
 {
    ICPU._Zero = Work != 0;
    ICPU._Negative = (uint8_t)(Work >> 8);
 }
 
-static void SetZN8(uint8_t Work)
+static inline void SetZN8(uint8_t Work)
 {
    ICPU._Zero = Work;
    ICPU._Negative = Work;
 }
 
-static void ADC8(int32_t Addr)
+static inline void ADC8()
 {
-   uint8_t Work8 = S9xGetByte(Addr);
+   uint8_t Work8 = S9xGetByte(OpAddress);
 
    if (CheckDecimal())
    {
-      uint8_t A1 = (ICPU.Registers.A.W) & 0xF;
-      uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xF;
-      uint8_t W1 = Work8 & 0xF;
-      uint8_t W2 = (Work8 >> 4) & 0xF;
+      uint8_t A1 = (ICPU.Registers.A.W) & 0x0f;
+      uint8_t A2 = (ICPU.Registers.A.W) & 0xf0;
+      uint8_t W1 = Work8 & 0x0f;
+      uint8_t W2 = Work8 & 0xf0;
 
       A1 += W1 + CheckCarry();
-      if (A1 > 9)
+      if (A1 >= 0x0a)
       {
-         A1 -= 10;
-         A1 &= 0xF;
-         A2++;
+         A1 -= 0x0a;
+         A2 += 0x10;
       }
 
       A2 += W2;
-      if (A2 > 9)
+      if (A2 >= 0xa0)
       {
-         A2 -= 10;
-         A2 &= 0xF;
+         A2 -= 0xa0;
          SetCarry();
       }
       else
          ClearCarry();
 
-      int8_t Ans8 = (A2 << 4) | A1;
-      if (~(ICPU.Registers.AL ^ Work8) &
-            (Work8 ^ Ans8) & 0x80)
+      uint8_t Ans8 = A2 | A1;
+      if (~(ICPU.Registers.AL ^ Work8) & (Work8 ^ Ans8) & 0x80)
          SetOverflow();
       else
          ClearOverflow();
@@ -54,12 +53,9 @@ static void ADC8(int32_t Addr)
    }
    else
    {
-      int16_t Ans16 = ICPU.Registers.AL + Work8 + CheckCarry();
-
-      ICPU._Carry = Ans16 >= 0x100;
-
-      if (~(ICPU.Registers.AL ^ Work8) &
-            (Work8 ^ (uint8_t) Ans16) & 0x80)
+      uint16_t Ans16 = ICPU.Registers.AL + Work8 + CheckCarry();
+      ICPU._Carry = Ans16 > 0xff;
+      if (~(ICPU.Registers.AL ^ Work8) & (Work8 ^ (uint8_t) Ans16) & 0x80)
          SetOverflow();
       else
          ClearOverflow();
@@ -68,58 +64,53 @@ static void ADC8(int32_t Addr)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void ADC16(int32_t Addr)
+static inline void ADC16()
 {
-   uint16_t Work16 = S9xGetWord(Addr);
+   uint16_t Work16 = S9xGetWord(OpAddress);
 
    if (CheckDecimal())
    {
-      uint8_t A1 = (ICPU.Registers.A.W) & 0xF;
-      uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xF;
-      uint8_t A3 = (ICPU.Registers.A.W >> 8) & 0xF;
-      uint8_t A4 = (ICPU.Registers.A.W >> 12) & 0xF;
-      uint8_t W1 = Work16 & 0xF;
-      uint8_t W2 = (Work16 >> 4) & 0xF;
-      uint8_t W3 = (Work16 >> 8) & 0xF;
-      uint8_t W4 = (Work16 >> 12) & 0xF;
+      uint16_t A1 = ICPU.Registers.A.W & 0x000f;
+      uint16_t A2 = ICPU.Registers.A.W & 0x00f0;
+      uint16_t A3 = ICPU.Registers.A.W & 0x0f00;
+      uint16_t A4 = ICPU.Registers.A.W & 0xf000;
+      uint16_t W1 = Work16 & 0x000f;
+      uint16_t W2 = Work16 & 0x00f0;
+      uint16_t W3 = Work16 & 0x0f00;
+      uint16_t W4 = Work16 & 0xf000;
 
       A1 += W1 + CheckCarry();
-      if (A1 > 9)
+      if (A1 >= 0x000a)
       {
-         A1 -= 10;
-         A1 &= 0xF;
-         A2++;
+         A1 -= 0x000a;
+         A2 += 0x0010;
       }
 
       A2 += W2;
-      if (A2 > 9)
+      if (A2 >= 0x00a0)
       {
-         A2 -= 10;
-         A2 &= 0xF;
-         A3++;
+         A2 -= 0x00a0;
+         A3 += 0x0100;
       }
 
       A3 += W3;
-      if (A3 > 9)
+      if (A3 >= 0x0a00)
       {
-         A3 -= 10;
-         A3 &= 0xF;
-         A4++;
+         A3 -= 0x0a00;
+         A4 += 0x1000;
       }
 
       A4 += W4;
-      if (A4 > 9)
+      if (A4 >= 0xa000)
       {
-         A4 -= 10;
-         A4 &= 0xF;
+         A4 -= 0xa000;
          SetCarry();
       }
       else
          ClearCarry();
 
-      uint16_t Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
-      if (~(ICPU.Registers.A.W ^ Work16) &
-            (Work16 ^ Ans16) & 0x8000)
+      uint16_t Ans16 = A4 | A3 | A2 | A1;
+      if (~(ICPU.Registers.A.W ^ Work16) & (Work16 ^ Ans16) & 0x8000)
          SetOverflow();
       else
          ClearOverflow();
@@ -129,10 +120,9 @@ static void ADC16(int32_t Addr)
    {
       uint32_t Ans32 = ICPU.Registers.A.W + Work16 + CheckCarry();
 
-      ICPU._Carry = Ans32 >= 0x10000;
+      ICPU._Carry = Ans32 > 0xffff;
 
-      if (~(ICPU.Registers.A.W ^ Work16) &
-            (Work16 ^ (uint16_t) Ans32) & 0x8000)
+      if (~(ICPU.Registers.A.W ^ Work16) & (Work16 ^ (uint16_t) Ans32) & 0x8000)
          SetOverflow();
       else
          ClearOverflow();
@@ -141,15 +131,15 @@ static void ADC16(int32_t Addr)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void AND16(int32_t Addr)
+static inline void AND16()
 {
-   ICPU.Registers.A.W &= S9xGetWord(Addr);
+   ICPU.Registers.A.W &= S9xGetWord(OpAddress);
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void AND8(int32_t Addr)
+static inline void AND8()
 {
-   ICPU.Registers.AL &= S9xGetByte(Addr);
+   ICPU.Registers.AL &= S9xGetByte(OpAddress);
    SetZN8(ICPU.Registers.AL);
 }
 
@@ -173,81 +163,85 @@ static inline void A_ASL8()
    SetZN8(ICPU.Registers.AL);
 }
 
-static void ASL16(int32_t Addr)
+static inline void ASL16()
 {
-   uint16_t Work16 = S9xGetWord(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint16_t Work16 = S9xGetWord(OpAddress);
    ICPU._Carry = (Work16 & 0x8000) != 0;
    Work16 <<= 1;
-   S9xSetByte(Work16 >> 8, Addr + 1);
-   S9xSetByte(Work16 & 0xFF, Addr);
+   S9xSetByte(Work16 >> 8, OpAddress + 1);
+   S9xSetByte(Work16 & 0xFF, OpAddress);
    SetZN16(Work16);
 }
 
-static void ASL8(int32_t Addr)
+static inline void ASL8()
 {
-   uint8_t Work8 = S9xGetByte(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint8_t Work8 = S9xGetByte(OpAddress);
    ICPU._Carry = (Work8 & 0x80) != 0;
    Work8 <<= 1;
-   S9xSetByte(Work8, Addr);
+   S9xSetByte(Work8, OpAddress);
    SetZN8(Work8);
 }
 
-static void BIT16(int32_t Addr)
+static inline void BIT16()
 {
-   uint16_t Work16 = S9xGetWord(Addr);
+   uint16_t Work16 = S9xGetWord(OpAddress);
    ICPU._Overflow = (Work16 & 0x4000) != 0;
    ICPU._Negative = (uint8_t)(Work16 >> 8);
    ICPU._Zero = (Work16 & ICPU.Registers.A.W) != 0;
 }
 
-static void BIT8(int32_t Addr)
+static inline void BIT8()
 {
-   uint8_t Work8 = S9xGetByte(Addr);
+   uint8_t Work8 = S9xGetByte(OpAddress);
    ICPU._Overflow = (Work8 & 0x40) != 0;
    ICPU._Negative = Work8;
    ICPU._Zero = Work8 & ICPU.Registers.AL;
 }
 
-static void CMP16(int32_t Addr)
+static inline void CMP16()
 {
-   int32_t Int32 = (int32_t) ICPU.Registers.A.W - (int32_t) S9xGetWord(Addr);
+   int32_t Int32 = (int32_t) ICPU.Registers.A.W - (int32_t) S9xGetWord(OpAddress);
    ICPU._Carry = Int32 >= 0;
    SetZN16((uint16_t) Int32);
 }
 
-static void CMP8(int32_t Addr)
+static inline void CMP8()
 {
-   int16_t Int16 = (int16_t) ICPU.Registers.AL - (int16_t) S9xGetByte(Addr);
+   int16_t Int16 = (int16_t) ICPU.Registers.AL - (int16_t) S9xGetByte(OpAddress);
    ICPU._Carry = Int16 >= 0;
    SetZN8((uint8_t) Int16);
 }
 
-static void CMX16(int32_t Addr)
+static inline void CMX16()
 {
-   int32_t Int32 = (int32_t) ICPU.Registers.X.W - (int32_t) S9xGetWord(Addr);
+   int32_t Int32 = (int32_t) ICPU.Registers.X.W - (int32_t) S9xGetWord(OpAddress);
    ICPU._Carry = Int32 >= 0;
    SetZN16((uint16_t) Int32);
 }
 
-static void CMX8(int32_t Addr)
+static inline void CMX8()
 {
-   int16_t Int16 = (int16_t) ICPU.Registers.XL -
-                 (int16_t) S9xGetByte(Addr);
+   int16_t Int16 = (int16_t) ICPU.Registers.XL - (int16_t) S9xGetByte(OpAddress);
    ICPU._Carry = Int16 >= 0;
    SetZN8((uint8_t) Int16);
 }
 
-static void CMY16(int32_t Addr)
+static inline void CMY16()
 {
-   int32_t Int32 = (int32_t) ICPU.Registers.Y.W - (int32_t) S9xGetWord(Addr);
+   int32_t Int32 = (int32_t) ICPU.Registers.Y.W - (int32_t) S9xGetWord(OpAddress);
    ICPU._Carry = Int32 >= 0;
    SetZN16((uint16_t) Int32);
 }
 
-static void CMY8(int32_t Addr)
+static inline void CMY8()
 {
-   int16_t Int16 = (int16_t) ICPU.Registers.YL -
-                 (int16_t) S9xGetByte(Addr);
+   int16_t Int16 = (int16_t) ICPU.Registers.YL - (int16_t) S9xGetByte(OpAddress);
    ICPU._Carry = Int16 >= 0;
    SetZN8((uint8_t) Int16);
 }
@@ -260,7 +254,6 @@ static inline void A_DEC16()
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.A.W--;
    SetZN16(ICPU.Registers.A.W);
 }
@@ -273,43 +266,46 @@ static inline void A_DEC8()
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.AL--;
    SetZN8(ICPU.Registers.AL);
 }
 
-static void DEC16(int32_t Addr)
+static inline void DEC16()
 {
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
-   uint16_t Work16 = S9xGetWord(Addr) - 1;
-   S9xSetByte(Work16 >> 8, Addr + 1);
-   S9xSetByte(Work16 & 0xFF, Addr);
+   uint16_t Work16 = S9xGetWord(OpAddress) - 1;
+   S9xSetByte(Work16 >> 8, OpAddress + 1);
+   S9xSetByte(Work16 & 0xFF, OpAddress);
    SetZN16(Work16);
 }
 
-static void DEC8(int32_t Addr)
+static inline void DEC8()
 {
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
-   uint8_t Work8 = S9xGetByte(Addr) - 1;
-   S9xSetByte(Work8, Addr);
+   uint8_t Work8 = S9xGetByte(OpAddress) - 1;
+   S9xSetByte(Work8, OpAddress);
    SetZN8(Work8);
 }
 
-static void EOR16(int32_t Addr)
+static inline void EOR16()
 {
-   ICPU.Registers.A.W ^= S9xGetWord(Addr);
+   ICPU.Registers.A.W ^= S9xGetWord(OpAddress);
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void EOR8(int32_t Addr)
+static inline void EOR8()
 {
-   ICPU.Registers.AL ^= S9xGetByte(Addr);
+   ICPU.Registers.AL ^= S9xGetByte(OpAddress);
    SetZN8(ICPU.Registers.AL);
 }
 
@@ -321,7 +317,6 @@ static inline void A_INC16()
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.A.W++;
    SetZN16(ICPU.Registers.A.W);
 }
@@ -334,67 +329,70 @@ static inline void A_INC8()
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.AL++;
    SetZN8(ICPU.Registers.AL);
 }
 
-static void INC16(int32_t Addr)
+static inline void INC16()
 {
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
-   uint16_t Work16 = S9xGetWord(Addr) + 1;
-   S9xSetByte(Work16 >> 8, Addr + 1);
-   S9xSetByte(Work16 & 0xFF, Addr);
+   uint16_t Work16 = S9xGetWord(OpAddress) + 1;
+   S9xSetByte(Work16 >> 8, OpAddress + 1);
+   S9xSetByte(Work16 & 0xFF, OpAddress);
    SetZN16(Work16);
 }
 
-static void INC8(int32_t Addr)
+static inline void INC8()
 {
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
-   uint8_t Work8 = S9xGetByte(Addr) + 1;
-   S9xSetByte(Work8, Addr);
+   uint8_t Work8 = S9xGetByte(OpAddress) + 1;
+   S9xSetByte(Work8, OpAddress);
    SetZN8(Work8);
 }
 
-static void LDA16(int32_t Addr)
+static inline void LDA16()
 {
-   ICPU.Registers.A.W = S9xGetWord(Addr);
+   ICPU.Registers.A.W = S9xGetWord(OpAddress);
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void LDA8(int32_t Addr)
+static inline void LDA8()
 {
-   ICPU.Registers.AL = S9xGetByte(Addr);
+   ICPU.Registers.AL = S9xGetByte(OpAddress);
    SetZN8(ICPU.Registers.AL);
 }
 
-static void LDX16(int32_t Addr)
+static inline void LDX16()
 {
-   ICPU.Registers.X.W = S9xGetWord(Addr);
+   ICPU.Registers.X.W = S9xGetWord(OpAddress);
    SetZN16(ICPU.Registers.X.W);
 }
 
-static void LDX8(int32_t Addr)
+static inline void LDX8()
 {
-   ICPU.Registers.XL = S9xGetByte(Addr);
+   ICPU.Registers.XL = S9xGetByte(OpAddress);
    SetZN8(ICPU.Registers.XL);
 }
 
-static void LDY16(int32_t Addr)
+static inline void LDY16()
 {
-   ICPU.Registers.Y.W = S9xGetWord(Addr);
+   ICPU.Registers.Y.W = S9xGetWord(OpAddress);
    SetZN16(ICPU.Registers.Y.W);
 }
 
-static void LDY8(int32_t Addr)
+static inline void LDY8()
 {
-   ICPU.Registers.YL = S9xGetByte(Addr);
+   ICPU.Registers.YL = S9xGetByte(OpAddress);
    SetZN8(ICPU.Registers.YL);
 }
 
@@ -418,34 +416,40 @@ static inline void A_LSR8()
    SetZN8(ICPU.Registers.AL);
 }
 
-static void LSR16(int32_t Addr)
+static inline void LSR16()
 {
-   uint16_t Work16 = S9xGetWord(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint16_t Work16 = S9xGetWord(OpAddress);
    ICPU._Carry = Work16 & 1;
    Work16 >>= 1;
-   S9xSetByte(Work16 >> 8, Addr + 1);
-   S9xSetByte(Work16 & 0xFF, Addr);
+   S9xSetByte(Work16 >> 8, OpAddress + 1);
+   S9xSetByte(Work16 & 0xFF, OpAddress);
    SetZN16(Work16);
 }
 
-static void LSR8(int32_t Addr)
+static inline void LSR8()
 {
-   uint8_t Work8 = S9xGetByte(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint8_t Work8 = S9xGetByte(OpAddress);
    ICPU._Carry = Work8 & 1;
    Work8 >>= 1;
-   S9xSetByte(Work8, Addr);
+   S9xSetByte(Work8, OpAddress);
    SetZN8(Work8);
 }
 
-static void ORA16(int32_t Addr)
+static inline void ORA16()
 {
-   ICPU.Registers.A.W |= S9xGetWord(Addr);
+   ICPU.Registers.A.W |= S9xGetWord(OpAddress);
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void ORA8(int32_t Addr)
+static inline void ORA8()
 {
-   ICPU.Registers.AL |= S9xGetByte(Addr);
+   ICPU.Registers.AL |= S9xGetByte(OpAddress);
    SetZN8(ICPU.Registers.AL);
 }
 
@@ -455,7 +459,7 @@ static inline void A_ROL16()
    CPU.Cycles += ONE_CYCLE;
 #endif
    uint32_t Work32 = (ICPU.Registers.A.W << 1) | CheckCarry();
-   ICPU._Carry = Work32 >= 0x10000;
+   ICPU._Carry = Work32 > 0xffff;
    ICPU.Registers.A.W = (uint16_t) Work32;
    SetZN16((uint16_t) Work32);
 }
@@ -468,29 +472,35 @@ static inline void A_ROL8()
    uint16_t Work16 = ICPU.Registers.AL;
    Work16 <<= 1;
    Work16 |= CheckCarry();
-   ICPU._Carry = Work16 >= 0x100;
+   ICPU._Carry = Work16 > 0xff;
    ICPU.Registers.AL = (uint8_t) Work16;
    SetZN8((uint8_t) Work16);
 }
 
-static void ROL16(int32_t Addr)
+static inline void ROL16()
 {
-   uint32_t Work32 = S9xGetWord(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint32_t Work32 = S9xGetWord(OpAddress);
    Work32 <<= 1;
    Work32 |= CheckCarry();
-   ICPU._Carry = Work32 >= 0x10000;
-   S9xSetByte((Work32 >> 8) & 0xFF, Addr + 1);
-   S9xSetByte(Work32 & 0xFF, Addr);
+   ICPU._Carry = Work32 > 0xffff;
+   S9xSetByte((Work32 >> 8) & 0xFF, OpAddress + 1);
+   S9xSetByte(Work32 & 0xFF, OpAddress);
    SetZN16((uint16_t) Work32);
 }
 
-static void ROL8(int32_t Addr)
+static inline void ROL8()
 {
-   uint16_t Work16 = S9xGetByte(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint16_t Work16 = S9xGetByte(OpAddress);
    Work16 <<= 1;
    Work16 |= CheckCarry();
-   ICPU._Carry = Work16 >= 0x100;
-   S9xSetByte((uint8_t) Work16, Addr);
+   ICPU._Carry = Work16 > 0xff;
+   S9xSetByte((uint8_t) Work16, OpAddress);
    SetZN8((uint8_t) Work16);
 }
 
@@ -519,215 +529,229 @@ static inline void A_ROR8()
    SetZN8((uint8_t) Work16);
 }
 
-static void ROR16(int32_t Addr)
+static inline void ROR16()
 {
-   uint32_t Work32 = S9xGetWord(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint32_t Work32 = S9xGetWord(OpAddress);
    Work32 |= (int32_t) CheckCarry() << 16;
    ICPU._Carry = (uint8_t)(Work32 & 1);
    Work32 >>= 1;
-   S9xSetByte((Work32 >> 8) & 0x00FF, Addr + 1);
-   S9xSetByte(Work32 & 0x00FF, Addr);
+   S9xSetByte((Work32 >> 8) & 0x00FF, OpAddress + 1);
+   S9xSetByte(Work32 & 0x00FF, OpAddress);
    SetZN16((uint16_t) Work32);
 }
 
-static void ROR8(int32_t Addr)
+static inline void ROR8()
 {
-   uint16_t Work16 = S9xGetByte(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint16_t Work16 = S9xGetByte(OpAddress);
    Work16 |= (int32_t) CheckCarry() << 8;
    ICPU._Carry = (uint8_t)(Work16 & 1);
    Work16 >>= 1;
-   S9xSetByte((uint8_t) Work16, Addr);
+   S9xSetByte((uint8_t) Work16, OpAddress);
    SetZN8((uint8_t) Work16);
 }
 
-static void SBC16(int32_t Addr)
+static inline void SBC16()
 {
-   uint16_t Work16 = S9xGetWord(Addr);
+   uint16_t Work16 = S9xGetWord(OpAddress);
 
    if (CheckDecimal())
    {
-      uint8_t A1 = (ICPU.Registers.A.W) & 0xF;
-      uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xF;
-      uint8_t A3 = (ICPU.Registers.A.W >> 8) & 0xF;
-      uint8_t A4 = (ICPU.Registers.A.W >> 12) & 0xF;
-      uint8_t W1 = Work16 & 0xF;
-      uint8_t W2 = (Work16 >> 4) & 0xF;
-      uint8_t W3 = (Work16 >> 8) & 0xF;
-      uint8_t W4 = (Work16 >> 12) & 0xF;
+      uint16_t A1 = ICPU.Registers.A.W & 0x000f;
+      uint16_t A2 = ICPU.Registers.A.W & 0x00f0;
+      uint16_t A3 = ICPU.Registers.A.W & 0x0f00;
+      uint16_t A4 = ICPU.Registers.A.W & 0xf000;
+      uint16_t W1 = Work16 & 0x000f;
+      uint16_t W2 = Work16 & 0x00f0;
+      uint16_t W3 = Work16 & 0x0f00;
+      uint16_t W4 = Work16 & 0xf000;
 
       A1 -= W1 + !CheckCarry();
       A2 -= W2;
       A3 -= W3;
       A4 -= W4;
-      if (A1 > 9)
+      if (A1 > 0x000f)
       {
-         A1 += 10;
-         A2--;
+         A1 += 0x000a;
+         A1 &= 0x000f;
+         A2 -= 0x0010;
       }
-      if (A2 > 9)
+      if (A2 > 0x00f0)
       {
-         A2 += 10;
-         A3--;
+         A2 += 0x00a0;
+         A2 &= 0x00f0;
+         A3 -= 0x0100;
       }
-      if (A3 > 9)
+      if (A3 > 0x0f00)
       {
-         A3 += 10;
-         A4--;
+         A3 += 0x0a00;
+         A3 &= 0x0f00;
+         A4 -= 0x1000;
       }
-      if (A4 > 9)
+      if (A4 > 0xf000)
       {
-         A4 += 10;
+         A4 += 0xa000;
+         A4 &= 0xf000;
          ClearCarry();
       }
       else
          SetCarry();
 
-      uint16_t Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
-      if ((ICPU.Registers.A.W ^ Work16) &
-            (ICPU.Registers.A.W ^ Ans16) & 0x8000)
+      uint16_t Ans16 = A4 | A3 | A2 | A1;
+      if ((ICPU.Registers.A.W ^ Work16) & (ICPU.Registers.A.W ^ Ans16) & 0x8000)
          SetOverflow();
       else
          ClearOverflow();
       ICPU.Registers.A.W = Ans16;
-      SetZN16(ICPU.Registers.A.W);
    }
    else
    {
       int32_t Int32 = (int32_t) ICPU.Registers.A.W - (int32_t) Work16 + (int32_t) CheckCarry() - 1;
-
       ICPU._Carry = Int32 >= 0;
-
-      if ((ICPU.Registers.A.W ^ Work16) &
-            (ICPU.Registers.A.W ^ (uint16_t) Int32) & 0x8000)
+      if ((ICPU.Registers.A.W ^ Work16) & (ICPU.Registers.A.W ^ (uint16_t) Int32) & 0x8000)
          SetOverflow();
       else
          ClearOverflow();
       ICPU.Registers.A.W = (uint16_t) Int32;
-      SetZN16(ICPU.Registers.A.W);
    }
+   SetZN16(ICPU.Registers.A.W);
 }
 
-static void SBC8(int32_t Addr)
+static inline void SBC8()
 {
-   uint8_t Work8 = S9xGetByte(Addr);
+   uint8_t Work8 = S9xGetByte(OpAddress);
    if (CheckDecimal())
    {
-      uint8_t A1 = (ICPU.Registers.A.W) & 0xF;
-      uint8_t A2 = (ICPU.Registers.A.W >> 4) & 0xF;
-      uint8_t W1 = Work8 & 0xF;
-      uint8_t W2 = (Work8 >> 4) & 0xF;
+      uint8_t A1 = ICPU.Registers.A.W & 0x0f;
+      uint8_t A2 = ICPU.Registers.A.W & 0xf0;
+      uint8_t W1 = Work8 & 0x0f;
+      uint8_t W2 = Work8 & 0xf0;
 
       A1 -= W1 + !CheckCarry();
       A2 -= W2;
-      if (A1 > 9)
+      if (A1 > 0x0f)
       {
-         A1 += 10;
-         A2--;
+         A1 += 0x0a;
+         A1 &= 0x0f;
+         A2 -= 0x10;
       }
-      if (A2 > 9)
+      if (A2 > 0xf0)
       {
-         A2 += 10;
+         A2 += 0xa0;
+         A2 &= 0xf0;
          ClearCarry();
       }
       else
          SetCarry();
 
-      uint8_t Ans8 = (A2 << 4) | A1;
-      if ((ICPU.Registers.AL ^ Work8) &
-            (ICPU.Registers.AL ^ Ans8) & 0x80)
+      uint8_t Ans8 = A2 | A1;
+      if ((ICPU.Registers.AL ^ Work8) & (ICPU.Registers.AL ^ Ans8) & 0x80)
          SetOverflow();
       else
          ClearOverflow();
       ICPU.Registers.AL = Ans8;
-      SetZN8(ICPU.Registers.AL);
    }
    else
    {
-      int16_t Int16 = (int16_t) ICPU.Registers.AL - (int16_t) Work8 +
-                    (int16_t) CheckCarry() - 1;
-
+      int16_t Int16 = (int16_t) ICPU.Registers.AL - (int16_t) Work8 + (int16_t) CheckCarry() - 1;
       ICPU._Carry = Int16 >= 0;
-      if ((ICPU.Registers.AL ^ Work8) &
-            (ICPU.Registers.AL ^ (uint8_t) Int16) & 0x80)
+      if ((ICPU.Registers.AL ^ Work8) & (ICPU.Registers.AL ^ (uint8_t) Int16) & 0x80)
          SetOverflow();
       else
          ClearOverflow();
       ICPU.Registers.AL = (uint8_t) Int16;
-      SetZN8(ICPU.Registers.AL);
    }
+   SetZN8(ICPU.Registers.AL);
 }
 
-static void STA16(int32_t Addr)
+static inline void STA16()
 {
-   S9xSetWord(ICPU.Registers.A.W, Addr);
+   S9xSetWord(ICPU.Registers.A.W, OpAddress);
 }
 
-static void STA8(int32_t Addr)
+static inline void STA8()
 {
-   S9xSetByte(ICPU.Registers.AL, Addr);
+   S9xSetByte(ICPU.Registers.AL, OpAddress);
 }
 
-static void STX16(int32_t Addr)
+static inline void STX16()
 {
-   S9xSetWord(ICPU.Registers.X.W, Addr);
+   S9xSetWord(ICPU.Registers.X.W, OpAddress);
 }
 
-static void STX8(int32_t Addr)
+static inline void STX8()
 {
-   S9xSetByte(ICPU.Registers.XL, Addr);
+   S9xSetByte(ICPU.Registers.XL, OpAddress);
 }
 
-static void STY16(int32_t Addr)
+static inline void STY16()
 {
-   S9xSetWord(ICPU.Registers.Y.W, Addr);
+   S9xSetWord(ICPU.Registers.Y.W, OpAddress);
 }
 
-static void STY8(int32_t Addr)
+static inline void STY8()
 {
-   S9xSetByte(ICPU.Registers.YL, Addr);
+   S9xSetByte(ICPU.Registers.YL, OpAddress);
 }
 
-static void STZ16(int32_t Addr)
+static inline void STZ16()
 {
-   S9xSetWord(0, Addr);
+   S9xSetWord(0, OpAddress);
 }
 
-static void STZ8(int32_t Addr)
+static inline void STZ8()
 {
-   S9xSetByte(0, Addr);
+   S9xSetByte(0, OpAddress);
 }
 
-static void TSB16(int32_t Addr)
+static inline void TSB16()
 {
-   uint16_t Work16 = S9xGetWord(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint16_t Work16 = S9xGetWord(OpAddress);
    ICPU._Zero = (Work16 & ICPU.Registers.A.W) != 0;
    Work16 |= ICPU.Registers.A.W;
-   S9xSetByte(Work16 >> 8, Addr + 1);
-   S9xSetByte(Work16 & 0xFF, Addr);
+   S9xSetByte(Work16 >> 8, OpAddress + 1);
+   S9xSetByte(Work16 & 0xFF, OpAddress);
 }
 
-static void TSB8(int32_t Addr)
+static inline void TSB8()
 {
-   uint8_t Work8 = S9xGetByte(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint8_t Work8 = S9xGetByte(OpAddress);
    ICPU._Zero = Work8 & ICPU.Registers.AL;
    Work8 |= ICPU.Registers.AL;
-   S9xSetByte(Work8, Addr);
+   S9xSetByte(Work8, OpAddress);
 }
 
-static void TRB16(int32_t Addr)
+static inline void TRB16()
 {
-   uint16_t Work16 = S9xGetWord(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint16_t Work16 = S9xGetWord(OpAddress);
    ICPU._Zero = (Work16 & ICPU.Registers.A.W) != 0;
    Work16 &= ~ICPU.Registers.A.W;
-   S9xSetByte(Work16 >> 8, Addr + 1);
-   S9xSetByte(Work16 & 0xFF, Addr);
+   S9xSetByte(Work16 >> 8, OpAddress + 1);
+   S9xSetByte(Work16 & 0xFF, OpAddress);
 }
 
-static void TRB8(int32_t Addr)
+static inline void TRB8()
 {
-   uint8_t Work8 = S9xGetByte(Addr);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
+   uint8_t Work8 = S9xGetByte(OpAddress);
    ICPU._Zero = Work8 & ICPU.Registers.AL;
    Work8 &= ~ICPU.Registers.AL;
-   S9xSetByte(Work8, Addr);
+   S9xSetByte(Work8, OpAddress);
 }
 #endif
diff --git a/source/cpuops.c b/source/cpuops.c
index 2325255..0b92901 100644
--- a/source/cpuops.c
+++ b/source/cpuops.c
@@ -1,8 +1,8 @@
 #include "../copyright"
 
 /*****************************************************************************/
-/* CPU-S9xOpcodes.CPP                                                                            */
-/* This file contains all the opcodes                                                         */
+/* CPU-S9xOpcodes.CPP                                                        */
+/* This file contains all the opcodes                                        */
 /*****************************************************************************/
 
 #include "snes9x.h"
@@ -20,251 +20,191 @@
 
 int32_t OpAddress;
 
-// For use with the opcodes whose functions here examine the OpAddress.
-static void OpAddressPassthrough(int32_t Addr)
-{
-   OpAddress = Addr;
-}
-
 /* ADC *************************************************************************************** */
-static void Op69M1(void)
+static void Op69M1()
 {
-   Immediate8(READ, ADC8);
+   Immediate8();
+   ADC8();
 }
 
-static void Op69M0(void)
+static void Op69M0()
 {
-   Immediate16(READ, ADC16);
+   Immediate16();
+   ADC16();
 }
 
-static void Op65M1(void)
+static void Op65M1()
 {
-   Direct(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   ADC8();
 }
 
-static void Op65M0(void)
+static void Op65M0()
 {
-   Direct(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   ADC16();
 }
 
-static void Op75M1(void)
+static void Op75M1()
 {
-   DirectIndexedX(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   ADC8();
 }
 
-static void Op75M0(void)
+static void Op75M0()
 {
-   DirectIndexedX(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   ADC16();
 }
 
-static void Op72M1(void)
+static void Op72M1()
 {
-   DirectIndirect(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   ADC8();
 }
 
-static void Op72M0(void)
+static void Op72M0()
 {
-   DirectIndirect(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   ADC16();
 }
 
-static void Op61M1(void)
+static void Op61M1()
 {
-   DirectIndexedIndirect(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   ADC8();
 }
 
-static void Op61M0(void)
+static void Op61M0()
 {
-   DirectIndexedIndirect(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   ADC16();
 }
 
-static void Op71M1(void)
+static void Op71M1()
 {
-   DirectIndirectIndexed(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   ADC8();
 }
 
-static void Op71M0(void)
+static void Op71M0()
 {
-   DirectIndirectIndexed(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   ADC16();
 }
 
-static void Op67M1(void)
+static void Op67M1()
 {
-   DirectIndirectLong(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   ADC8();
 }
 
-static void Op67M0(void)
+static void Op67M0()
 {
-   DirectIndirectLong(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   ADC16();
 }
 
-static void Op77M1(void)
+static void Op77M1()
 {
-   DirectIndirectIndexedLong(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   ADC8();
 }
 
-static void Op77M0(void)
+static void Op77M0()
 {
-   DirectIndirectIndexedLong(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   ADC16();
 }
 
-static void Op6DM1(void)
+static void Op6DM1()
 {
-   Absolute(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   ADC8();
 }
 
-static void Op6DM0(void)
+static void Op6DM0()
 {
-   Absolute(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   ADC16();
 }
 
-static void Op7DM1(void)
+static void Op7DM1()
 {
-   AbsoluteIndexedX(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   ADC8();
 }
 
-static void Op7DM0(void)
+static void Op7DM0()
 {
-   AbsoluteIndexedX(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   ADC16();
 }
 
-static void Op79M1(void)
+static void Op79M1()
 {
-   AbsoluteIndexedY(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   ADC8();
 }
 
-static void Op79M0(void)
+static void Op79M0()
 {
-   AbsoluteIndexedY(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   ADC16();
 }
 
-static void Op6FM1(void)
+static void Op6FM1()
 {
-   AbsoluteLong(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   ADC8();
 }
 
-static void Op6FM0(void)
+static void Op6FM0()
 {
-   AbsoluteLong(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   ADC16();
 }
 
-static void Op7FM1(void)
+static void Op7FM1()
 {
-   AbsoluteLongIndexedX(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   ADC8();
 }
 
-static void Op7FM0(void)
+static void Op7FM0()
 {
-   AbsoluteLongIndexedX(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   ADC16();
 }
 
-static void Op63M1(void)
+static void Op63M1()
 {
-   StackRelative(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   ADC8();
 }
 
-static void Op63M0(void)
+static void Op63M0()
 {
-   StackRelative(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   ADC16();
 }
 
-static void Op73M1(void)
+static void Op73M1()
 {
-   StackRelativeIndirectIndexed(READ, ADC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   ADC8();
 }
 
-static void Op73M0(void)
+static void Op73M0()
 {
-   StackRelativeIndirectIndexed(READ, ADC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   ADC16();
 }
 
 /**********************************************************************************************/
 
 /* AND *************************************************************************************** */
-static void Op29M1(void)
+static void Op29M1()
 {
    ICPU.Registers.AL &= *CPU.PC++;
 #ifndef SA1_OPCODES
@@ -273,7 +213,7 @@ static void Op29M1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void Op29M0(void)
+static void Op29M0()
 {
 #ifdef FAST_LSB_WORD_ACCESS
    ICPU.Registers.A.W &= *(uint16_t*) CPU.PC;
@@ -287,309 +227,237 @@ static void Op29M0(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void Op25M1(void)
+static void Op25M1()
 {
-   Direct(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   AND8();
 }
 
-static void Op25M0(void)
+static void Op25M0()
 {
-   Direct(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   AND16();
 }
 
-static void Op35M1(void)
+static void Op35M1()
 {
-   DirectIndexedX(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   AND8();
 }
 
-static void Op35M0(void)
+static void Op35M0()
 {
-   DirectIndexedX(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   AND16();
 }
 
-static void Op32M1(void)
+static void Op32M1()
 {
-   DirectIndirect(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   AND8();
 }
 
-static void Op32M0(void)
+static void Op32M0()
 {
-   DirectIndirect(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   AND16();
 }
 
-static void Op21M1(void)
+static void Op21M1()
 {
-   DirectIndexedIndirect(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   AND8();
 }
 
-static void Op21M0(void)
+static void Op21M0()
 {
-   DirectIndexedIndirect(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   AND16();
 }
 
-static void Op31M1(void)
+static void Op31M1()
 {
-   DirectIndirectIndexed(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   AND8();
 }
 
-static void Op31M0(void)
+static void Op31M0()
 {
-   DirectIndirectIndexed(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   AND16();
 }
 
-static void Op27M1(void)
+static void Op27M1()
 {
-   DirectIndirectLong(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   AND8();
 }
 
-static void Op27M0(void)
+static void Op27M0()
 {
-   DirectIndirectLong(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   AND16();
 }
 
-static void Op37M1(void)
+static void Op37M1()
 {
-   DirectIndirectIndexedLong(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   AND8();
 }
 
-static void Op37M0(void)
+static void Op37M0()
 {
-   DirectIndirectIndexedLong(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   AND16();
 }
 
-static void Op2DM1(void)
+static void Op2DM1()
 {
-   Absolute(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   AND8();
 }
 
-static void Op2DM0(void)
+static void Op2DM0()
 {
-   Absolute(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   AND16();
 }
 
-static void Op3DM1(void)
+static void Op3DM1()
 {
-   AbsoluteIndexedX(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   AND8();
 }
 
-static void Op3DM0(void)
+static void Op3DM0()
 {
-   AbsoluteIndexedX(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   AND16();
 }
 
-static void Op39M1(void)
+static void Op39M1()
 {
-   AbsoluteIndexedY(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   AND8();
 }
 
-static void Op39M0(void)
+static void Op39M0()
 {
-   AbsoluteIndexedY(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   AND16();
 }
 
-static void Op2FM1(void)
+static void Op2FM1()
 {
-   AbsoluteLong(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   AND8();
 }
 
-static void Op2FM0(void)
+static void Op2FM0()
 {
-   AbsoluteLong(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   AND16();
 }
 
-static void Op3FM1(void)
+static void Op3FM1()
 {
-   AbsoluteLongIndexedX(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   AND8();
 }
 
-static void Op3FM0(void)
+static void Op3FM0()
 {
-   AbsoluteLongIndexedX(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   AND16();
 }
 
-static void Op23M1(void)
+static void Op23M1()
 {
-   StackRelative(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   AND8();
 }
 
-static void Op23M0(void)
+static void Op23M0()
 {
-   StackRelative(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   AND16();
 }
 
-static void Op33M1(void)
+static void Op33M1()
 {
-   StackRelativeIndirectIndexed(READ, AND8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   AND8();
 }
 
-static void Op33M0(void)
+static void Op33M0()
 {
-   StackRelativeIndirectIndexed(READ, AND16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   AND16();
 }
 /**********************************************************************************************/
 
 /* ASL *************************************************************************************** */
-static void Op0AM1(void)
+static void Op0AM1()
 {
    A_ASL8();
 }
 
-static void Op0AM0(void)
+static void Op0AM0()
 {
    A_ASL16();
 }
 
-static void Op06M1(void)
+static void Op06M1()
 {
-   Direct(MODIFY, ASL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   ASL8();
 }
 
-static void Op06M0(void)
+static void Op06M0()
 {
-   Direct(MODIFY, ASL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   ASL16();
 }
 
-static void Op16M1(void)
+static void Op16M1()
 {
-   DirectIndexedX(MODIFY, ASL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   ASL8();
 }
 
-static void Op16M0(void)
+static void Op16M0()
 {
-   DirectIndexedX(MODIFY, ASL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   ASL16();
 }
 
-static void Op0EM1(void)
+static void Op0EM1()
 {
-   Absolute(MODIFY, ASL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   ASL8();
 }
 
-static void Op0EM0(void)
+static void Op0EM0()
 {
-   Absolute(MODIFY, ASL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   ASL16();
 }
 
-static void Op1EM1(void)
+static void Op1EM1()
 {
-   AbsoluteIndexedX(MODIFY, ASL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   ASL8();
 }
 
-static void Op1EM0(void)
+static void Op1EM0()
 {
-   AbsoluteIndexedX(MODIFY, ASL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   ASL16();
 }
 /**********************************************************************************************/
 
 /* BIT *************************************************************************************** */
-static void Op89M1(void)
+static void Op89M1()
 {
    ICPU._Zero = ICPU.Registers.AL & *CPU.PC++;
 #ifndef SA1_OPCODES
@@ -597,7 +465,7 @@ static void Op89M1(void)
 #endif
 }
 
-static void Op89M0(void)
+static void Op89M0()
 {
 #ifdef FAST_LSB_WORD_ACCESS
    ICPU._Zero = (ICPU.Registers.A.W & *(uint16_t*) CPU.PC) != 0;
@@ -610,73 +478,57 @@ static void Op89M0(void)
    CPU.PC += 2;
 }
 
-static void Op24M1(void)
+static void Op24M1()
 {
-   Direct(READ, BIT8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   BIT8();
 }
 
-static void Op24M0(void)
+static void Op24M0()
 {
-   Direct(READ, BIT16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   BIT16();
 }
 
-static void Op34M1(void)
+static void Op34M1()
 {
-   DirectIndexedX(READ, BIT8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   BIT8();
 }
 
-static void Op34M0(void)
+static void Op34M0()
 {
-   DirectIndexedX(READ, BIT16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   BIT16();
 }
 
-static void Op2CM1(void)
+static void Op2CM1()
 {
-   Absolute(READ, BIT8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   BIT8();
 }
 
-static void Op2CM0(void)
+static void Op2CM0()
 {
-   Absolute(READ, BIT16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   BIT16();
 }
 
-static void Op3CM1(void)
+static void Op3CM1()
 {
-   AbsoluteIndexedX(READ, BIT8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   BIT8();
 }
 
-static void Op3CM0(void)
+static void Op3CM0()
 {
-   AbsoluteIndexedX(READ, BIT16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   BIT16();
 }
 /**********************************************************************************************/
 
 /* CMP *************************************************************************************** */
-static void OpC9M1(void)
+static void OpC9M1()
 {
    int32_t Int32 = (int32_t) ICPU.Registers.AL - (int32_t) *CPU.PC++;
    ICPU._Carry = Int32 >= 0;
@@ -686,13 +538,12 @@ static void OpC9M1(void)
 #endif
 }
 
-static void OpC9M0(void)
+static void OpC9M0()
 {
-   int32_t Int32;
 #ifdef FAST_LSB_WORD_ACCESS
-   Int32 = (int32_t) ICPU.Registers.A.W - (int32_t) *(uint16_t*)CPU.PC;
+   int32_t Int32 = (int32_t) ICPU.Registers.A.W - (int32_t) *(uint16_t*)CPU.PC;
 #else
-   Int32 = (int32_t) ICPU.Registers.A.W - (int32_t)(*CPU.PC + (*(CPU.PC + 1) << 8));
+   int32_t Int32 = (int32_t) ICPU.Registers.A.W - (int32_t)(*CPU.PC + (*(CPU.PC + 1) << 8));
 #endif
    ICPU._Carry = Int32 >= 0;
    SetZN16((uint16_t) Int32);
@@ -702,234 +553,178 @@ static void OpC9M0(void)
 #endif
 }
 
-static void OpC5M1(void)
+static void OpC5M1()
 {
-   Direct(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   CMP8();
 }
 
-static void OpC5M0(void)
+static void OpC5M0()
 {
-   Direct(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   CMP16();
 }
 
-static void OpD5M1(void)
+static void OpD5M1()
 {
-   DirectIndexedX(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   CMP8();
 }
 
-static void OpD5M0(void)
+static void OpD5M0()
 {
-   DirectIndexedX(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   CMP16();
 }
 
-static void OpD2M1(void)
+static void OpD2M1()
 {
-   DirectIndirect(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   CMP8();
 }
 
-static void OpD2M0(void)
+static void OpD2M0()
 {
-   DirectIndirect(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   CMP16();
 }
 
-static void OpC1M1(void)
+static void OpC1M1()
 {
-   DirectIndexedIndirect(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   CMP8();
 }
 
-static void OpC1M0(void)
+static void OpC1M0()
 {
-   DirectIndexedIndirect(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   CMP16();
 }
 
-static void OpD1M1(void)
+static void OpD1M1()
 {
-   DirectIndirectIndexed(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   CMP8();
 }
 
-static void OpD1M0(void)
+static void OpD1M0()
 {
-   DirectIndirectIndexed(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   CMP16();
 }
 
-static void OpC7M1(void)
+static void OpC7M1()
 {
-   DirectIndirectLong(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   CMP8();
 }
 
-static void OpC7M0(void)
+static void OpC7M0()
 {
-   DirectIndirectLong(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   CMP16();
 }
 
-static void OpD7M1(void)
+static void OpD7M1()
 {
-   DirectIndirectIndexedLong(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   CMP8();
 }
 
-static void OpD7M0(void)
+static void OpD7M0()
 {
-   DirectIndirectIndexedLong(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   CMP16();
 }
 
-static void OpCDM1(void)
+static void OpCDM1()
 {
-   Absolute(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   CMP8();
 }
 
-static void OpCDM0(void)
+static void OpCDM0()
 {
-   Absolute(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   CMP16();
 }
 
-static void OpDDM1(void)
+static void OpDDM1()
 {
-   AbsoluteIndexedX(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   CMP8();
 }
 
-static void OpDDM0(void)
+static void OpDDM0()
 {
-   AbsoluteIndexedX(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   CMP16();
 }
 
-static void OpD9M1(void)
+static void OpD9M1()
 {
-   AbsoluteIndexedY(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   CMP8();
 }
 
-static void OpD9M0(void)
+static void OpD9M0()
 {
-   AbsoluteIndexedY(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   CMP16();
 }
 
-static void OpCFM1(void)
+static void OpCFM1()
 {
-   AbsoluteLong(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   CMP8();
 }
 
-static void OpCFM0(void)
+static void OpCFM0()
 {
-   AbsoluteLong(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   CMP16();
 }
 
-static void OpDFM1(void)
+static void OpDFM1()
 {
-   AbsoluteLongIndexedX(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   CMP8();
 }
 
-static void OpDFM0(void)
+static void OpDFM0()
 {
-   AbsoluteLongIndexedX(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   CMP16();
 }
 
-static void OpC3M1(void)
+static void OpC3M1()
 {
-   StackRelative(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   CMP8();
 }
 
-static void OpC3M0(void)
+static void OpC3M0()
 {
-   StackRelative(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   CMP16();
 }
 
-static void OpD3M1(void)
+static void OpD3M1()
 {
-   StackRelativeIndirectIndexed(READ, CMP8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   CMP8();
 }
 
-static void OpD3M0(void)
+static void OpD3M0()
 {
-   StackRelativeIndirectIndexed(READ, CMP16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   CMP16();
 }
 
 /**********************************************************************************************/
 
 /* CMX *************************************************************************************** */
-static void OpE0X1(void)
+static void OpE0X1()
 {
    int32_t Int32 = (int32_t) ICPU.Registers.XL - (int32_t) *CPU.PC++;
    ICPU._Carry = Int32 >= 0;
@@ -939,13 +734,12 @@ static void OpE0X1(void)
 #endif
 }
 
-static void OpE0X0(void)
+static void OpE0X0()
 {
-   int32_t Int32;
 #ifdef FAST_LSB_WORD_ACCESS
-   Int32 = (int32_t) ICPU.Registers.X.W - (int32_t) *(uint16_t*)CPU.PC;
+   int32_t Int32 = (int32_t) ICPU.Registers.X.W - (int32_t) *(uint16_t*)CPU.PC;
 #else
-   Int32 = (int32_t) ICPU.Registers.X.W - (int32_t)(*CPU.PC + (*(CPU.PC + 1) << 8));
+   int32_t Int32 = (int32_t) ICPU.Registers.X.W - (int32_t)(*CPU.PC + (*(CPU.PC + 1) << 8));
 #endif
    ICPU._Carry = Int32 >= 0;
    SetZN16((uint16_t) Int32);
@@ -955,42 +749,34 @@ static void OpE0X0(void)
 #endif
 }
 
-static void OpE4X1(void)
+static void OpE4X1()
 {
-   Direct(READ, CMX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   CMX8();
 }
 
-static void OpE4X0(void)
+static void OpE4X0()
 {
-   Direct(READ, CMX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   CMX16();
 }
 
-static void OpECX1(void)
+static void OpECX1()
 {
-   Absolute(READ, CMX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   CMX8();
 }
 
-static void OpECX0(void)
+static void OpECX0()
 {
-   Absolute(READ, CMX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   CMX16();
 }
 
 /**********************************************************************************************/
 
 /* CMY *************************************************************************************** */
-static void OpC0X1(void)
+static void OpC0X1()
 {
    int32_t Int32 = (int32_t) ICPU.Registers.YL - (int32_t) *CPU.PC++;
    ICPU._Carry = Int32 >= 0;
@@ -1000,13 +786,12 @@ static void OpC0X1(void)
 #endif
 }
 
-static void OpC0X0(void)
+static void OpC0X0()
 {
-   int32_t Int32;
 #ifdef FAST_LSB_WORD_ACCESS
-   Int32 = (int32_t) ICPU.Registers.Y.W - (int32_t) *(uint16_t*)CPU.PC;
+   int32_t Int32 = (int32_t) ICPU.Registers.Y.W - (int32_t) *(uint16_t*)CPU.PC;
 #else
-   Int32 = (int32_t) ICPU.Registers.Y.W - (int32_t)(*CPU.PC + (*(CPU.PC + 1) << 8));
+   int32_t Int32 = (int32_t) ICPU.Registers.Y.W - (int32_t)(*CPU.PC + (*(CPU.PC + 1) << 8));
 #endif
    ICPU._Carry = Int32 >= 0;
    SetZN16((uint16_t) Int32);
@@ -1016,119 +801,95 @@ static void OpC0X0(void)
 #endif
 }
 
-static void OpC4X1(void)
+static void OpC4X1()
 {
-   Direct(READ, CMY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   CMY8();
 }
 
-static void OpC4X0(void)
+static void OpC4X0()
 {
-   Direct(READ, CMY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   CMY16();
 }
 
-static void OpCCX1(void)
+static void OpCCX1()
 {
-   Absolute(READ, CMY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   CMY8();
 }
 
-static void OpCCX0(void)
+static void OpCCX0()
 {
-   Absolute(READ, CMY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   CMY16();
 }
 
 /**********************************************************************************************/
 
 /* DEC *************************************************************************************** */
-static void Op3AM1(void)
+static void Op3AM1()
 {
    A_DEC8();
 }
 
-static void Op3AM0(void)
+static void Op3AM0()
 {
    A_DEC16();
 }
 
-static void OpC6M1(void)
+static void OpC6M1()
 {
-   Direct(MODIFY, DEC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   DEC8();
 }
 
-static void OpC6M0(void)
+static void OpC6M0()
 {
-   Direct(MODIFY, DEC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   DEC16();
 }
 
-static void OpD6M1(void)
+static void OpD6M1()
 {
-   DirectIndexedX(MODIFY, DEC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   DEC8();
 }
 
-static void OpD6M0(void)
+static void OpD6M0()
 {
-   DirectIndexedX(MODIFY, DEC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   DEC16();
 }
 
-static void OpCEM1(void)
+static void OpCEM1()
 {
-   Absolute(MODIFY, DEC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   DEC8();
 }
 
-static void OpCEM0(void)
+static void OpCEM0()
 {
-   Absolute(MODIFY, DEC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   DEC16();
 }
 
-static void OpDEM1(void)
+static void OpDEM1()
 {
-   AbsoluteIndexedX(MODIFY, DEC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   DEC8();
 }
 
-static void OpDEM0(void)
+static void OpDEM0()
 {
-   AbsoluteIndexedX(MODIFY, DEC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   DEC16();
 }
 
 /**********************************************************************************************/
 
 /* EOR *************************************************************************************** */
-static void Op49M1(void)
+static void Op49M1()
 {
    ICPU.Registers.AL ^= *CPU.PC++;
 #ifndef SA1_OPCODES
@@ -1137,7 +898,7 @@ static void Op49M1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void Op49M0(void)
+static void Op49M0()
 {
 #ifdef FAST_LSB_WORD_ACCESS
    ICPU.Registers.A.W ^= *(uint16_t*) CPU.PC;
@@ -1151,310 +912,238 @@ static void Op49M0(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void Op45M1(void)
+static void Op45M1()
 {
-   Direct(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   EOR8();
 }
 
-static void Op45M0(void)
+static void Op45M0()
 {
-   Direct(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   EOR16();
 }
 
-static void Op55M1(void)
+static void Op55M1()
 {
-   DirectIndexedX(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   EOR8();
 }
 
-static void Op55M0(void)
+static void Op55M0()
 {
-   DirectIndexedX(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   EOR16();
 }
 
-static void Op52M1(void)
+static void Op52M1()
 {
-   DirectIndirect(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   EOR8();
 }
 
-static void Op52M0(void)
+static void Op52M0()
 {
-   DirectIndirect(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   EOR16();
 }
 
-static void Op41M1(void)
+static void Op41M1()
 {
-   DirectIndexedIndirect(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   EOR8();
 }
 
-static void Op41M0(void)
+static void Op41M0()
 {
-   DirectIndexedIndirect(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   EOR16();
 }
 
-static void Op51M1(void)
+static void Op51M1()
 {
-   DirectIndirectIndexed(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   EOR8();
 }
 
-static void Op51M0(void)
+static void Op51M0()
 {
-   DirectIndirectIndexed(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   EOR16();
 }
 
-static void Op47M1(void)
+static void Op47M1()
 {
-   DirectIndirectLong(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   EOR8();
 }
 
-static void Op47M0(void)
+static void Op47M0()
 {
-   DirectIndirectLong(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   EOR16();
 }
 
-static void Op57M1(void)
+static void Op57M1()
 {
-   DirectIndirectIndexedLong(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   EOR8();
 }
 
-static void Op57M0(void)
+static void Op57M0()
 {
-   DirectIndirectIndexedLong(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   EOR16();
 }
 
-static void Op4DM1(void)
+static void Op4DM1()
 {
-   Absolute(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   EOR8();
 }
 
-static void Op4DM0(void)
+static void Op4DM0()
 {
-   Absolute(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   EOR16();
 }
 
-static void Op5DM1(void)
+static void Op5DM1()
 {
-   AbsoluteIndexedX(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   EOR8();
 }
 
-static void Op5DM0(void)
+static void Op5DM0()
 {
-   AbsoluteIndexedX(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   EOR16();
 }
 
-static void Op59M1(void)
+static void Op59M1()
 {
-   AbsoluteIndexedY(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   EOR8();
 }
 
-static void Op59M0(void)
+static void Op59M0()
 {
-   AbsoluteIndexedY(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   EOR16();
 }
 
-static void Op4FM1(void)
+static void Op4FM1()
 {
-   AbsoluteLong(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   EOR8();
 }
 
-static void Op4FM0(void)
+static void Op4FM0()
 {
-   AbsoluteLong(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   EOR16();
 }
 
-static void Op5FM1(void)
+static void Op5FM1()
 {
-   AbsoluteLongIndexedX(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   EOR8();
 }
 
-static void Op5FM0(void)
+static void Op5FM0()
 {
-   AbsoluteLongIndexedX(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   EOR16();
 }
 
-static void Op43M1(void)
+static void Op43M1()
 {
-   StackRelative(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   EOR8();
 }
 
-static void Op43M0(void)
+static void Op43M0()
 {
-   StackRelative(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   EOR16();
 }
 
-static void Op53M1(void)
+static void Op53M1()
 {
-   StackRelativeIndirectIndexed(READ, EOR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   EOR8();
 }
 
-static void Op53M0(void)
+static void Op53M0()
 {
-   StackRelativeIndirectIndexed(READ, EOR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   EOR16();
 }
 
 /**********************************************************************************************/
 
 /* INC *************************************************************************************** */
-static void Op1AM1(void)
+static void Op1AM1()
 {
    A_INC8();
 }
 
-static void Op1AM0(void)
+static void Op1AM0()
 {
    A_INC16();
 }
 
-static void OpE6M1(void)
+static void OpE6M1()
 {
-   Direct(MODIFY, INC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   INC8();
 }
 
-static void OpE6M0(void)
+static void OpE6M0()
 {
-   Direct(MODIFY, INC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   INC16();
 }
 
-static void OpF6M1(void)
+static void OpF6M1()
 {
-   DirectIndexedX(MODIFY, INC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   INC8();
 }
 
-static void OpF6M0(void)
+static void OpF6M0()
 {
-   DirectIndexedX(MODIFY, INC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   INC16();
 }
 
-static void OpEEM1(void)
+static void OpEEM1()
 {
-   Absolute(MODIFY, INC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   INC8();
 }
 
-static void OpEEM0(void)
+static void OpEEM0()
 {
-   Absolute(MODIFY, INC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   INC16();
 }
 
-static void OpFEM1(void)
+static void OpFEM1()
 {
-   AbsoluteIndexedX(MODIFY, INC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   INC8();
 }
 
-static void OpFEM0(void)
+static void OpFEM0()
 {
-   AbsoluteIndexedX(MODIFY, INC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   INC16();
 }
 
 /**********************************************************************************************/
 /* LDA *************************************************************************************** */
-static void OpA9M1(void)
+static void OpA9M1()
 {
    ICPU.Registers.AL = *CPU.PC++;
 #ifndef SA1_OPCODES
@@ -1463,7 +1152,7 @@ static void OpA9M1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void OpA9M0(void)
+static void OpA9M0()
 {
 #ifdef FAST_LSB_WORD_ACCESS
    ICPU.Registers.A.W = *(uint16_t*) CPU.PC;
@@ -1478,234 +1167,178 @@ static void OpA9M0(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void OpA5M1(void)
+static void OpA5M1()
 {
-   Direct(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   LDA8();
 }
 
-static void OpA5M0(void)
+static void OpA5M0()
 {
-   Direct(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   LDA16();
 }
 
-static void OpB5M1(void)
+static void OpB5M1()
 {
-   DirectIndexedX(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   LDA8();
 }
 
-static void OpB5M0(void)
+static void OpB5M0()
 {
-   DirectIndexedX(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   LDA16();
 }
 
-static void OpB2M1(void)
+static void OpB2M1()
 {
-   DirectIndirect(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   LDA8();
 }
 
-static void OpB2M0(void)
+static void OpB2M0()
 {
-   DirectIndirect(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   LDA16();
 }
 
-static void OpA1M1(void)
+static void OpA1M1()
 {
-   DirectIndexedIndirect(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   LDA8();
 }
 
-static void OpA1M0(void)
+static void OpA1M0()
 {
-   DirectIndexedIndirect(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   LDA16();
 }
 
-static void OpB1M1(void)
+static void OpB1M1()
 {
-   DirectIndirectIndexed(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   LDA8();
 }
 
-static void OpB1M0(void)
+static void OpB1M0()
 {
-   DirectIndirectIndexed(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   LDA16();
 }
 
-static void OpA7M1(void)
+static void OpA7M1()
 {
-   DirectIndirectLong(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   LDA8();
 }
 
-static void OpA7M0(void)
+static void OpA7M0()
 {
-   DirectIndirectLong(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   LDA16();
 }
 
-static void OpB7M1(void)
+static void OpB7M1()
 {
-   DirectIndirectIndexedLong(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   LDA8();
 }
 
-static void OpB7M0(void)
+static void OpB7M0()
 {
-   DirectIndirectIndexedLong(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   LDA16();
 }
 
-static void OpADM1(void)
+static void OpADM1()
 {
-   Absolute(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   LDA8();
 }
 
-static void OpADM0(void)
+static void OpADM0()
 {
-   Absolute(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   LDA16();
 }
 
-static void OpBDM1(void)
+static void OpBDM1()
 {
-   AbsoluteIndexedX(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   LDA8();
 }
 
-static void OpBDM0(void)
+static void OpBDM0()
 {
-   AbsoluteIndexedX(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   LDA16();
 }
 
-static void OpB9M1(void)
+static void OpB9M1()
 {
-   AbsoluteIndexedY(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   LDA8();
 }
 
-static void OpB9M0(void)
+static void OpB9M0()
 {
-   AbsoluteIndexedY(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   LDA16();
 }
 
-static void OpAFM1(void)
+static void OpAFM1()
 {
-   AbsoluteLong(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   LDA8();
 }
 
-static void OpAFM0(void)
+static void OpAFM0()
 {
-   AbsoluteLong(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   LDA16();
 }
 
-static void OpBFM1(void)
+static void OpBFM1()
 {
-   AbsoluteLongIndexedX(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   LDA8();
 }
 
-static void OpBFM0(void)
+static void OpBFM0()
 {
-   AbsoluteLongIndexedX(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   LDA16();
 }
 
-static void OpA3M1(void)
+static void OpA3M1()
 {
-   StackRelative(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   LDA8();
 }
 
-static void OpA3M0(void)
+static void OpA3M0()
 {
-   StackRelative(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   LDA16();
 }
 
-static void OpB3M1(void)
+static void OpB3M1()
 {
-   StackRelativeIndirectIndexed(READ, LDA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   LDA8();
 }
 
-static void OpB3M0(void)
+static void OpB3M0()
 {
-   StackRelativeIndirectIndexed(READ, LDA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   LDA16();
 }
 
 /**********************************************************************************************/
 
 /* LDX *************************************************************************************** */
-static void OpA2X1(void)
+static void OpA2X1()
 {
    ICPU.Registers.XL = *CPU.PC++;
 #ifndef SA1_OPCODES
@@ -1714,7 +1347,7 @@ static void OpA2X1(void)
    SetZN8(ICPU.Registers.XL);
 }
 
-static void OpA2X0(void)
+static void OpA2X0()
 {
 #ifdef FAST_LSB_WORD_ACCESS
    ICPU.Registers.X.W = *(uint16_t*) CPU.PC;
@@ -1728,73 +1361,57 @@ static void OpA2X0(void)
    SetZN16(ICPU.Registers.X.W);
 }
 
-static void OpA6X1(void)
+static void OpA6X1()
 {
-   Direct(READ, LDX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   LDX8();
 }
 
-static void OpA6X0(void)
+static void OpA6X0()
 {
-   Direct(READ, LDX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   LDX16();
 }
 
-static void OpB6X1(void)
+static void OpB6X1()
 {
-   DirectIndexedY(READ, LDX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedY(true);
+   LDX8();
 }
 
-static void OpB6X0(void)
+static void OpB6X0()
 {
-   DirectIndexedY(READ, LDX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedY(true);
+   LDX16();
 }
 
-static void OpAEX1(void)
+static void OpAEX1()
 {
-   Absolute(READ, LDX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   LDX8();
 }
 
-static void OpAEX0(void)
+static void OpAEX0()
 {
-   Absolute(READ, LDX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   LDX16();
 }
 
-static void OpBEX1(void)
+static void OpBEX1()
 {
-   AbsoluteIndexedY(READ, LDX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   LDX8();
 }
 
-static void OpBEX0(void)
+static void OpBEX0()
 {
-   AbsoluteIndexedY(READ, LDX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   LDX16();
 }
 /**********************************************************************************************/
 
 /* LDY *************************************************************************************** */
-static void OpA0X1(void)
+static void OpA0X1()
 {
    ICPU.Registers.YL = *CPU.PC++;
 #ifndef SA1_OPCODES
@@ -1803,7 +1420,7 @@ static void OpA0X1(void)
    SetZN8(ICPU.Registers.YL);
 }
 
-static void OpA0X0(void)
+static void OpA0X0()
 {
 #ifdef FAST_LSB_WORD_ACCESS
    ICPU.Registers.Y.W = *(uint16_t*) CPU.PC;
@@ -1818,150 +1435,118 @@ static void OpA0X0(void)
    SetZN16(ICPU.Registers.Y.W);
 }
 
-static void OpA4X1(void)
+static void OpA4X1()
 {
-   Direct(READ, LDY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   LDY8();
 }
 
-static void OpA4X0(void)
+static void OpA4X0()
 {
-   Direct(READ, LDY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   LDY16();
 }
 
-static void OpB4X1(void)
+static void OpB4X1()
 {
-   DirectIndexedX(READ, LDY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   LDY8();
 }
 
-static void OpB4X0(void)
+static void OpB4X0()
 {
-   DirectIndexedX(READ, LDY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   LDY16();
 }
 
-static void OpACX1(void)
+static void OpACX1()
 {
-   Absolute(READ, LDY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   LDY8();
 }
 
-static void OpACX0(void)
+static void OpACX0()
 {
-   Absolute(READ, LDY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   LDY16();
 }
 
-static void OpBCX1(void)
+static void OpBCX1()
 {
-   AbsoluteIndexedX(READ, LDY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   LDY8();
 }
 
-static void OpBCX0(void)
+static void OpBCX0()
 {
-   AbsoluteIndexedX(READ, LDY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   LDY16();
 }
 /**********************************************************************************************/
 
 /* LSR *************************************************************************************** */
-static void Op4AM1(void)
+static void Op4AM1()
 {
    A_LSR8();
 }
 
-static void Op4AM0(void)
+static void Op4AM0()
 {
    A_LSR16();
 }
 
-static void Op46M1(void)
+static void Op46M1()
 {
-   Direct(MODIFY, LSR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   LSR8();
 }
 
-static void Op46M0(void)
+static void Op46M0()
 {
-   Direct(MODIFY, LSR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   LSR16();
 }
 
-static void Op56M1(void)
+static void Op56M1()
 {
-   DirectIndexedX(MODIFY, LSR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   LSR8();
 }
 
-static void Op56M0(void)
+static void Op56M0()
 {
-   DirectIndexedX(MODIFY, LSR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   LSR16();
 }
 
-static void Op4EM1(void)
+static void Op4EM1()
 {
-   Absolute(MODIFY, LSR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   LSR8();
 }
 
-static void Op4EM0(void)
+static void Op4EM0()
 {
-   Absolute(MODIFY, LSR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   LSR16();
 }
 
-static void Op5EM1(void)
+static void Op5EM1()
 {
-   AbsoluteIndexedX(MODIFY, LSR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   LSR8();
 }
 
-static void Op5EM0(void)
+static void Op5EM0()
 {
-   AbsoluteIndexedX(MODIFY, LSR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   LSR16();
 }
 
 /**********************************************************************************************/
 
 /* ORA *************************************************************************************** */
-static void Op09M1(void)
+static void Op09M1()
 {
    ICPU.Registers.AL |= *CPU.PC++;
 #ifndef SA1_OPCODES
@@ -1970,7 +1555,7 @@ static void Op09M1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void Op09M0(void)
+static void Op09M0()
 {
 #ifdef FAST_LSB_WORD_ACCESS
    ICPU.Registers.A.W |= *(uint16_t*) CPU.PC;
@@ -1984,1086 +1569,832 @@ static void Op09M0(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void Op05M1(void)
+static void Op05M1()
 {
-   Direct(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   ORA8();
 }
 
-static void Op05M0(void)
+static void Op05M0()
 {
-   Direct(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   ORA16();
 }
 
-static void Op15M1(void)
+static void Op15M1()
 {
-   DirectIndexedX(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   ORA8();
 }
 
-static void Op15M0(void)
+static void Op15M0()
 {
-   DirectIndexedX(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   ORA16();
 }
 
-static void Op12M1(void)
+static void Op12M1()
 {
-   DirectIndirect(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   ORA8();
 }
 
-static void Op12M0(void)
+static void Op12M0()
 {
-   DirectIndirect(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   ORA16();
 }
 
-static void Op01M1(void)
+static void Op01M1()
 {
-   DirectIndexedIndirect(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   ORA8();
 }
 
-static void Op01M0(void)
+static void Op01M0()
 {
-   DirectIndexedIndirect(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   ORA16();
 }
 
-static void Op11M1(void)
+static void Op11M1()
 {
-   DirectIndirectIndexed(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   ORA8();
 }
 
-static void Op11M0(void)
+static void Op11M0()
 {
-   DirectIndirectIndexed(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   ORA16();
 }
 
-static void Op07M1(void)
+static void Op07M1()
 {
-   DirectIndirectLong(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   ORA8();
 }
 
-static void Op07M0(void)
+static void Op07M0()
 {
-   DirectIndirectLong(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   ORA16();
 }
 
-static void Op17M1(void)
+static void Op17M1()
 {
-   DirectIndirectIndexedLong(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   ORA8();
 }
 
-static void Op17M0(void)
+static void Op17M0()
 {
-   DirectIndirectIndexedLong(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   ORA16();
 }
 
-static void Op0DM1(void)
+static void Op0DM1()
 {
-   Absolute(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   ORA8();
 }
 
-static void Op0DM0(void)
+static void Op0DM0()
 {
-   Absolute(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   ORA16();
 }
 
-static void Op1DM1(void)
+static void Op1DM1()
 {
-   AbsoluteIndexedX(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   ORA8();
 }
 
-static void Op1DM0(void)
+static void Op1DM0()
 {
-   AbsoluteIndexedX(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   ORA16();
 }
 
-static void Op19M1(void)
+static void Op19M1()
 {
-   AbsoluteIndexedY(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   ORA8();
 }
 
-static void Op19M0(void)
+static void Op19M0()
 {
-   AbsoluteIndexedY(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   ORA16();
 }
 
-static void Op0FM1(void)
+static void Op0FM1()
 {
-   AbsoluteLong(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   ORA8();
 }
 
-static void Op0FM0(void)
+static void Op0FM0()
 {
-   AbsoluteLong(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   ORA16();
 }
 
-static void Op1FM1(void)
+static void Op1FM1()
 {
-   AbsoluteLongIndexedX(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   ORA8();
 }
 
-static void Op1FM0(void)
+static void Op1FM0()
 {
-   AbsoluteLongIndexedX(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   ORA16();
 }
 
-static void Op03M1(void)
+static void Op03M1()
 {
-   StackRelative(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   ORA8();
 }
 
-static void Op03M0(void)
+static void Op03M0()
 {
-   StackRelative(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   ORA16();
 }
 
-static void Op13M1(void)
+static void Op13M1()
 {
-   StackRelativeIndirectIndexed(READ, ORA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   ORA8();
 }
 
-static void Op13M0(void)
+static void Op13M0()
 {
-   StackRelativeIndirectIndexed(READ, ORA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   ORA16();
 }
 
 /**********************************************************************************************/
 
 /* ROL *************************************************************************************** */
-static void Op2AM1(void)
+static void Op2AM1()
 {
    A_ROL8();
 }
 
-static void Op2AM0(void)
+static void Op2AM0()
 {
    A_ROL16();
 }
 
-static void Op26M1(void)
+static void Op26M1()
 {
-   Direct(MODIFY, ROL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   ROL8();
 }
 
-static void Op26M0(void)
+static void Op26M0()
 {
-   Direct(MODIFY, ROL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   ROL16();
 }
 
-static void Op36M1(void)
+static void Op36M1()
 {
-   DirectIndexedX(MODIFY, ROL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   ROL8();
 }
 
-static void Op36M0(void)
+static void Op36M0()
 {
-   DirectIndexedX(MODIFY, ROL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   ROL16();
 }
 
-static void Op2EM1(void)
+static void Op2EM1()
 {
-   Absolute(MODIFY, ROL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   ROL8();
 }
 
-static void Op2EM0(void)
+static void Op2EM0()
 {
-   Absolute(MODIFY, ROL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   ROL16();
 }
 
-static void Op3EM1(void)
+static void Op3EM1()
 {
-   AbsoluteIndexedX(MODIFY, ROL8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   ROL8();
 }
 
-static void Op3EM0(void)
+static void Op3EM0()
 {
-   AbsoluteIndexedX(MODIFY, ROL16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   ROL16();
 }
 /**********************************************************************************************/
 
 /* ROR *************************************************************************************** */
-static void Op6AM1(void)
+static void Op6AM1()
 {
    A_ROR8();
 }
 
-static void Op6AM0(void)
+static void Op6AM0()
 {
    A_ROR16();
 }
 
-static void Op66M1(void)
+static void Op66M1()
 {
-   Direct(MODIFY, ROR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   ROR8();
 }
 
-static void Op66M0(void)
+static void Op66M0()
 {
-   Direct(MODIFY, ROR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   ROR16();
 }
 
-static void Op76M1(void)
+static void Op76M1()
 {
-   DirectIndexedX(MODIFY, ROR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   ROR8();
 }
 
-static void Op76M0(void)
+static void Op76M0()
 {
-   DirectIndexedX(MODIFY, ROR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   DirectIndexedX(false);
+   ROR16();
 }
 
-static void Op6EM1(void)
+static void Op6EM1()
 {
-   Absolute(MODIFY, ROR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   ROR8();
 }
 
-static void Op6EM0(void)
+static void Op6EM0()
 {
-   Absolute(MODIFY, ROR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   ROR16();
 }
 
-static void Op7EM1(void)
+static void Op7EM1()
 {
-   AbsoluteIndexedX(MODIFY, ROR8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   ROR8();
 }
 
-static void Op7EM0(void)
+static void Op7EM0()
 {
-   AbsoluteIndexedX(MODIFY, ROR16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   AbsoluteIndexedX(false);
+   ROR16();
 }
 /**********************************************************************************************/
 
 /* SBC *************************************************************************************** */
-static void OpE9M1(void)
+static void OpE9M1()
 {
-   Immediate8(READ, SBC8);
+   Immediate8();
+   SBC8();
 }
 
-static void OpE9M0(void)
+static void OpE9M0()
 {
-   Immediate16(READ, SBC16);
+   Immediate16();
+   SBC16();
 }
 
-static void OpE5M1(void)
+static void OpE5M1()
 {
-   Direct(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   SBC8();
 }
 
-static void OpE5M0(void)
+static void OpE5M0()
 {
-   Direct(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(true);
+   SBC16();
 }
 
-static void OpF5M1(void)
+static void OpF5M1()
 {
-   DirectIndexedX(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   SBC8();
 }
 
-static void OpF5M0(void)
+static void OpF5M0()
 {
-   DirectIndexedX(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(true);
+   SBC16();
 }
 
-static void OpF2M1(void)
+static void OpF2M1()
 {
-   DirectIndirect(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   SBC8();
 }
 
-static void OpF2M0(void)
+static void OpF2M0()
 {
-   DirectIndirect(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(true);
+   SBC16();
 }
 
-static void OpE1M1(void)
+static void OpE1M1()
 {
-   DirectIndexedIndirect(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   SBC8();
 }
 
-static void OpE1M0(void)
+static void OpE1M0()
 {
-   DirectIndexedIndirect(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(true);
+   SBC16();
 }
 
-static void OpF1M1(void)
+static void OpF1M1()
 {
-   DirectIndirectIndexed(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   SBC8();
 }
 
-static void OpF1M0(void)
+static void OpF1M0()
 {
-   DirectIndirectIndexed(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(true);
+   SBC16();
 }
 
-static void OpE7M1(void)
+static void OpE7M1()
 {
-   DirectIndirectLong(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   SBC8();
 }
 
-static void OpE7M0(void)
+static void OpE7M0()
 {
-   DirectIndirectLong(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(true);
+   SBC16();
 }
 
-static void OpF7M1(void)
+static void OpF7M1()
 {
-   DirectIndirectIndexedLong(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   SBC8();
 }
 
-static void OpF7M0(void)
+static void OpF7M0()
 {
-   DirectIndirectIndexedLong(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(true);
+   SBC16();
 }
 
-static void OpEDM1(void)
+static void OpEDM1()
 {
-   Absolute(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   SBC8();
 }
 
-static void OpEDM0(void)
+static void OpEDM0()
 {
-   Absolute(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(true);
+   SBC16();
 }
 
-static void OpFDM1(void)
+static void OpFDM1()
 {
-   AbsoluteIndexedX(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   SBC8();
 }
 
-static void OpFDM0(void)
+static void OpFDM0()
 {
-   AbsoluteIndexedX(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(true);
+   SBC16();
 }
 
-static void OpF9M1(void)
+static void OpF9M1()
 {
-   AbsoluteIndexedY(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   SBC8();
 }
 
-static void OpF9M0(void)
+static void OpF9M0()
 {
-   AbsoluteIndexedY(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(true);
+   SBC16();
 }
 
-static void OpEFM1(void)
+static void OpEFM1()
 {
-   AbsoluteLong(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   SBC8();
 }
 
-static void OpEFM0(void)
+static void OpEFM0()
 {
-   AbsoluteLong(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(true);
+   SBC16();
 }
 
-static void OpFFM1(void)
+static void OpFFM1()
 {
-   AbsoluteLongIndexedX(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   SBC8();
 }
 
-static void OpFFM0(void)
+static void OpFFM0()
 {
-   AbsoluteLongIndexedX(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(true);
+   SBC16();
 }
 
-static void OpE3M1(void)
+static void OpE3M1()
 {
-   StackRelative(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   SBC8();
 }
 
-static void OpE3M0(void)
+static void OpE3M0()
 {
-   StackRelative(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(true);
+   SBC16();
 }
 
-static void OpF3M1(void)
+static void OpF3M1()
 {
-   StackRelativeIndirectIndexed(READ, SBC8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   SBC8();
 }
 
-static void OpF3M0(void)
+static void OpF3M0()
 {
-   StackRelativeIndirectIndexed(READ, SBC16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(true);
+   SBC16();
 }
 /**********************************************************************************************/
 
 /* STA *************************************************************************************** */
-static void Op85M1(void)
+static void Op85M1()
 {
-   Direct(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STA8();
 }
 
-static void Op85M0(void)
+static void Op85M0()
 {
-   Direct(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STA16();
 }
 
-static void Op95M1(void)
+static void Op95M1()
 {
-   DirectIndexedX(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(false);
+   STA8();
 }
 
-static void Op95M0(void)
+static void Op95M0()
 {
-   DirectIndexedX(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(false);
+   STA16();
 }
 
-static void Op92M1(void)
+static void Op92M1()
 {
-   DirectIndirect(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(false);
+   STA8();
 }
 
-static void Op92M0(void)
+static void Op92M0()
 {
-   DirectIndirect(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(false);
+   STA16();
 }
 
-static void Op81M1(void)
+static void Op81M1()
 {
-   DirectIndexedIndirect(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(false);
+   STA8();
 #ifdef noVAR_CYCLES
    if (CheckIndex())
       CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
-static void Op81M0(void)
+static void Op81M0()
 {
-   DirectIndexedIndirect(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndexedIndirect(false);
+   STA16();
 #ifdef noVAR_CYCLES
    if (CheckIndex())
       CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
-static void Op91M1(void)
+static void Op91M1()
 {
-   DirectIndirectIndexed(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(false);
+   STA8();
 }
 
-static void Op91M0(void)
+static void Op91M0()
 {
-   DirectIndirectIndexed(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexed(false);
+   STA16();
 }
 
-static void Op87M1(void)
+static void Op87M1()
 {
-   DirectIndirectLong(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(false);
+   STA8();
 }
 
-static void Op87M0(void)
+static void Op87M0()
 {
-   DirectIndirectLong(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectLong(false);
+   STA16();
 }
 
-static void Op97M1(void)
+static void Op97M1()
 {
-   DirectIndirectIndexedLong(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(false);
+   STA8();
 }
 
-static void Op97M0(void)
+static void Op97M0()
 {
-   DirectIndirectIndexedLong(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirectIndexedLong(false);
+   STA16();
 }
 
-static void Op8DM1(void)
+static void Op8DM1()
 {
-   Absolute(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STA8();
 }
 
-static void Op8DM0(void)
+static void Op8DM0()
 {
-   Absolute(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STA16();
 }
 
-static void Op9DM1(void)
+static void Op9DM1()
 {
-   AbsoluteIndexedX(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(false);
+   STA8();
 }
 
-static void Op9DM0(void)
+static void Op9DM0()
 {
-   AbsoluteIndexedX(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(false);
+   STA16();
 }
 
-static void Op99M1(void)
+static void Op99M1()
 {
-   AbsoluteIndexedY(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(false);
+   STA8();
 }
 
-static void Op99M0(void)
+static void Op99M0()
 {
-   AbsoluteIndexedY(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedY(false);
+   STA16();
 }
 
-static void Op8FM1(void)
+static void Op8FM1()
 {
-   AbsoluteLong(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(false);
+   STA8();
 }
 
-static void Op8FM0(void)
+static void Op8FM0()
 {
-   AbsoluteLong(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(false);
+   STA16();
 }
 
-static void Op9FM1(void)
+static void Op9FM1()
 {
-   AbsoluteLongIndexedX(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(false);
+   STA8();
 }
 
-static void Op9FM0(void)
+static void Op9FM0()
 {
-   AbsoluteLongIndexedX(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLongIndexedX(false);
+   STA16();
 }
 
-static void Op83M1(void)
+static void Op83M1()
 {
-   StackRelative(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(false);
+   STA8();
 }
 
-static void Op83M0(void)
+static void Op83M0()
 {
-   StackRelative(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   StackRelative(false);
+   STA16();
 }
 
-static void Op93M1(void)
+static void Op93M1()
 {
-   StackRelativeIndirectIndexed(WRITE, STA8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(false);
+   STA8();
 }
 
-static void Op93M0(void)
+static void Op93M0()
 {
-   StackRelativeIndirectIndexed(WRITE, STA16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
-#endif
+   StackRelativeIndirectIndexed(false);
+   STA16();
 }
 /**********************************************************************************************/
 
 /* STX *************************************************************************************** */
-static void Op86X1(void)
+static void Op86X1()
 {
-   Direct(WRITE, STX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STX8();
 }
 
-static void Op86X0(void)
+static void Op86X0()
 {
-   Direct(WRITE, STX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STX16();
 }
 
-static void Op96X1(void)
+static void Op96X1()
 {
-   DirectIndexedY(WRITE, STX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedY(false);
+   STX8();
 }
 
-static void Op96X0(void)
+static void Op96X0()
 {
-   DirectIndexedY(WRITE, STX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedY(false);
+   STX16();
 }
 
-static void Op8EX1(void)
+static void Op8EX1()
 {
-   Absolute(WRITE, STX8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STX8();
 }
 
-static void Op8EX0(void)
+static void Op8EX0()
 {
-   Absolute(WRITE, STX16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STX16();
 }
 /**********************************************************************************************/
 
 /* STY *************************************************************************************** */
-static void Op84X1(void)
+static void Op84X1()
 {
-   Direct(WRITE, STY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STY8();
 }
 
-static void Op84X0(void)
+static void Op84X0()
 {
-   Direct(WRITE, STY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STY16();
 }
 
-static void Op94X1(void)
+static void Op94X1()
 {
-   DirectIndexedX(WRITE, STY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(false);
+   STY8();
 }
 
-static void Op94X0(void)
+static void Op94X0()
 {
-   DirectIndexedX(WRITE, STY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(false);
+   STY16();
 }
 
-static void Op8CX1(void)
+static void Op8CX1()
 {
-   Absolute(WRITE, STY8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STY8();
 }
 
-static void Op8CX0(void)
+static void Op8CX0()
 {
-   Absolute(WRITE, STY16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STY16();
 }
 /**********************************************************************************************/
 
 /* STZ *************************************************************************************** */
-static void Op64M1(void)
+static void Op64M1()
 {
-   Direct(WRITE, STZ8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STZ8();
 }
 
-static void Op64M0(void)
+static void Op64M0()
 {
-   Direct(WRITE, STZ16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   Direct(false);
+   STZ16();
 }
 
-static void Op74M1(void)
+static void Op74M1()
 {
-   DirectIndexedX(WRITE, STZ8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(false);
+   STZ8();
 }
 
-static void Op74M0(void)
+static void Op74M0()
 {
-   DirectIndexedX(WRITE, STZ16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-#endif
+   DirectIndexedX(false);
+   STZ16();
 }
 
-static void Op9CM1(void)
+static void Op9CM1()
 {
-   Absolute(WRITE, STZ8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STZ8();
 }
 
-static void Op9CM0(void)
+static void Op9CM0()
 {
-   Absolute(WRITE, STZ16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
+   STZ16();
 }
 
-static void Op9EM1(void)
+static void Op9EM1()
 {
-   AbsoluteIndexedX(WRITE, STZ8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(false);
+   STZ8();
 }
 
-static void Op9EM0(void)
+static void Op9EM0()
 {
-   AbsoluteIndexedX(WRITE, STZ16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndexedX(false);
+   STZ16();
 }
 
 /**********************************************************************************************/
 
 /* TRB *************************************************************************************** */
-static void Op14M1(void)
+static void Op14M1()
 {
-   Direct(MODIFY, TRB8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   TRB8();
 }
 
-static void Op14M0(void)
+static void Op14M0()
 {
-   Direct(MODIFY, TRB16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   TRB16();
 }
 
-static void Op1CM1(void)
+static void Op1CM1()
 {
-   Absolute(MODIFY, TRB8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   TRB8();
 }
 
-static void Op1CM0(void)
+static void Op1CM0()
 {
-   Absolute(MODIFY, TRB16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   TRB16();
 }
 /**********************************************************************************************/
 
 /* TSB *************************************************************************************** */
-static void Op04M1(void)
+static void Op04M1()
 {
-   Direct(MODIFY, TSB8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   TSB8();
 }
 
-static void Op04M0(void)
+static void Op04M0()
 {
-   Direct(MODIFY, TSB16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Direct(false);
+   TSB16();
 }
 
-static void Op0CM1(void)
+static void Op0CM1()
 {
-   Absolute(MODIFY, TSB8);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   TSB8();
 }
 
-static void Op0CM0(void)
+static void Op0CM0()
 {
-   Absolute(MODIFY, TSB16);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 /* memory */ + ONE_CYCLE /* opcode */;
-#endif
+   Absolute(false);
+   TSB16();
 }
 
 /**********************************************************************************************/
@@ -3071,28 +2402,28 @@ static void Op0CM0(void)
 /* Branch Instructions *********************************************************************** */
 #ifndef SA1_OPCODES
 #define BranchCheck0()\
-    if( CPU.BranchSkip)\
-    {\
-   CPU.BranchSkip = false;\
-   if (!Settings.SoundSkipMethod)\
-       if( CPU.PC - CPU.PCBase > OpAddress)\
-           return;\
-    }
+   if(CPU.BranchSkip)\
+   {\
+      CPU.BranchSkip = false;\
+      if (!Settings.SoundSkipMethod)\
+         if (CPU.PC - CPU.PCBase > OpAddress)\
+            return;\
+   }
 
 #define BranchCheck1()\
-   if( CPU.BranchSkip)\
+   if(CPU.BranchSkip)\
    {\
       CPU.BranchSkip = false;\
-      if (!Settings.SoundSkipMethod) {\
+      if (!Settings.SoundSkipMethod)\
+      {\
          if( CPU.PC - CPU.PCBase > OpAddress)\
-         return;\
+            return;\
       }\
-      else \
-         if (Settings.SoundSkipMethod == 1)\
+      else if (Settings.SoundSkipMethod == 1)\
          return;\
       if (Settings.SoundSkipMethod == 3)\
       {\
-         if( CPU.PC - CPU.PCBase > OpAddress)\
+         if (CPU.PC - CPU.PCBase > OpAddress)\
             return;\
          else\
             CPU.PC = CPU.PCBase + OpAddress;\
@@ -3100,22 +2431,22 @@ static void Op0CM0(void)
    }
 
 #define BranchCheck2()\
-   if( CPU.BranchSkip)\
+   if(CPU.BranchSkip)\
    {\
       CPU.BranchSkip = false;\
-      if (!Settings.SoundSkipMethod) {\
-          if( CPU.PC - CPU.PCBase > OpAddress)\
-              return;\
+      if (!Settings.SoundSkipMethod)\
+      {\
+         if( CPU.PC - CPU.PCBase > OpAddress)\
+            return;\
       }\
-      else \
-         if (Settings.SoundSkipMethod == 1)\
-             CPU.PC = CPU.PCBase + OpAddress;\
+      else if (Settings.SoundSkipMethod == 1)\
+         CPU.PC = CPU.PCBase + OpAddress;\
       if (Settings.SoundSkipMethod == 3)\
       {\
-          if (CPU.PC - CPU.PCBase > OpAddress)\
-              return;\
-          else\
-         CPU.PC = CPU.PCBase + OpAddress;\
+         if (CPU.PC - CPU.PCBase > OpAddress)\
+            return;\
+         else\
+            CPU.PC = CPU.PCBase + OpAddress;\
       }\
    }
 #else
@@ -3135,8 +2466,7 @@ static inline void CPUShutdown()
       // the delay could allow the shutdown code to cycle skip again.
       // Was causing screen flashing on Top Gear 3000.
 
-      if (CPU.WaitCounter == 0 &&
-            !(CPU.Flags & (IRQ_PENDING_FLAG | NMI_FLAG)))
+      if (CPU.WaitCounter == 0 && !(CPU.Flags & (IRQ_PENDING_FLAG | NMI_FLAG)))
       {
          CPU.WaitAddress = NULL;
 #ifndef USE_BLARGG_APU
@@ -3182,7 +2512,7 @@ static inline void CPUShutdown()
 static inline void ForceShutdown()
 {
 #ifdef CPU_SHUTDOWN
-#ifndef SA1_OPCODES
+#ifdef VAR_CYCLES
    CPU.WaitAddress = NULL;
 #ifndef USE_BLARGG_APU
    CPU.Cycles = CPU.NextEvent;
@@ -3192,7 +2522,8 @@ static inline void ForceShutdown()
       do
       {
          APU_EXECUTE1();
-      } while (APU.Cycles < CPU.NextEvent);
+      }
+      while (APU.Cycles < CPU.NextEvent);
       ICPU.CPUExecuting = true;
    }
 #endif
@@ -3204,173 +2535,140 @@ static inline void ForceShutdown()
 }
 
 /* BCC */
-static void Op90(void)
+static void Op90()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck0();
    if (!CheckCarry())
    {
       CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 
 /* BCS */
-static void OpB0(void)
+static void OpB0()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck0();
    if (CheckCarry())
    {
       CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 
 /* BEQ */
-static void OpF0(void)
+static void OpF0()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck2();
    if (CheckZero())
    {
       CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 
 /* BMI */
-static void Op30(void)
+static void Op30()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck1();
    if (CheckNegative())
    {
       CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 
 /* BNE */
-static void OpD0(void)
+static void OpD0()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck1();
    if (!CheckZero())
    {
       CPU.PC = CPU.PCBase + OpAddress;
-
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 
 /* BPL */
-static void Op10(void)
+static void Op10()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck1();
    if (!CheckNegative())
    {
       CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 
 /* BRA */
-static void Op80(void)
+static void Op80()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+   CPU.Cycles += ONE_CYCLE;
 #endif
    CPUShutdown();
 }
 
 /* BVC */
-static void Op50(void)
+static void Op50()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck0();
    if (!CheckOverflow())
    {
       CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 
 /* BVS */
-static void Op70(void)
+static void Op70()
 {
-   Relative(JUMP, OpAddressPassthrough);
+   Relative();
    BranchCheck0();
    if (CheckOverflow())
    {
       CPU.PC = CPU.PCBase + OpAddress;
 #ifndef SA1_OPCODES
-      CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
+      CPU.Cycles += ONE_CYCLE;
 #endif
       CPUShutdown();
    }
-#ifndef SA1_OPCODES
-   else
-      CPU.Cycles += CPU.MemSpeed;
-#endif
 }
 /**********************************************************************************************/
 
 /* ClearFlag Instructions ******************************************************************** */
 /* CLC */
-static void Op18(void)
+static void Op18()
 {
    ClearCarry();
 #ifndef SA1_OPCODES
@@ -3379,7 +2677,7 @@ static void Op18(void)
 }
 
 /* CLD */
-static void OpD8(void)
+static void OpD8()
 {
    ClearDecimal();
 #ifndef SA1_OPCODES
@@ -3388,7 +2686,7 @@ static void OpD8(void)
 }
 
 /* CLI */
-static void Op58(void)
+static void Op58()
 {
    ClearIRQ();
 #ifndef SA1_OPCODES
@@ -3398,7 +2696,7 @@ static void Op58(void)
 }
 
 /* CLV */
-static void OpB8(void)
+static void OpB8()
 {
    ClearOverflow();
 #ifndef SA1_OPCODES
@@ -3408,7 +2706,7 @@ static void OpB8(void)
 /**********************************************************************************************/
 
 /* DEX/DEY *********************************************************************************** */
-static void OpCAX1(void)
+static void OpCAX1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3416,12 +2714,11 @@ static void OpCAX1(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.XL--;
    SetZN8(ICPU.Registers.XL);
 }
 
-static void OpCAX0(void)
+static void OpCAX0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3429,12 +2726,11 @@ static void OpCAX0(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.X.W--;
    SetZN16(ICPU.Registers.X.W);
 }
 
-static void Op88X1(void)
+static void Op88X1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3442,12 +2738,11 @@ static void Op88X1(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.YL--;
    SetZN8(ICPU.Registers.YL);
 }
 
-static void Op88X0(void)
+static void Op88X0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3455,14 +2750,13 @@ static void Op88X0(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.Y.W--;
    SetZN16(ICPU.Registers.Y.W);
 }
 /**********************************************************************************************/
 
 /* INX/INY *********************************************************************************** */
-static void OpE8X1(void)
+static void OpE8X1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3470,12 +2764,11 @@ static void OpE8X1(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.XL++;
    SetZN8(ICPU.Registers.XL);
 }
 
-static void OpE8X0(void)
+static void OpE8X0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3483,12 +2776,11 @@ static void OpE8X0(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.X.W++;
    SetZN16(ICPU.Registers.X.W);
 }
 
-static void OpC8X1(void)
+static void OpC8X1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3496,12 +2788,11 @@ static void OpC8X1(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.YL++;
    SetZN8(ICPU.Registers.YL);
 }
 
-static void OpC8X0(void)
+static void OpC8X0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3509,7 +2800,6 @@ static void OpC8X0(void)
 #ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
 #endif
-
    ICPU.Registers.Y.W++;
    SetZN16(ICPU.Registers.Y.W);
 }
@@ -3517,7 +2807,7 @@ static void OpC8X0(void)
 /**********************************************************************************************/
 
 /* NOP *************************************************************************************** */
-static void OpEA(void)
+static void OpEA()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3526,85 +2816,63 @@ static void OpEA(void)
 /**********************************************************************************************/
 
 /* PUSH Instructions ************************************************************************* */
-
 #define PushB(b)\
-    S9xSetByte (b, ICPU.Registers.S.W--);
+   S9xSetByte(b, ICPU.Registers.S.W--);
 
 #define PushBE(b)\
-   S9xSetByte (b, ICPU.Registers.S.W--);\
-   ICPU.Registers.SH=0x01;
-
+   PushB(b);\
+   ICPU.Registers.SH = 0x01;
 
-#define PushW(w) \
-    S9xSetByte ((w)>>8, ICPU.Registers.S.W);\
-   S9xSetByte ((w)&0xff, (ICPU.Registers.S.W - 1)&0xFFFF);\
-    ICPU.Registers.S.W -= 2;
+#define PushW(w)\
+   S9xSetByte((w) >> 8, ICPU.Registers.S.W);\
+   S9xSetByte((w) & 0xff, (ICPU.Registers.S.W - 1) & 0xffff);\
+   ICPU.Registers.S.W -= 2;
 
-#define PushWE(w) \
-    S9xSetByte ((w)>>8, ICPU.Registers.S.W--);\
-    S9xSetByte ((w)&0xff, (ICPU.Registers.S.W--)&0xFFFF);\
-    ICPU.Registers.SH = 0x01;
+#define PushWE(w)\
+   PushW(w); \
+   ICPU.Registers.SH = 0x01;
 
 //PEA NL
-static void OpF4E1(void)
+static void OpF4E1()
 {
-   Absolute(NONE, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
    PushWE((uint16_t)OpAddress);
 }
 
-static void OpF4(void)
+static void OpF4()
 {
-   Absolute(NONE, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
    PushW((uint16_t)OpAddress);
 }
 
 //PEI NL
-static void OpD4E1(void)
+static void OpD4E1()
 {
-   DirectIndirect(NONE, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(false);
    PushWE((uint16_t)OpAddress);
 }
 
-static void OpD4(void)
+static void OpD4()
 {
-   DirectIndirect(NONE, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeed;
-#endif
+   DirectIndirect(false);
    PushW((uint16_t)OpAddress);
 }
 
 //PER NL
-static void Op62E1(void)
+static void Op62E1()
 {
-   RelativeLong(NONE, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
-#endif
+   RelativeLong(false);
    PushWE((uint16_t)OpAddress);
 }
 
-static void Op62(void)
+static void Op62()
 {
-   RelativeLong(NONE, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
-#endif
+   RelativeLong(false);
    PushW((uint16_t)OpAddress);
 }
 
-
 //PHA
-static void Op48E1(void)
+static void Op48E1()
 {
    PushBE(ICPU.Registers.AL);
 #ifndef SA1_OPCODES
@@ -3612,7 +2880,7 @@ static void Op48E1(void)
 #endif
 }
 
-static void Op48M1(void)
+static void Op48M1()
 {
    PushB(ICPU.Registers.AL);
 #ifndef SA1_OPCODES
@@ -3620,7 +2888,7 @@ static void Op48M1(void)
 #endif
 }
 
-static void Op48M0(void)
+static void Op48M0()
 {
    PushW(ICPU.Registers.A.W);
 #ifndef SA1_OPCODES
@@ -3629,14 +2897,15 @@ static void Op48M0(void)
 }
 
 //PHB
-static void Op8BE1(void)
+static void Op8BE1()
 {
    PushBE(ICPU.Registers.DB);
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
 #endif
 }
-static void Op8B(void)
+
+static void Op8B()
 {
    PushB(ICPU.Registers.DB);
 #ifndef SA1_OPCODES
@@ -3645,7 +2914,7 @@ static void Op8B(void)
 }
 
 //PHD NL
-static void Op0BE1(void)
+static void Op0BE1()
 {
    PushWE(ICPU.Registers.D.W);
 #ifndef SA1_OPCODES
@@ -3653,7 +2922,7 @@ static void Op0BE1(void)
 #endif
 }
 
-static void Op0B(void)
+static void Op0B()
 {
    PushW(ICPU.Registers.D.W);
 #ifndef SA1_OPCODES
@@ -3662,7 +2931,7 @@ static void Op0B(void)
 }
 
 //PHK
-static void Op4BE1(void)
+static void Op4BE1()
 {
    PushBE(ICPU.Registers.PB);
 #ifndef SA1_OPCODES
@@ -3670,7 +2939,7 @@ static void Op4BE1(void)
 #endif
 }
 
-static void Op4B(void)
+static void Op4B()
 {
    PushB(ICPU.Registers.PB);
 #ifndef SA1_OPCODES
@@ -3679,7 +2948,7 @@ static void Op4B(void)
 }
 
 //PHP
-static void Op08E1(void)
+static void Op08E1()
 {
    S9xPackStatus();
    PushBE(ICPU.Registers.PL);
@@ -3688,7 +2957,7 @@ static void Op08E1(void)
 #endif
 }
 
-static void Op08(void)
+static void Op08()
 {
    S9xPackStatus();
    PushB(ICPU.Registers.PL);
@@ -3698,7 +2967,7 @@ static void Op08(void)
 }
 
 //PHX
-static void OpDAE1(void)
+static void OpDAE1()
 {
    PushBE(ICPU.Registers.XL);
 #ifndef SA1_OPCODES
@@ -3706,7 +2975,7 @@ static void OpDAE1(void)
 #endif
 }
 
-static void OpDAX1(void)
+static void OpDAX1()
 {
    PushB(ICPU.Registers.XL);
 #ifndef SA1_OPCODES
@@ -3714,7 +2983,7 @@ static void OpDAX1(void)
 #endif
 }
 
-static void OpDAX0(void)
+static void OpDAX0()
 {
    PushW(ICPU.Registers.X.W);
 #ifndef SA1_OPCODES
@@ -3723,7 +2992,7 @@ static void OpDAX0(void)
 }
 
 //PHY
-static void Op5AE1(void)
+static void Op5AE1()
 {
    PushBE(ICPU.Registers.YL);
 #ifndef SA1_OPCODES
@@ -3731,7 +3000,7 @@ static void Op5AE1(void)
 #endif
 }
 
-static void Op5AX1(void)
+static void Op5AX1()
 {
    PushB(ICPU.Registers.YL);
 #ifndef SA1_OPCODES
@@ -3739,7 +3008,7 @@ static void Op5AX1(void)
 #endif
 }
 
-static void Op5AX0(void)
+static void Op5AX0()
 {
    PushW(ICPU.Registers.Y.W);
 #ifndef SA1_OPCODES
@@ -3749,24 +3018,23 @@ static void Op5AX0(void)
 /**********************************************************************************************/
 
 /* PULL Instructions ************************************************************************* */
-#define PullW(w) \
-   w = S9xGetByte (++ICPU.Registers.S.W); \
-   w |= (S9xGetByte (++ICPU.Registers.S.W)<<8);
-
 #define PullB(b)\
    b = S9xGetByte (++ICPU.Registers.S.W);
 
 #define PullBE(b)\
-   ICPU.Registers.S.W++;\
-   ICPU.Registers.SH=0x01;\
-   b = S9xGetByte (ICPU.Registers.S.W);
+   PullB(b);\
+   ICPU.Registers.SH = 0x01;
+
+#define PullW(w)\
+   w = S9xGetByte(++ICPU.Registers.S.W);\
+   w |= (S9xGetByte(++ICPU.Registers.S.W) << 8);
 
-#define PullWE(w) \
+#define PullWE(w)\
    PullW(w);\
-   ICPU.Registers.SH=0x01;
+   ICPU.Registers.SH = 0x01;
 
 //PLA
-static void Op68E1(void)
+static void Op68E1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3775,7 +3043,7 @@ static void Op68E1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void Op68M1(void)
+static void Op68M1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3784,7 +3052,7 @@ static void Op68M1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void Op68M0(void)
+static void Op68M0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3794,7 +3062,7 @@ static void Op68M0(void)
 }
 
 //PLB
-static void OpABE1(void)
+static void OpABE1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3804,7 +3072,7 @@ static void OpABE1(void)
    ICPU.ShiftedDB = ICPU.Registers.DB << 16;
 }
 
-static void OpAB(void)
+static void OpAB()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3816,7 +3084,7 @@ static void OpAB(void)
 
 /* PHP */
 //PLD NL
-static void Op2BE1(void)
+static void Op2BE1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3825,7 +3093,7 @@ static void Op2BE1(void)
    SetZN16(ICPU.Registers.D.W);
 }
 
-static void Op2B(void)
+static void Op2B()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3835,7 +3103,7 @@ static void Op2B(void)
 }
 
 /* PLP */
-static void Op28E1(void)
+static void Op28E1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3851,7 +3119,7 @@ static void Op28E1(void)
    S9xFixCycles();
 }
 
-static void Op28(void)
+static void Op28()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3868,7 +3136,7 @@ static void Op28(void)
 }
 
 //PLX
-static void OpFAE1(void)
+static void OpFAE1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3877,7 +3145,7 @@ static void OpFAE1(void)
    SetZN8(ICPU.Registers.XL);
 }
 
-static void OpFAX1(void)
+static void OpFAX1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3886,7 +3154,7 @@ static void OpFAX1(void)
    SetZN8(ICPU.Registers.XL);
 }
 
-static void OpFAX0(void)
+static void OpFAX0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3896,7 +3164,7 @@ static void OpFAX0(void)
 }
 
 //PLY
-static void Op7AE1(void)
+static void Op7AE1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3905,7 +3173,7 @@ static void Op7AE1(void)
    SetZN8(ICPU.Registers.YL);
 }
 
-static void Op7AX1(void)
+static void Op7AX1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3914,7 +3182,7 @@ static void Op7AX1(void)
    SetZN8(ICPU.Registers.YL);
 }
 
-static void Op7AX0(void)
+static void Op7AX0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -3927,7 +3195,7 @@ static void Op7AX0(void)
 
 /* SetFlag Instructions ********************************************************************** */
 /* SEC */
-static void Op38(void)
+static void Op38()
 {
    SetCarry();
 #ifndef SA1_OPCODES
@@ -3936,7 +3204,7 @@ static void Op38(void)
 }
 
 /* SED */
-static void OpF8(void)
+static void OpF8()
 {
    SetDecimal();
 #ifndef SA1_OPCODES
@@ -3946,7 +3214,7 @@ static void OpF8(void)
 }
 
 /* SEI */
-static void Op78(void)
+static void Op78()
 {
    SetIRQ();
 #ifndef SA1_OPCODES
@@ -3957,7 +3225,7 @@ static void Op78(void)
 
 /* Transfer Instructions ********************************************************************* */
 /* TAX8 */
-static void OpAAX1(void)
+static void OpAAX1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3967,7 +3235,7 @@ static void OpAAX1(void)
 }
 
 /* TAX16 */
-static void OpAAX0(void)
+static void OpAAX0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3977,7 +3245,7 @@ static void OpAAX0(void)
 }
 
 /* TAY8 */
-static void OpA8X1(void)
+static void OpA8X1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3987,7 +3255,7 @@ static void OpA8X1(void)
 }
 
 /* TAY16 */
-static void OpA8X0(void)
+static void OpA8X0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -3996,7 +3264,7 @@ static void OpA8X0(void)
    SetZN16(ICPU.Registers.Y.W);
 }
 
-static void Op5B(void)
+static void Op5B()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4005,7 +3273,7 @@ static void Op5B(void)
    SetZN16(ICPU.Registers.D.W);
 }
 
-static void Op1B(void)
+static void Op1B()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4015,7 +3283,7 @@ static void Op1B(void)
       ICPU.Registers.SH = 1;
 }
 
-static void Op7B(void)
+static void Op7B()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4024,7 +3292,7 @@ static void Op7B(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void Op3B(void)
+static void Op3B()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4033,7 +3301,7 @@ static void Op3B(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void OpBAX1(void)
+static void OpBAX1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4042,7 +3310,7 @@ static void OpBAX1(void)
    SetZN8(ICPU.Registers.XL);
 }
 
-static void OpBAX0(void)
+static void OpBAX0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4051,7 +3319,7 @@ static void OpBAX0(void)
    SetZN16(ICPU.Registers.X.W);
 }
 
-static void Op8AM1(void)
+static void Op8AM1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4060,7 +3328,7 @@ static void Op8AM1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void Op8AM0(void)
+static void Op8AM0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4069,7 +3337,7 @@ static void Op8AM0(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void Op9A(void)
+static void Op9A()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4079,7 +3347,7 @@ static void Op9A(void)
       ICPU.Registers.SH = 1;
 }
 
-static void Op9BX1(void)
+static void Op9BX1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4088,7 +3356,7 @@ static void Op9BX1(void)
    SetZN8(ICPU.Registers.YL);
 }
 
-static void Op9BX0(void)
+static void Op9BX0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4097,7 +3365,7 @@ static void Op9BX0(void)
    SetZN16(ICPU.Registers.Y.W);
 }
 
-static void Op98M1(void)
+static void Op98M1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4106,7 +3374,7 @@ static void Op98M1(void)
    SetZN8(ICPU.Registers.AL);
 }
 
-static void Op98M0(void)
+static void Op98M0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4115,7 +3383,7 @@ static void Op98M0(void)
    SetZN16(ICPU.Registers.A.W);
 }
 
-static void OpBBX1(void)
+static void OpBBX1()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4124,7 +3392,7 @@ static void OpBBX1(void)
    SetZN8(ICPU.Registers.XL);
 }
 
-static void OpBBX0(void)
+static void OpBBX0()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
@@ -4136,12 +3404,11 @@ static void OpBBX0(void)
 /**********************************************************************************************/
 
 /* XCE *************************************************************************************** */
-static void OpFB(void)
+static void OpFB()
 {
 #ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
 #endif
-
    uint8_t A1 = ICPU._Carry;
    uint8_t A2 = ICPU.Registers.PH;
    ICPU._Carry = A2 & 1;
@@ -4163,12 +3430,11 @@ static void OpFB(void)
 /**********************************************************************************************/
 
 /* BRK *************************************************************************************** */
-static void Op00(void)
+static void Op00()
 {
 #ifndef SA1_OPCODES
    CPU.BRKTriggered = true;
 #endif
-
    if (!CheckEmulation())
    {
       PushB(ICPU.Registers.PB);
@@ -4206,18 +3472,15 @@ static void Op00(void)
 /**********************************************************************************************/
 
 /* BRL ************************************************************************************** */
-static void Op82(void)
+static void Op82()
 {
-   RelativeLong(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
-#endif
+   RelativeLong();
    S9xSetPCBase(ICPU.ShiftedPB + OpAddress);
 }
 /**********************************************************************************************/
 
 /* IRQ *************************************************************************************** */
-void S9xOpcode_IRQ(void)
+void S9xOpcode_IRQ()
 {
    if (!CheckEmulation())
    {
@@ -4240,6 +3503,8 @@ void S9xOpcode_IRQ(void)
                       (Memory.FillRAM [0x220f] << 8));
       else
          S9xSetPCBase(S9xGetWord(0xFFEE));
+#endif
+#ifndef SA1_OPCODES
       CPU.Cycles += TWO_CYCLES;
 #endif
    }
@@ -4263,6 +3528,8 @@ void S9xOpcode_IRQ(void)
                       (Memory.FillRAM [0x220f] << 8));
       else
          S9xSetPCBase(S9xGetWord(0xFFFE));
+#endif
+#ifndef SA1_OPCODES
       CPU.Cycles += ONE_CYCLE;
 #endif
    }
@@ -4271,7 +3538,7 @@ void S9xOpcode_IRQ(void)
 /**********************************************************************************************/
 
 /* NMI *************************************************************************************** */
-void S9xOpcode_NMI(void)
+void S9xOpcode_NMI()
 {
    if (!CheckEmulation())
    {
@@ -4294,6 +3561,8 @@ void S9xOpcode_NMI(void)
                       (Memory.FillRAM [0x220d] << 8));
       else
          S9xSetPCBase(S9xGetWord(0xFFEA));
+#endif
+#ifndef SA1_OPCODES
       CPU.Cycles += TWO_CYCLES;
 #endif
    }
@@ -4317,6 +3586,8 @@ void S9xOpcode_NMI(void)
                       (Memory.FillRAM [0x220d] << 8));
       else
          S9xSetPCBase(S9xGetWord(0xFFFA));
+#endif
+#ifndef SA1_OPCODES
       CPU.Cycles += ONE_CYCLE;
 #endif
    }
@@ -4324,7 +3595,7 @@ void S9xOpcode_NMI(void)
 /**********************************************************************************************/
 
 /* COP *************************************************************************************** */
-static void Op02(void)
+static void Op02()
 {
    if (!CheckEmulation())
    {
@@ -4363,23 +3634,20 @@ static void Op02(void)
 /**********************************************************************************************/
 
 /* JML *************************************************************************************** */
-static void OpDC(void)
+static void OpDC()
 {
-   AbsoluteIndirectLong(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
-#endif
+   AbsoluteIndirectLong(false);
    ICPU.Registers.PB = (uint8_t)(OpAddress >> 16);
    ICPU.ShiftedPB = OpAddress & 0xff0000;
    S9xSetPCBase(OpAddress);
+#ifndef SA1_OPCODES
+   CPU.Cycles += TWO_CYCLES;
+#endif
 }
 
-static void Op5C(void)
+static void Op5C()
 {
-   AbsoluteLong(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(false);
    ICPU.Registers.PB = (uint8_t)(OpAddress >> 16);
    ICPU.ShiftedPB = OpAddress & 0xff0000;
    S9xSetPCBase(OpAddress);
@@ -4387,44 +3655,35 @@ static void Op5C(void)
 /**********************************************************************************************/
 
 /* JMP *************************************************************************************** */
-static void Op4C(void)
+static void Op4C()
 {
-   Absolute(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   Absolute(false);
    S9xSetPCBase(ICPU.ShiftedPB + (OpAddress & 0xffff));
 #if defined(CPU_SHUTDOWN) && defined(SA1_OPCODES)
    CPUShutdown();
 #endif
 }
 
-static void Op6C(void)
+static void Op6C()
 {
-   AbsoluteIndirect(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2;
-#endif
+   AbsoluteIndirect(false);
    S9xSetPCBase(ICPU.ShiftedPB + (OpAddress & 0xffff));
 }
 
-static void Op7C(void)
+static void Op7C()
 {
-   AbsoluteIndexedIndirect(JUMP, OpAddressPassthrough);
+   AbsoluteIndexedIndirect(false);
+   S9xSetPCBase(ICPU.ShiftedPB + OpAddress);
 #ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
+   CPU.Cycles += ONE_CYCLE;
 #endif
-   S9xSetPCBase(ICPU.ShiftedPB + OpAddress);
 }
 /**********************************************************************************************/
 
 /* JSL/RTL *********************************************************************************** */
-static void Op22E1(void)
+static void Op22E1()
 {
-   AbsoluteLong(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(false);
    PushB(ICPU.Registers.PB);
    PushWE(CPU.PC - CPU.PCBase - 1);
    ICPU.Registers.PB = (uint8_t)(OpAddress >> 16);
@@ -4432,12 +3691,9 @@ static void Op22E1(void)
    S9xSetPCBase(OpAddress);
 }
 
-static void Op22(void)
+static void Op22()
 {
-   AbsoluteLong(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
-#endif
+   AbsoluteLong(false);
    PushB(ICPU.Registers.PB);
    PushW(CPU.PC - CPU.PCBase - 1);
    ICPU.Registers.PB = (uint8_t)(OpAddress >> 16);
@@ -4445,7 +3701,7 @@ static void Op22(void)
    S9xSetPCBase(OpAddress);
 }
 
-static void Op6BE1(void)
+static void Op6BE1()
 {
    PullWE(ICPU.Registers.PC);
    PullB(ICPU.Registers.PB);
@@ -4456,7 +3712,7 @@ static void Op6BE1(void)
 #endif
 }
 
-static void Op6B(void)
+static void Op6B()
 {
    PullW(ICPU.Registers.PC);
    PullB(ICPU.Registers.PB);
@@ -4469,38 +3725,38 @@ static void Op6B(void)
 /**********************************************************************************************/
 
 /* JSR/RTS *********************************************************************************** */
-static void Op20(void)
+static void Op20()
 {
-   Absolute(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
-#endif
+   Absolute(false);
    PushW(CPU.PC - CPU.PCBase - 1);
    S9xSetPCBase(ICPU.ShiftedPB + (OpAddress & 0xffff));
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 }
 
 //JSR a,x
-static void OpFCE1(void)
+static void OpFCE1()
 {
-   AbsoluteIndexedIndirect(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
-#endif
+   AbsoluteIndexedIndirect(false);
    PushWE(CPU.PC - CPU.PCBase - 1);
    S9xSetPCBase(ICPU.ShiftedPB + OpAddress);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 }
 
-static void OpFC(void)
+static void OpFC()
 {
-   AbsoluteIndexedIndirect(JUMP, OpAddressPassthrough);
-#ifndef SA1_OPCODES
-   CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
-#endif
+   AbsoluteIndexedIndirect(false);
    PushW(CPU.PC - CPU.PCBase - 1);
    S9xSetPCBase(ICPU.ShiftedPB + OpAddress);
+#ifndef SA1_OPCODES
+   CPU.Cycles += ONE_CYCLE;
+#endif
 }
 
-static void Op60(void)
+static void Op60()
 {
    PullW(ICPU.Registers.PC);
    S9xSetPCBase(ICPU.ShiftedPB + ((ICPU.Registers.PC + 1) & 0xffff));
@@ -4512,20 +3768,17 @@ static void Op60(void)
 /**********************************************************************************************/
 
 /* MVN/MVP *********************************************************************************** */
-static void Op54X1(void)
+static void Op54X1()
 {
-   uint32_t SrcBank;
-
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
 #endif
 
    ICPU.Registers.DB = *CPU.PC++;
    ICPU.ShiftedDB = ICPU.Registers.DB << 16;
-   OpenBus = SrcBank = *CPU.PC++;
+   OpenBus = *CPU.PC++;
 
-   S9xSetByte(S9xGetByte((SrcBank << 16) + ICPU.Registers.X.W),
-              ICPU.ShiftedDB + ICPU.Registers.Y.W);
+   S9xSetByte(S9xGetByte((OpenBus << 16) + ICPU.Registers.X.W), ICPU.ShiftedDB + ICPU.Registers.Y.W);
 
    ICPU.Registers.XL++;
    ICPU.Registers.YL++;
@@ -4534,20 +3787,17 @@ static void Op54X1(void)
       CPU.PC -= 3;
 }
 
-static void Op54X0(void)
+static void Op54X0()
 {
-   uint32_t SrcBank;
-
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
 #endif
 
    ICPU.Registers.DB = *CPU.PC++;
    ICPU.ShiftedDB = ICPU.Registers.DB << 16;
-   OpenBus = SrcBank = *CPU.PC++;
+   OpenBus = *CPU.PC++;
 
-   S9xSetByte(S9xGetByte((SrcBank << 16) + ICPU.Registers.X.W),
-              ICPU.ShiftedDB + ICPU.Registers.Y.W);
+   S9xSetByte(S9xGetByte((OpenBus << 16) + ICPU.Registers.X.W), ICPU.ShiftedDB + ICPU.Registers.Y.W);
 
    ICPU.Registers.X.W++;
    ICPU.Registers.Y.W++;
@@ -4556,18 +3806,15 @@ static void Op54X0(void)
       CPU.PC -= 3;
 }
 
-static void Op44X1(void)
+static void Op44X1()
 {
-   uint32_t SrcBank;
-
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
 #endif
    ICPU.Registers.DB = *CPU.PC++;
    ICPU.ShiftedDB = ICPU.Registers.DB << 16;
-   OpenBus = SrcBank = *CPU.PC++;
-   S9xSetByte(S9xGetByte((SrcBank << 16) + ICPU.Registers.X.W),
-              ICPU.ShiftedDB + ICPU.Registers.Y.W);
+   OpenBus = *CPU.PC++;
+   S9xSetByte(S9xGetByte((OpenBus << 16) + ICPU.Registers.X.W), ICPU.ShiftedDB + ICPU.Registers.Y.W);
 
    ICPU.Registers.XL--;
    ICPU.Registers.YL--;
@@ -4576,18 +3823,15 @@ static void Op44X1(void)
       CPU.PC -= 3;
 }
 
-static void Op44X0(void)
+static void Op44X0()
 {
-   uint32_t SrcBank;
-
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeedx2 + TWO_CYCLES;
 #endif
    ICPU.Registers.DB = *CPU.PC++;
    ICPU.ShiftedDB = ICPU.Registers.DB << 16;
-   OpenBus = SrcBank = *CPU.PC++;
-   S9xSetByte(S9xGetByte((SrcBank << 16) + ICPU.Registers.X.W),
-              ICPU.ShiftedDB + ICPU.Registers.Y.W);
+   OpenBus = *CPU.PC++;
+   S9xSetByte(S9xGetByte((OpenBus << 16) + ICPU.Registers.X.W), ICPU.ShiftedDB + ICPU.Registers.Y.W);
 
    ICPU.Registers.X.W--;
    ICPU.Registers.Y.W--;
@@ -4599,7 +3843,7 @@ static void Op44X0(void)
 /**********************************************************************************************/
 
 /* REP/SEP *********************************************************************************** */
-static void OpC2(void)
+static void OpC2()
 {
    uint8_t Work8 = ~*CPU.PC++;
    ICPU.Registers.PL &= Work8;
@@ -4624,7 +3868,7 @@ static void OpC2(void)
    S9xFixCycles();
 }
 
-static void OpE2(void)
+static void OpE2()
 {
    uint8_t Work8 = *CPU.PC++;
    ICPU.Registers.PL |= Work8;
@@ -4651,12 +3895,11 @@ static void OpE2(void)
 /**********************************************************************************************/
 
 /* XBA *************************************************************************************** */
-static void OpEB(void)
+static void OpEB()
 {
    uint8_t Work8 = ICPU.Registers.AL;
    ICPU.Registers.AL = ICPU.Registers.AH;
    ICPU.Registers.AH = Work8;
-
    SetZN8(ICPU.Registers.AL);
 #ifndef SA1_OPCODES
    CPU.Cycles += TWO_CYCLES;
@@ -4665,7 +3908,7 @@ static void OpEB(void)
 /**********************************************************************************************/
 
 /* RTI *************************************************************************************** */
-static void Op40(void)
+static void Op40()
 {
    PullB(ICPU.Registers.PL);
    S9xUnpackStatus();
@@ -4696,46 +3939,38 @@ static void Op40(void)
 
 /* STP/WAI/DB ******************************************************************************** */
 // WAI
-static void OpCB(void)
+static void OpCB()
 {
 #ifdef SA1_OPCODES
    SA1.WaitingForInterrupt = true;
    SA1.PC--;
-#else // SA1_OPCODES
-   {
-      CPU.WaitingForInterrupt = true;
-      CPU.PC--;
+#else // SA_OPCODES
+   CPU.WaitingForInterrupt = true;
+   CPU.PC--;
 #ifdef CPU_SHUTDOWN
-      if (Settings.Shutdown)
-      {
-         CPU.Cycles = CPU.NextEvent;
+   if (Settings.Shutdown)
+   {
+      CPU.Cycles = CPU.NextEvent;
 #ifndef USE_BLARGG_APU
-         if (IAPU.APUExecuting)
+      if (IAPU.APUExecuting)
+      {
+         ICPU.CPUExecuting = false;
+         do
          {
-            ICPU.CPUExecuting = false;
-            do
-            {
-               APU_EXECUTE1();
-            }
-            while (APU.Cycles < CPU.NextEvent);
-            ICPU.CPUExecuting = true;
+            APU_EXECUTE1();
          }
-#endif
-      }
-      else
-      {
-#ifndef SA1_OPCODES
-         CPU.Cycles += TWO_CYCLES;
-#endif
+         while (APU.Cycles < CPU.NextEvent);
+         ICPU.CPUExecuting = true;
       }
 #endif
    }
-#endif // SA1_OPCODES
+#endif
+#endif
 }
 
 // Usually an STP opcode
 // SNESAdvance speed hack, not implemented in Snes9xTYL | Snes9x-Euphoria (from the speed-hacks branch of CatSFC)
-static void OpDB(void)
+static void OpDB()
 {
 #if !defined NO_SPEEDHACKS && defined CPU_SHUTDOWN
    uint8_t NextByte = *CPU.PC++;
@@ -4744,14 +3979,15 @@ static void OpDB(void)
 
    int8_t BranchOffset = (NextByte & 0x7F) | ((NextByte & 0x40) << 1);
    // ^ -64 .. +63, sign extend bit 6 into 7 for unpacking
-   int32_t TargetAddress = ((int32_t) (CPU.PC - CPU.PCBase) + BranchOffset) & 0xffff;
+   OpAddress = ((int32_t) (CPU.PC - CPU.PCBase) + BranchOffset) & 0xffff;
 
    switch (NextByte & 0x80)
    {
    case 0x00: // BNE
       BranchCheck1 ();
-      if (!CheckZero ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (!CheckZero ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4764,8 +4000,9 @@ static void OpDB(void)
       return;
    case 0x80: // BEQ
       BranchCheck2 ();
-      if (CheckZero ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (CheckZero ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4784,7 +4021,7 @@ static void OpDB(void)
 }
 
 // SNESAdvance speed hack, as implemented in Snes9xTYL / Snes9x-Euphoria (from the speed-hacks branch of CatSFC)
-static void Op42(void)
+static void Op42()
 {
 #if !defined NO_SPEEDHACKS && defined CPU_SHUTDOWN
    uint8_t NextByte = *CPU.PC++;
@@ -4792,14 +4029,15 @@ static void Op42(void)
    ForceShutdown();
 
    int8_t BranchOffset = 0xF0 | (NextByte & 0xF); // always negative
-   int32_t TargetAddress = ((int32_t) (CPU.PC - CPU.PCBase) + BranchOffset) & 0xffff;
+   OpAddress = ((int32_t) (CPU.PC - CPU.PCBase) + BranchOffset) & 0xffff;
 
    switch (NextByte & 0xF0)
    {
    case 0x10: // BPL
       BranchCheck1 ();
-      if (!CheckNegative ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (!CheckNegative ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4812,8 +4050,9 @@ static void Op42(void)
       return;
    case 0x30: // BMI
       BranchCheck1 ();
-      if (CheckNegative ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (CheckNegative ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4826,8 +4065,9 @@ static void Op42(void)
       return;
    case 0x50: // BVC
       BranchCheck0 ();
-      if (!CheckOverflow ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (!CheckOverflow ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4840,8 +4080,9 @@ static void Op42(void)
       return;
    case 0x70: // BVS
       BranchCheck0 ();
-      if (CheckOverflow ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (CheckOverflow ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4853,7 +4094,7 @@ static void Op42(void)
       }
       return;
    case 0x80: // BRA
-      CPU.PC = CPU.PCBase + TargetAddress;
+      CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
       CPU.Cycles += ONE_CYCLE;
 #else
@@ -4865,8 +4106,9 @@ static void Op42(void)
       return;
    case 0x90: // BCC
       BranchCheck0 ();
-      if (!CheckCarry ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (!CheckCarry ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4879,8 +4121,9 @@ static void Op42(void)
       return;
    case 0xB0: // BCS
       BranchCheck0 ();
-      if (CheckCarry ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (CheckCarry ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4893,8 +4136,9 @@ static void Op42(void)
       return;
    case 0xD0: // BNE
       BranchCheck1 ();
-      if (!CheckZero ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (!CheckZero ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4907,8 +4151,9 @@ static void Op42(void)
       return;
    case 0xF0: // BEQ
       BranchCheck2 ();
-      if (CheckZero ()) {
-         CPU.PC = CPU.PCBase + TargetAddress;
+      if (CheckZero ())
+      {
+         CPU.PC = CPU.PCBase + OpAddress;
 #ifdef VAR_CYCLES
          CPU.Cycles += ONE_CYCLE;
 #else
@@ -4926,11 +4171,11 @@ static void Op42(void)
 /*****************************************************************************/
 
 /*****************************************************************************/
-/* CPU-S9xOpcodes Definitions                                                                    */
+/* CPU-S9xOpcodes Definitions                                                */
 /*****************************************************************************/
 SOpcodes S9xOpcodesM1X1[256] =
 {
-   {Op00},  {Op01M1},    {Op02},      {Op03M1},    {Op04M1},
+   {Op00},      {Op01M1},    {Op02},      {Op03M1},    {Op04M1},
    {Op05M1},    {Op06M1},    {Op07M1},    {Op08},      {Op09M1},
    {Op0AM1},    {Op0B},      {Op0CM1},    {Op0DM1},    {Op0EM1},
    {Op0FM1},    {Op10},      {Op11M1},    {Op12M1},    {Op13M1},
@@ -4986,58 +4231,58 @@ SOpcodes S9xOpcodesM1X1[256] =
 
 SOpcodes S9xOpcodesE1[256] =
 {
-   {Op00},  {Op01M1},    {Op02},      {Op03M1},    {Op04M1},
-   {Op05M1},    {Op06M1},    {Op07M1},    {Op08E1},      {Op09M1},
-   {Op0AM1},    {Op0BE1},      {Op0CM1},    {Op0DM1},    {Op0EM1},
-   {Op0FM1},    {Op10},      {Op11M1},    {Op12M1},    {Op13M1},
-   {Op14M1},    {Op15M1},    {Op16M1},    {Op17M1},    {Op18},
-   {Op19M1},    {Op1AM1},    {Op1B},      {Op1CM1},    {Op1DM1},
-   {Op1EM1},    {Op1FM1},    {Op20},      {Op21M1},    {Op22E1},
-   {Op23M1},    {Op24M1},    {Op25M1},    {Op26M1},    {Op27M1},
-   {Op28},      {Op29M1},    {Op2AM1},    {Op2BE1},      {Op2CM1},
-   {Op2DM1},    {Op2EM1},    {Op2FM1},    {Op30},      {Op31M1},
-   {Op32M1},    {Op33M1},    {Op34M1},    {Op35M1},    {Op36M1},
-   {Op37M1},    {Op38},      {Op39M1},    {Op3AM1},    {Op3B},
-   {Op3CM1},    {Op3DM1},    {Op3EM1},    {Op3FM1},    {Op40},
-   {Op41M1},    {Op42},      {Op43M1},    {Op44X1},    {Op45M1},
-   {Op46M1},    {Op47M1},    {Op48E1},    {Op49M1},    {Op4AM1},
-   {Op4BE1},      {Op4C},      {Op4DM1},    {Op4EM1},    {Op4FM1},
-   {Op50},      {Op51M1},    {Op52M1},    {Op53M1},    {Op54X1},
-   {Op55M1},    {Op56M1},    {Op57M1},    {Op58},      {Op59M1},
-   {Op5AE1},    {Op5B},      {Op5C},      {Op5DM1},    {Op5EM1},
-   {Op5FM1},    {Op60},      {Op61M1},    {Op62E1},      {Op63M1},
-   {Op64M1},    {Op65M1},    {Op66M1},    {Op67M1},    {Op68E1},
-   {Op69M1},    {Op6AM1},    {Op6BE1},      {Op6C},      {Op6DM1},
-   {Op6EM1},    {Op6FM1},    {Op70},      {Op71M1},    {Op72M1},
-   {Op73M1},    {Op74M1},    {Op75M1},    {Op76M1},    {Op77M1},
-   {Op78},      {Op79M1},    {Op7AE1},    {Op7B},      {Op7C},
-   {Op7DM1},    {Op7EM1},    {Op7FM1},    {Op80},      {Op81M1},
-   {Op82},      {Op83M1},    {Op84X1},    {Op85M1},    {Op86X1},
-   {Op87M1},    {Op88X1},    {Op89M1},    {Op8AM1},    {Op8BE1},
-   {Op8CX1},    {Op8DM1},    {Op8EX1},    {Op8FM1},    {Op90},
-   {Op91M1},    {Op92M1},    {Op93M1},    {Op94X1},    {Op95M1},
-   {Op96X1},    {Op97M1},    {Op98M1},    {Op99M1},    {Op9A},
-   {Op9BX1},    {Op9CM1},    {Op9DM1},    {Op9EM1},    {Op9FM1},
-   {OpA0X1},    {OpA1M1},    {OpA2X1},    {OpA3M1},    {OpA4X1},
-   {OpA5M1},    {OpA6X1},    {OpA7M1},    {OpA8X1},    {OpA9M1},
-   {OpAAX1},    {OpABE1},      {OpACX1},    {OpADM1},    {OpAEX1},
-   {OpAFM1},    {OpB0},      {OpB1M1},    {OpB2M1},    {OpB3M1},
-   {OpB4X1},    {OpB5M1},    {OpB6X1},    {OpB7M1},    {OpB8},
-   {OpB9M1},    {OpBAX1},    {OpBBX1},    {OpBCX1},    {OpBDM1},
-   {OpBEX1},    {OpBFM1},    {OpC0X1},    {OpC1M1},    {OpC2},
-   {OpC3M1},    {OpC4X1},    {OpC5M1},    {OpC6M1},    {OpC7M1},
-   {OpC8X1},    {OpC9M1},    {OpCAX1},    {OpCB},      {OpCCX1},
-   {OpCDM1},    {OpCEM1},    {OpCFM1},    {OpD0},      {OpD1M1},
-   {OpD2M1},    {OpD3M1},    {OpD4E1},      {OpD5M1},    {OpD6M1},
-   {OpD7M1},    {OpD8},      {OpD9M1},    {OpDAE1},    {OpDB},
-   {OpDC},      {OpDDM1},    {OpDEM1},    {OpDFM1},    {OpE0X1},
-   {OpE1M1},    {OpE2},      {OpE3M1},    {OpE4X1},    {OpE5M1},
-   {OpE6M1},    {OpE7M1},    {OpE8X1},    {OpE9M1},    {OpEA},
-   {OpEB},      {OpECX1},    {OpEDM1},    {OpEEM1},    {OpEFM1},
-   {OpF0},      {OpF1M1},    {OpF2M1},    {OpF3M1},    {OpF4E1},
-   {OpF5M1},    {OpF6M1},    {OpF7M1},    {OpF8},      {OpF9M1},
-   {OpFAE1},    {OpFB},      {OpFCE1},      {OpFDM1},    {OpFEM1},
-   {OpFFM1}
+    {Op00},	     {Op01M1},    {Op02},      {Op03M1},    {Op04M1},
+    {Op05M1},    {Op06M1},    {Op07M1},    {Op08E1},    {Op09M1},
+    {Op0AM1},    {Op0BE1},    {Op0CM1},    {Op0DM1},    {Op0EM1},
+    {Op0FM1},    {Op10},      {Op11M1},    {Op12M1},    {Op13M1},
+    {Op14M1},    {Op15M1},    {Op16M1},    {Op17M1},    {Op18},
+    {Op19M1},    {Op1AM1},    {Op1B},      {Op1CM1},    {Op1DM1},
+    {Op1EM1},    {Op1FM1},    {Op20},      {Op21M1},    {Op22E1},
+    {Op23M1},    {Op24M1},    {Op25M1},    {Op26M1},    {Op27M1},
+    {Op28},      {Op29M1},    {Op2AM1},    {Op2BE1},    {Op2CM1},
+    {Op2DM1},    {Op2EM1},    {Op2FM1},    {Op30},      {Op31M1},
+    {Op32M1},    {Op33M1},    {Op34M1},    {Op35M1},    {Op36M1},
+    {Op37M1},    {Op38},      {Op39M1},    {Op3AM1},    {Op3B},
+    {Op3CM1},    {Op3DM1},    {Op3EM1},    {Op3FM1},    {Op40},
+    {Op41M1},    {Op42},      {Op43M1},    {Op44X1},    {Op45M1},
+    {Op46M1},    {Op47M1},    {Op48E1},    {Op49M1},    {Op4AM1},
+    {Op4BE1},    {Op4C},      {Op4DM1},    {Op4EM1},    {Op4FM1},
+    {Op50},      {Op51M1},    {Op52M1},    {Op53M1},    {Op54X1},
+    {Op55M1},    {Op56M1},    {Op57M1},    {Op58},      {Op59M1},
+    {Op5AE1},    {Op5B},      {Op5C},      {Op5DM1},    {Op5EM1},
+    {Op5FM1},    {Op60},      {Op61M1},    {Op62E1},    {Op63M1},
+    {Op64M1},    {Op65M1},    {Op66M1},    {Op67M1},    {Op68E1},
+    {Op69M1},    {Op6AM1},    {Op6BE1},    {Op6C},      {Op6DM1},
+    {Op6EM1},    {Op6FM1},    {Op70},      {Op71M1},    {Op72M1},
+    {Op73M1},    {Op74M1},    {Op75M1},    {Op76M1},    {Op77M1},
+    {Op78},      {Op79M1},    {Op7AE1},    {Op7B},      {Op7C},
+    {Op7DM1},    {Op7EM1},    {Op7FM1},    {Op80},      {Op81M1},
+    {Op82},      {Op83M1},    {Op84X1},    {Op85M1},    {Op86X1},
+    {Op87M1},    {Op88X1},    {Op89M1},    {Op8AM1},    {Op8BE1},
+    {Op8CX1},    {Op8DM1},    {Op8EX1},    {Op8FM1},    {Op90},
+    {Op91M1},    {Op92M1},    {Op93M1},    {Op94X1},    {Op95M1},
+    {Op96X1},    {Op97M1},    {Op98M1},    {Op99M1},    {Op9A},
+    {Op9BX1},    {Op9CM1},    {Op9DM1},    {Op9EM1},    {Op9FM1},
+    {OpA0X1},    {OpA1M1},    {OpA2X1},    {OpA3M1},    {OpA4X1},
+    {OpA5M1},    {OpA6X1},    {OpA7M1},    {OpA8X1},    {OpA9M1},
+    {OpAAX1},    {OpABE1},    {OpACX1},    {OpADM1},    {OpAEX1},
+    {OpAFM1},    {OpB0},      {OpB1M1},    {OpB2M1},    {OpB3M1},
+    {OpB4X1},    {OpB5M1},    {OpB6X1},    {OpB7M1},    {OpB8},
+    {OpB9M1},    {OpBAX1},    {OpBBX1},    {OpBCX1},    {OpBDM1},
+    {OpBEX1},    {OpBFM1},    {OpC0X1},    {OpC1M1},    {OpC2},
+    {OpC3M1},    {OpC4X1},    {OpC5M1},    {OpC6M1},    {OpC7M1},
+    {OpC8X1},    {OpC9M1},    {OpCAX1},    {OpCB},      {OpCCX1},
+    {OpCDM1},    {OpCEM1},    {OpCFM1},    {OpD0},      {OpD1M1},
+    {OpD2M1},    {OpD3M1},    {OpD4E1},    {OpD5M1},    {OpD6M1},
+    {OpD7M1},    {OpD8},      {OpD9M1},    {OpDAE1},    {OpDB},
+    {OpDC},      {OpDDM1},    {OpDEM1},    {OpDFM1},    {OpE0X1},
+    {OpE1M1},    {OpE2},      {OpE3M1},    {OpE4X1},    {OpE5M1},
+    {OpE6M1},    {OpE7M1},    {OpE8X1},    {OpE9M1},    {OpEA},
+    {OpEB},      {OpECX1},    {OpEDM1},    {OpEEM1},    {OpEFM1},
+    {OpF0},      {OpF1M1},    {OpF2M1},    {OpF3M1},    {OpF4E1},
+    {OpF5M1},    {OpF6M1},    {OpF7M1},    {OpF8},      {OpF9M1},
+    {OpFAE1},    {OpFB},      {OpFCE1},    {OpFDM1},    {OpFEM1},
+    {OpFFM1}
 };
 
 SOpcodes S9xOpcodesM1X0[256] =
diff --git a/source/memmap.c b/source/memmap.c
index 286abc6..75d1b9f 100644
--- a/source/memmap.c
+++ b/source/memmap.c
@@ -6,10 +6,6 @@
 #endif
 #include <ctype.h>
 
-#ifdef __linux
-#include <unistd.h>
-#endif
-
 #include "snes9x.h"
 #include "memmap.h"
 #include "cpuexec.h"
@@ -28,75 +24,22 @@
 #include <malloc.h>
 #endif
 
+#define MAP_HIROM_SRAM_OR_NONE (Memory.SRAMSize == 0 ? (uint8_t*) MAP_NONE : (uint8_t*) MAP_HIROM_SRAM)
+#define MAP_LOROM_SRAM_OR_NONE (Memory.SRAMSize == 0 ? (uint8_t*) MAP_NONE : (uint8_t*) MAP_LOROM_SRAM)
+#define MAP_RONLY_SRAM_OR_NONE (Memory.SRAMSize == 0 ? (uint8_t*) MAP_NONE : (uint8_t*) MAP_RONLY_SRAM)
+
 #include "fxemu.h"
 extern struct FxInit_s SuperFX;
 
 static int32_t retry_count = 0;
 static uint8_t bytes0x2000 [0x2000];
-int32_t is_bsx(uint8_t*);
-int32_t bs_name(uint8_t*);
-
-static int32_t check_char(uint32_t c)
-{
-   if ((c & 0x80) == 0)
-      return 0;
-   if ((c - 0x20) & 0x40)
-      return 1;
-   return 0;
-}
+static bool is_bsx(uint8_t*);
+static bool bs_name(uint8_t*);
 
 void S9xDeinterleaveType2(bool reset);
-uint32_t caCRC32(uint8_t* array, uint32_t size, uint32_t crc32);
 
 extern char* rom_filename;
 
-const uint32_t crc32Table[256] =
-{
-   0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
-   0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
-   0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
-   0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
-   0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
-   0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
-   0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
-   0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
-   0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
-   0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
-   0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
-   0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
-   0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
-   0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
-   0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
-   0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
-   0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
-   0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
-   0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
-   0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
-   0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
-   0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
-   0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
-   0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
-   0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
-   0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
-   0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
-   0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
-   0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
-   0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
-   0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
-   0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
-   0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
-   0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
-   0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
-   0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
-   0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
-   0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
-   0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
-   0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
-   0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
-   0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
-   0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
-};
-
 void S9xDeinterleaveType1(int32_t TotalFileSize, uint8_t* base)
 {
    int32_t i;
@@ -265,7 +208,7 @@ static char* Safe(const char* s)
 
    if (s == NULL)
    {
-      if (safe != NULL)
+      if (safe)
       {
          free(safe);
          safe = NULL;
@@ -300,38 +243,30 @@ bool S9xInitMemory()
 {
    // DS2 DMA notes: These would do well to be allocated with 32 extra bytes
    // so they can be 32-byte aligned. [Neb]
-   Memory.RAM     = (uint8_t*) malloc(0x20000);
-   Memory.SRAM    = (uint8_t*) malloc(0x20000);
-   Memory.VRAM    = (uint8_t*) malloc(0x10000);
+   Memory.RAM   = (uint8_t*) calloc(0x20000, 1);
+   Memory.SRAM  = (uint8_t*) calloc(0x20000, 1);
+   Memory.VRAM  = (uint8_t*) calloc(0x10000, 1);
+   Memory.BSRAM = (uint8_t*) calloc(0x80000, 1);
+   // Don't bother initializing ROM, we will load a game anyway.
 #ifdef DS2_DMA
-   ROM     = (uint8_t*) AlignedMalloc(MAX_ROM_SIZE + 0x200 + 0x8000, 32,
-                                    &PtrAdj.ROM);
+   Memory.ROM   = (uint8_t*) AlignedMalloc(MAX_ROM_SIZE + 0x200 + 0x8000, 32, &PtrAdj.ROM);
 #else
-   Memory.ROM     = (uint8_t*) malloc(MAX_ROM_SIZE + 0x200 + 0x8000);
+   Memory.ROM   = (uint8_t*) malloc(MAX_ROM_SIZE + 0x200 + 0x8000);
 #endif
-   memset(Memory.RAM, 0, 0x20000);
-   memset(Memory.SRAM, 0, 0x20000);
-   memset(Memory.VRAM, 0, 0x10000);
-   // Don't bother memsetting ROM, we will load a game anyway. [Neb]
-
-   Memory.BSRAM   = (uint8_t*) malloc(0x80000);
-   memset(Memory.BSRAM, 0, 0x80000);
-
    Memory.FillRAM = NULL;
 
-   IPPU.TileCache [TILE_2BIT] = (uint8_t*) malloc(MAX_2BIT_TILES * 128);
-   IPPU.TileCache [TILE_4BIT] = (uint8_t*) malloc(MAX_4BIT_TILES * 128);
-   IPPU.TileCache [TILE_8BIT] = (uint8_t*) malloc(MAX_8BIT_TILES * 128);
+   IPPU.TileCache [TILE_2BIT] = (uint8_t*) calloc(MAX_2BIT_TILES, 128);
+   IPPU.TileCache [TILE_4BIT] = (uint8_t*) calloc(MAX_4BIT_TILES, 128);
+   IPPU.TileCache [TILE_8BIT] = (uint8_t*) calloc(MAX_8BIT_TILES, 128);
 
-   IPPU.TileCached [TILE_2BIT] = (uint8_t*) malloc(MAX_2BIT_TILES);
-   IPPU.TileCached [TILE_4BIT] = (uint8_t*) malloc(MAX_4BIT_TILES);
-   IPPU.TileCached [TILE_8BIT] = (uint8_t*) malloc(MAX_8BIT_TILES);
+   IPPU.TileCached [TILE_2BIT] = (uint8_t*) calloc(MAX_2BIT_TILES, 1);
+   IPPU.TileCached [TILE_4BIT] = (uint8_t*) calloc(MAX_4BIT_TILES, 1);
+   IPPU.TileCached [TILE_8BIT] = (uint8_t*) calloc(MAX_8BIT_TILES, 1);
 
-   if (!Memory.RAM || !Memory.SRAM || !Memory.VRAM || !Memory.ROM || !Memory.BSRAM
-         ||
-         !IPPU.TileCache [TILE_2BIT] || !IPPU.TileCache [TILE_4BIT] ||
-         !IPPU.TileCache [TILE_8BIT] || !IPPU.TileCached [TILE_2BIT] ||
-         !IPPU.TileCached [TILE_4BIT] ||  !IPPU.TileCached [TILE_8BIT])
+   if (!Memory.RAM || !Memory.SRAM || !Memory.VRAM || !Memory.ROM || !Memory.BSRAM ||
+       !IPPU.TileCache [TILE_2BIT] || !IPPU.TileCache [TILE_4BIT] ||
+       !IPPU.TileCache [TILE_8BIT] || !IPPU.TileCached [TILE_2BIT] ||
+       !IPPU.TileCached [TILE_4BIT] ||  !IPPU.TileCached [TILE_8BIT])
    {
       S9xDeinitMemory();
       return (false);
@@ -346,24 +281,12 @@ bool S9xInitMemory()
    // unallocated memory (can cause crash on some ports).
    Memory.ROM += 0x8000;  // still 32-byte aligned
 
-   Memory.C4RAM    = Memory.ROM + 0x400000 + 8192 * 8;  // still 32-byte aligned
-   Memory.ROM    = Memory.ROM;
-   Memory.SRAM   = Memory.SRAM;
-
    SuperFX.pvRegisters = &Memory.FillRAM [0x3000];
    SuperFX.nRamBanks = 2; // Most only use 1.  1=64KB, 2=128KB=1024Mb
    SuperFX.pvRam = Memory.SRAM;
    SuperFX.nRomBanks = (2 * 1024 * 1024) / (32 * 1024);
    SuperFX.pvRom = (uint8_t*) Memory.ROM;
 
-   memset(IPPU.TileCache [TILE_2BIT], 0, MAX_2BIT_TILES * 128);
-   memset(IPPU.TileCache [TILE_4BIT], 0, MAX_4BIT_TILES * 128);
-   memset(IPPU.TileCache [TILE_8BIT], 0, MAX_8BIT_TILES * 128);
-
-   memset(IPPU.TileCached [TILE_2BIT], 0, MAX_2BIT_TILES);
-   memset(IPPU.TileCached [TILE_4BIT], 0, MAX_4BIT_TILES);
-   memset(IPPU.TileCached [TILE_8BIT], 0, MAX_8BIT_TILES);
-
    Memory.SDD1Data = NULL;
    Memory.SDD1Index = NULL;
 
@@ -404,39 +327,20 @@ void S9xDeinitMemory()
       Memory.BSRAM = NULL;
    }
 
-   if (IPPU.TileCache [TILE_2BIT])
-   {
-      free(IPPU.TileCache [TILE_2BIT]);
-      IPPU.TileCache [TILE_2BIT] = NULL;
-   }
-   if (IPPU.TileCache [TILE_4BIT])
-   {
-      free(IPPU.TileCache [TILE_4BIT]);
-      IPPU.TileCache [TILE_4BIT] = NULL;
-   }
-   if (IPPU.TileCache [TILE_8BIT])
-   {
-      free(IPPU.TileCache [TILE_8BIT]);
-      IPPU.TileCache [TILE_8BIT] = NULL;
-   }
-
-   if (IPPU.TileCached [TILE_2BIT])
-   {
-      free(IPPU.TileCached [TILE_2BIT]);
-      IPPU.TileCached [TILE_2BIT] = NULL;
-   }
-   if (IPPU.TileCached [TILE_4BIT])
-   {
-      free(IPPU.TileCached [TILE_4BIT]);
-      IPPU.TileCached [TILE_4BIT] = NULL;
-   }
-   if (IPPU.TileCached [TILE_8BIT])
+   for (int t = 0; t < 2; t++)
    {
-      free(IPPU.TileCached [TILE_8BIT]);
-      IPPU.TileCached [TILE_8BIT] = NULL;
+      if (IPPU.TileCache[t])
+      {
+         free(IPPU.TileCache[t]);
+         IPPU.TileCache[t] = NULL;
+      }
+      if (IPPU.TileCached[t])
+      {
+         free(IPPU.TileCached[t]);
+         IPPU.TileCached[t] = NULL;
+      }
    }
    FreeSDD1Data();
-   Safe(NULL);
 }
 
 void FreeSDD1Data()
@@ -716,7 +620,7 @@ again:
    if ((((game->size & 0x1FFF) == 0x200) && !Settings.ForceNoHeader) || Settings.ForceHeader)
    {
       TotalFileSize -= 0x200;
-      src      += 0x200;
+      src += 0x200;
       Memory.HeaderCount = 1;
 
    }
@@ -730,7 +634,7 @@ again:
    TotalFileSize = FileLoader(Memory.ROM, filename, MAX_ROM_SIZE);
 
    if (!TotalFileSize)
-      return false;     // it ends here
+		return false; // it ends here
    else if (!Settings.NoPatch)
       CheckForIPSPatch(filename, Memory.HeaderCount != 0, &TotalFileSize);
 #endif
@@ -778,8 +682,9 @@ again:
    int32_t lo_score = ScoreLoROM(true, 0);
 
    if (Memory.HeaderCount == 0 && !Settings.ForceNoHeader &&
-         ((hi_score > lo_score && ScoreHiROM(true, 0) > hi_score) ||
-          (hi_score <= lo_score && ScoreLoROM(true, 0) > lo_score)))
+       strncmp((char *) &Memory.ROM [0], "BANDAI SFC-ADX", 14) &&
+       ((hi_score > lo_score && ScoreHiROM(true, 0) > hi_score) ||
+       (hi_score <= lo_score && ScoreLoROM(true, 0) > lo_score)))
    {
 #ifdef DS2_DMA
       __dcache_writeback_all();
@@ -810,10 +715,11 @@ again:
    //If both vectors are invalid, it's type 1 LoROM
 
    if (Memory.ExtendedFormat == NOPE &&
-       ((Memory.ROM[0x7FFC] | (Memory.ROM[0x7FFD] << 8)) < 0x8000) &&
-       ((Memory.ROM[0xFFFC] | (Memory.ROM[0xFFFD] << 8)) < 0x8000) &&
-       !Settings.ForceInterleaved)
-      S9xDeinterleaveType1(TotalFileSize, Memory.ROM);
+      strncmp ((char *) &Memory.ROM [0], "BANDAI SFC-ADX", 14) &&
+      ((Memory.ROM[0x7FFC] | (Memory.ROM[0x7FFD] << 8)) < 0x8000) &&
+      ((Memory.ROM[0xFFFC] | (Memory.ROM[0xFFFD] << 8)) < 0x8000) &&
+      !Settings.ForceInterleaved)
+     S9xDeinterleaveType1(TotalFileSize, Memory.ROM);
 
    //CalculatedSize is now set, so rescore
    hi_score = ScoreHiROM(false, 0);
@@ -888,18 +794,95 @@ again:
        !Settings.ForceInterleaved &&
        !Settings.ForceInterleaved2 &&
        !Settings.ForceNotInterleaved &&
-       !Settings.ForcePAL &&
        !Settings.ForceSuperFX &&
+       !Settings.ForceNoSuperFX &&
        !Settings.ForceDSP1 &&
+       !Settings.ForceNoDSP1 &&
        !Settings.ForceSA1 &&
+       !Settings.ForceNoSA1 &&
        !Settings.ForceC4 &&
-       !Settings.ForceSDD1)
+       !Settings.ForceNoC4 &&
+       !Settings.ForceSDD1 &&
+       !Settings.ForceNoSDD1 &&
+       !Settings.ForceInterleaveGD24)
    {
-      if (strncmp((char*) &Memory.ROM [0x7fc0], "YUYU NO QUIZ DE GO!GO!", 22) == 0)
+      /* スーファミターボ BIOS読み込み */
+      if ((strncmp((char*) &Memory.ROM [0], "BANDAI SFC-ADX", 14) == 0) &&
+          !(strncmp((char*) &Memory.ROM [0x10], "SFC-ADX BACKUP", 14) == 0))
       {
          Memory.LoROM = true;
          Memory.HiROM = false;
          Interleaved = false;
+         Tales = false;
+      }
+      else if (strncmp ((char *) &Memory.ROM [0x7fc0], "YUYU NO QUIZ DE GO!GO!", 22) == 0 ||
+               strncmp ((char *) &Memory.ROM [0x7fc0], "SP MOMOTAROU DENTETSU2", 22) == 0 ||
+               strncmp ((char *) &Memory.ROM [0x7fc0], "SUPER FORMATION SOCCE", 21) == 0)
+      {
+         Memory.LoROM = true;
+         Memory.HiROM = false;
+         Interleaved = false;
+      }
+      /* BS Zooっと麻雀 */
+      else if ((strncmp ((char *) &Memory.ROM [0xffc0], "Ｚｏｏっと麻雀！", 16) == 0)||
+               (strncmp ((char *) &Memory.ROM [0xffc0], "Zooっと麻雀!IVT", 15) == 0))
+      {
+         Memory.LoROM = false;
+         Memory.HiROM = true;
+      }
+      /* 再BS探偵倶楽部 */
+      else if (strncmp ((char *) &Memory.ROM [0xffc0], "再BS探偵倶楽部", 14) == 0)
+      {
+         Memory.LoROM = false;
+         Memory.HiROM = true;
+      }
+      /* BATMAN--REVENGE JOKER (USA) */
+      else if (strncmp ((char *) &Memory.ROM [0xffc0], "BATMAN--REVENGE JOKER", 21) == 0)
+      {
+         Memory.LoROM = true;
+         Memory.HiROM = false;
+         Interleaved = true;
+      }
+      /* THE DUEL: TEST DRIVE */
+      else if (strncmp ((char *) &Memory.ROM [0x7fc0], "THE DUEL: TEST DRIVE", 20) == 0)
+      {
+         Memory.LoROM = true;
+         Memory.HiROM = false;
+         Interleaved = false;
+      }
+      /* ポパイ いじわる魔女シーハッグの巻 */
+      else if (strncmp ((char *) &Memory.ROM [0x7fc0], "POPEYE IJIWARU MAJO", 19) == 0)
+      {
+         Memory.LoROM = true;
+         Memory.HiROM = false;
+         Interleaved = false;
+      }
+      /* Pop'nツインビー サンプル版 */
+      else if(strncmp ((char *) &Memory.ROM [0x7fc0], "POPN TWINBEE", 12) == 0)
+      {
+         Memory.LoROM = true;
+         Memory.HiROM = false;
+         Interleaved = false;
+      }
+      /* Mario Early Years: Fun with Numbers */
+      else if ((strncmp ((char *) &Memory.ROM [0x7fc0], "MEY Fun with Numbers", 20) == 0))
+      {
+         int32_t i;
+         for (i = 0x87fc0; i < 0x87fe0; i++)
+            Memory.ROM [i] = 0;
+      }
+      else if(Memory.CalculatedSize == 0x100000 && strncmp ((char *) &Memory.ROM [0xffc0], "WWF SUPER WRESTLEMANIA", 22) == 0)
+      {
+         int32_t cvcount;
+         memcpy(&Memory.ROM[0x100000], Memory.ROM, 0x100000);
+         for(cvcount = 0; cvcount < 16; cvcount++)
+         {
+            memcpy(&Memory.ROM[0x8000 * cvcount], &Memory.ROM[0x10000 * cvcount + 0x100000 + 0x8000], 0x8000);
+            memcpy(&Memory.ROM[0x8000 * cvcount + 0x80000], &Memory.ROM[0x10000 * cvcount + 0x100000], 0x8000);
+         }
+         Memory.LoROM = true;
+         Memory.HiROM = false;
+         memset(&Memory.ROM[Memory.CalculatedSize], 0, MAX_ROM_SIZE - Memory.CalculatedSize);
       }
    }
 
@@ -976,7 +959,7 @@ again:
 }
 
 /* compatibility wrapper */
-void S9xDeinterleaveMode2(void)
+void S9xDeinterleaveMode2()
 {
    S9xDeinterleaveType2(true);
 }
@@ -1061,15 +1044,6 @@ void S9xDeinterleaveType2(bool reset)
    }
 }
 
-//CRC32 for char arrays
-uint32_t caCRC32(uint8_t* array, uint32_t size, uint32_t crc32)
-{
-   uint32_t i;
-   for (i = 0; i < size; i++)
-      crc32 = ((crc32 >> 8) & 0x00FFFFFF) ^ crc32Table[(crc32 ^ array[i]) & 0xFF];
-   return ~crc32;
-}
-
 void InitROM(bool Interleaved)
 {
    SuperFX.nRomBanks = Memory.CalculatedSize >> 15;
@@ -1078,6 +1052,7 @@ void InitROM(bool Interleaved)
    Settings.SuperScopeMaster = Settings.SuperScope;
    Settings.DSP1Master = Settings.ForceDSP1;
    Settings.SuperFX = false;
+   Settings.DSP = 0;
    Settings.SA1 = false;
    Settings.C4 = false;
    Settings.SDD1 = false;
@@ -1101,7 +1076,7 @@ void InitROM(bool Interleaved)
 
    if (!Settings.BS)
    {
-      Settings.BS = (-1 != is_bsx(Memory.ROM + 0x7FC0));
+      Settings.BS = is_bsx(Memory.ROM + 0x7FC0);
 
       if (Settings.BS)
       {
@@ -1110,7 +1085,7 @@ void InitROM(bool Interleaved)
       }
       else
       {
-         Settings.BS = (-1 != is_bsx(Memory.ROM + 0xFFC0));
+         Settings.BS = is_bsx(Memory.ROM + 0xFFC0);
          if (Settings.BS)
          {
             Memory.HiROM = true;
@@ -1127,9 +1102,52 @@ void InitROM(bool Interleaved)
 
    ParseSNESHeader(RomHeader);
 
-   // Try to auto-detect the DSP1 chip
-   if (!Settings.ForceNoDSP1 &&
-         (Memory.ROMType & 0xf) >= 3 && (Memory.ROMType & 0xf0) == 0)
+   //// Detect and initialize chips
+   //// detection codes are compatible with NSRT
+
+   // DSP1/2/3/4
+   if (Memory.ROMType == 0x03)
+   {
+      if (Memory.ROMSpeed == 0x30)
+         Settings.DSP = 4; // DSP4
+      else
+         Settings.DSP = 1; // DSP1
+   }
+   else if (Memory.ROMType == 0x05)
+   {
+      if (Memory.ROMSpeed == 0x20)
+         Settings.DSP = 2; // DSP2
+      else if (Memory.ROMSpeed == 0x30 && RomHeader[0x2a] == 0xb2)
+         Settings.DSP = 3; // DSP3
+      else
+         Settings.DSP = 1; // DSP1
+   }
+
+   switch (Settings.DSP)
+   {
+      case 1: // DSP1
+         SetDSP = &DSP1SetByte;
+         GetDSP = &DSP1GetByte;
+         break;
+      case 2: // DSP2
+         SetDSP = &DSP2SetByte;
+         GetDSP = &DSP2GetByte;
+         break;
+      case 3: // DSP3
+         //SetDSP = &DSP3SetByte;
+         //GetDSP = &DSP3GetByte;
+         break;
+      case 4: // DSP4
+         SetDSP = &DSP4SetByte;
+         GetDSP = &DSP4GetByte;
+         break;
+      default:
+         SetDSP = NULL;
+         GetDSP = NULL;
+         break;
+   }
+
+   if(!Settings.ForceNoDSP1 && Settings.DSP)
       Settings.DSP1Master = true;
 
    if (Memory.HiROM)
@@ -1145,7 +1163,7 @@ void InitROM(bool Interleaved)
       }
 
       if (Settings.BS)
-         BSHiROMMap();
+         BSLoROMMap();
       else if (Settings.SPC7110)
          SPC7110HiROMMap();
       else if ((Memory.ROMSpeed & ~0x10) == 0x25)
@@ -1167,6 +1185,15 @@ void InitROM(bool Interleaved)
       if ((Memory.ROMType & 0xf0) == 0x10)
          Settings.SuperFX = !Settings.ForceNoSuperFX;
 
+      //OBC1 hack ROM
+      if (strncmp(Memory.ROMName, "METAL COMBAT", 12) == 0 &&
+          Memory.ROMType == 0x13 && Memory.ROMSpeed == 0x42)
+      {
+         Settings.OBC1 = true;
+         Settings.SuperFX = Settings.ForceSuperFX;
+         Memory.ROMSpeed = 0x30;
+      }
+
       Settings.SDD1 = Settings.ForceSDD1;
       if ((Memory.ROMType & 0xf0) == 0x40)
          Settings.SDD1 = !Settings.ForceNoSDD1;
@@ -1191,10 +1218,7 @@ void InitROM(bool Interleaved)
             }
          }
          else
-         {
             Settings.SETA = ST_018;
-            Memory.SRAMSize = 2;
-         }
       }
       Settings.C4 = Settings.ForceC4;
       if ((Memory.ROMType & 0xf0) == 0xf0 &&
@@ -1239,18 +1263,34 @@ void InitROM(bool Interleaved)
          SRAM512KLoROMMap();
          Settings.DSP1Master = false;
       }
+      else if (strncmp((char*) &Memory.ROM [0x7fc0], "DEZAEMON  ", 10) == 0)
+      {
+         SRAM1024KLoROMMap();
+         Settings.DSP1Master = false;
+      }
       else if (strncmp((char*) &Memory.ROM [0x7fc0], "ADD-ON BASE CASSETE", 19) == 0)
       {
+         strncpy(Memory.ROMName, (char *) &Memory.ROM[0x100010], ROM_NAME_LEN - 1);
          Settings.MultiPlayer5Master = false;
          Settings.MouseMaster = false;
          Settings.SuperScopeMaster = false;
          Settings.DSP1Master = false;
+         Memory.SRAMSize = 5;
          SufamiTurboLoROMMap();
-         Memory.SRAMSize = 3;
       }
+      else if ((strncmp((char *) &Memory.ROM [0x7fc0], "ROCKMAN X  ", 11) == 0)||
+               (strncmp((char *) &Memory.ROM [0x7fc0], "MEGAMAN X  ", 11) == 0)||
+               (strncmp((char *) &Memory.ROM [0x7fc0], "demon's blazon", 14) == 0)||
+               (strncmp((char *) &Memory.ROM [0x7fc0], "demon's crest", 13) == 0))
+         CapcomProtectLoROMMap();
       else if ((Memory.ROMSpeed & ~0x10) == 0x22 &&
                strncmp(Memory.ROMName, "Super Street Fighter", 20) != 0)
          AlphaROMMap();
+      else if (strncmp ((char *) &Memory.ROM [0x7fc0], "HITOMI3", 7) == 0)
+      {
+         Memory.SRAMSize = 3;
+         LoROMMap();
+      }
       else if (Settings.BS)
          BSLoROMMap();
       else
@@ -1299,8 +1339,6 @@ void InitROM(bool Interleaved)
       sum1 &= 0xffff;
       Memory.CalculatedChecksum = sum1;
    }
-   //now take a CRC32
-   Memory.ROMCRC32 = caCRC32(Memory.ROM, Memory.CalculatedSize, 0xFFFFFFFF);
 
    if (Settings.ForceNTSC)
       Settings.PAL = false;
@@ -1348,10 +1386,6 @@ void InitROM(bool Interleaved)
    IAPU.OneCycle = ONE_APU_CYCLE;
 #endif
    Settings.Shutdown = Settings.ShutdownMaster;
-
-   SetDSP = &DSP1SetByte;
-   GetDSP = &DSP1GetByte;
-
    ResetSpeedMap();
    ApplyROMFixes();
    sprintf(Memory.ROMName, "%s", Safe(Memory.ROMName));
@@ -1359,7 +1393,7 @@ void InitROM(bool Interleaved)
    sprintf(Memory.CompanyId, "%s", Safe(Memory.CompanyId));
 
    sprintf(String,
-           "\"%s\" [%s] %s, %s, Type: %s, Mode: %s, TV: %s, S-RAM: %s, ROMId: %s Company: %2.2s CRC32: %08X",
+           "\"%s\" [%s] %s, %s, Type: %s, Mode: %s, TV: %s, S-RAM: %s, ROMId: %s Company: %2.2s",
            Memory.ROMName,
            (Memory.ROMChecksum + Memory.ROMComplementChecksum != 0xffff ||
             Memory.ROMChecksum != Memory.CalculatedChecksum) ? "bad checksum" : "checksum ok",
@@ -1370,8 +1404,7 @@ void InitROM(bool Interleaved)
            TVStandard(),
            StaticRAMSize(),
            Memory.ROMId,
-           Memory.CompanyId,
-           Memory.ROMCRC32);
+           Memory.CompanyId);
 
    S9xMessage(String);
    Settings.ForceHeader = Settings.ForceHiROM = Settings.ForceLoROM =
@@ -1406,6 +1439,42 @@ void ResetSpeedMap()
    FixROMSpeed();
 }
 
+void map_space(uint32_t bank_s, uint32_t bank_e, uint32_t addr_s, uint32_t addr_e, uint8_t *data)
+{
+   uint32_t c, i, p;
+
+   for (c = bank_s; c <= bank_e; c++)
+   {
+      for (i = addr_s; i <= addr_e; i += 0x1000)
+      {
+         p = (c << 4) | (i >> 12);
+         Memory.Map[p] = data;
+         Memory.BlockIsROM[p] = false;
+         Memory.BlockIsRAM[p] = true;
+      }
+   }
+}
+
+void map_index(uint32_t bank_s, uint32_t bank_e, uint32_t addr_s, uint32_t addr_e, intptr_t index, int32_t type)
+{
+   uint32_t c, i, p;
+   bool isROM, isRAM;
+
+   isROM = !((type == MAP_TYPE_I_O) || (type == MAP_TYPE_RAM));
+   isRAM = !((type == MAP_TYPE_I_O) || (type == MAP_TYPE_ROM));
+
+   for (c = bank_s; c <= bank_e; c++)
+   {
+      for (i = addr_s; i <= addr_e; i += 0x1000)
+      {
+         p = (c << 4) | (i >> 12);
+         Memory.Map[p] = (uint8_t*) index;
+         Memory.BlockIsROM[p] = isROM;
+         Memory.BlockIsRAM[p] = isRAM;
+      }
+   }
+}
+
 void WriteProtectROM()
 {
    // memmove converted: Different mallocs [Neb]
@@ -1422,25 +1491,38 @@ void MapRAM()
 
    if (Memory.LoROM && !Settings.SDD1)
    {
-      // Banks 70->77, S-RAM
+      // Banks 70->7d and f0->fe 0x0000-0x7FFF, S-RAM
       for (c = 0; c < 0x0f; c++)
       {
          for (i = 0; i < 8; i++)
          {
-            Memory.Map [(c << 4) + 0xF00 + i] = Memory.Map [(c << 4) + 0x700 + i] = (uint8_t*) MAP_LOROM_SRAM;
+            Memory.Map [(c << 4) + 0xF00 + i] = Memory.Map [(c << 4) + 0x700 + i] = MAP_LOROM_SRAM_OR_NONE;
             Memory.BlockIsRAM [(c << 4) + 0xF00 + i] = Memory.BlockIsRAM [(c << 4) + 0x700 + i] = true;
             Memory.BlockIsROM [(c << 4) + 0xF00 + i] = Memory.BlockIsROM [(c << 4) + 0x700 + i] = false;
          }
       }
+      if(Memory.CalculatedSize <= 0x200000)
+      {
+         // Banks 70->7d 0x8000-0xffff S-RAM
+         for (c = 0; c < 0x0e; c++)
+         {
+            for(i = 8; i < 16; i++)
+            {
+               Memory.Map [(c << 4) + 0x700 + i] = MAP_LOROM_SRAM_OR_NONE;
+               Memory.BlockIsRAM [(c << 4) + 0x700 + i] = true;
+               Memory.BlockIsROM [(c << 4) + 0x700 + i] = false;
+            }
+         }
+      }
    }
-   else if (Memory.LoROM && Settings.SDD1)
+   else if(Memory.LoROM && Settings.SDD1)
    {
-      // Banks 70->77, S-RAM
+      // Banks 70->7d 0x0000-0x7FFF, S-RAM
       for (c = 0; c < 0x0f; c++)
       {
          for (i = 0; i < 8; i++)
          {
-            Memory.Map [(c << 4) + 0x700 + i] = (uint8_t*) MAP_LOROM_SRAM;
+            Memory.Map [(c << 4) + 0x700 + i] = MAP_LOROM_SRAM_OR_NONE;
             Memory.BlockIsRAM [(c << 4) + 0x700 + i] = true;
             Memory.BlockIsROM [(c << 4) + 0x700 + i] = false;
          }
@@ -1497,43 +1579,6 @@ void LoROMMap()
 {
    int32_t c;
    int32_t i;
-   int32_t j;
-   int32_t mask[4];
-   for (j = 0; j < 4; j++)
-      mask[j] = 0x00ff;
-
-   mask[0] = (Memory.CalculatedSize / 0x8000) - 1;
-
-   int32_t x;
-   bool foundZeros;
-   bool pastZeros;
-
-   for (j = 0; j < 3; j++)
-   {
-      x = 1;
-      foundZeros = false;
-      pastZeros = false;
-
-      mask[j + 1] = mask[j];
-
-      while (x > 0x100 && !pastZeros)
-      {
-         if (mask[j]&x)
-         {
-            x <<= 1;
-            if (foundZeros)
-               pastZeros = true;
-         }
-         else
-         {
-            foundZeros = true;
-            pastZeros = false;
-            mask[j + 1] |= x;
-            x <<= 1;
-         }
-      }
-   }
-
 
    // Banks 00->3f and 80->bf
    for (c = 0; c < 0x400; c += 16)
@@ -1546,20 +1591,16 @@ void LoROMMap()
       Memory.Map [c + 2] = Memory.Map [c + 0x802] = (uint8_t*) MAP_PPU;
       if (Settings.SETA == ST_018)
          Memory.Map [c + 3] = Memory.Map [c + 0x803] = (uint8_t*) MAP_SETA_RISC;
-      else Memory.Map [c + 3] = Memory.Map [c + 0x803] = (uint8_t*) MAP_PPU;
+      else
+         Memory.Map [c + 3] = Memory.Map [c + 0x803] = (uint8_t*) MAP_PPU;
       Memory.Map [c + 4] = Memory.Map [c + 0x804] = (uint8_t*) MAP_CPU;
       Memory.Map [c + 5] = Memory.Map [c + 0x805] = (uint8_t*) MAP_CPU;
-      if (Settings.DSP1Master)
-      {
-         Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) MAP_DSP;
-         Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_DSP;
-      }
-      else if (Settings.C4)
+      if (Settings.C4)
       {
          Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) MAP_C4;
          Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_C4;
       }
-      else if (Settings.OBC1)
+      else if(Settings.OBC1)
       {
          Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) MAP_OBC_RAM;
          Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_OBC_RAM;
@@ -1572,31 +1613,11 @@ void LoROMMap()
 
       for (i = c + 8; i < c + 16; i++)
       {
-         int32_t e = 3;
-         int32_t d = c >> 4;
-         while (d > mask[0])
-         {
-            d &= mask[e];
-            e--;
-         }
-         Memory.Map [i] = Memory.Map [i + 0x800] = Memory.ROM + (((d) - 1) * 0x8000);
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
 
-   if (Settings.DSP1Master)
-   {
-      // Banks 30->3f and b0->bf
-      for (c = 0x300; c < 0x400; c += 16)
-      {
-         for (i = c + 8; i < c + 16; i++)
-         {
-            Memory.Map [i] = Memory.Map [i + 0x800] = (uint8_t*) MAP_DSP;
-            Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = false;
-         }
-      }
-   }
-
    // Banks 40->7f and c0->ff
    for (c = 0; c < 0x400; c += 16)
    {
@@ -1604,93 +1625,63 @@ void LoROMMap()
          Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) % Memory.CalculatedSize];
 
       for (i = c + 8; i < c + 16; i++)
-      {
-         int32_t e = 3;
-         int32_t d = (c + 0x400) >> 4;
-         while (d > mask[0])
-         {
-            d &= mask[e];
-            e--;
-         }
-
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = Memory.ROM + (((d) - 1) * 0x8000);
-      }
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize] - 0x8000;
 
       for (i = c; i < c + 16; i++)
          Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
    }
 
-   if (Settings.DSP1Master)
-   {
-      for (c = 0; c < 0x100; c++)
-      {
-         Memory.Map [c + 0xe00] = (uint8_t*) MAP_DSP;
-         Memory.BlockIsROM [c + 0xe00] = false;
-      }
-   }
-
-   int32_t sum = 0, k, l, bankcount;
-   bankcount = 1 << (Memory.ROMSize - 7); //Mbits
-
-   //safety for corrupt headers
-   if (bankcount > 128)
-      bankcount = (Memory.CalculatedSize / 0x8000) / 4;
-   bankcount *= 4; //to banks
-   bankcount <<= 4; //Map banks
-   bankcount += 0x800; //normalize
-   for (k = 0x800; k < (bankcount); k += 16)
-   {
-      uint8_t* bank = 0x8000 + Memory.Map[k + 8];
-      for (l = 0; l < 0x8000; l++)
-         sum += bank[l];
-   }
-   Memory.CalculatedChecksum = sum & 0xFFFF;
+   if (Settings.DSP)
+      DSPMap();
 
    MapRAM();
    WriteProtectROM();
 }
 
-void SetaDSPMap()
+void DSPMap()
 {
-   int32_t c;
-   int32_t i;
-   int32_t j;
-   int32_t mask[4];
-   for (j = 0; j < 4; j++)
-      mask[j] = 0x00ff;
-
-   mask[0] = (Memory.CalculatedSize / 0x8000) - 1;
-
-   int32_t x;
-   bool foundZeros;
-   bool pastZeros;
-
-   for (j = 0; j < 3; j++)
+   switch (Settings.DSP)
    {
-      x = 1;
-      foundZeros = false;
-      pastZeros = false;
-
-      mask[j + 1] = mask[j];
-
-      while (x > 0x100 && !pastZeros)
-      {
-         if (mask[j]&x)
+      case 1:
+         if (Memory.HiROM)
+         {
+            map_index(0x00, 0x1f, 0x6000, 0x7fff, MAP_DSP, MAP_TYPE_I_O);
+            map_index(0x80, 0x9f, 0x6000, 0x7fff, MAP_DSP, MAP_TYPE_I_O);
+            break;
+         }
+         else if (Memory.CalculatedSize > 0x100000)
          {
-            x <<= 1;
-            if (foundZeros)
-               pastZeros = true;
+            map_index(0x60, 0x6f, 0x0000, 0x7fff, MAP_DSP, MAP_TYPE_I_O);
+            map_index(0xe0, 0xef, 0x0000, 0x7fff, MAP_DSP, MAP_TYPE_I_O);
+            break;
          }
          else
          {
-            foundZeros = true;
-            pastZeros = false;
-            mask[j + 1] |= x;
-            x <<= 1;
+            map_index(0x20, 0x3f, 0x8000, 0xffff, MAP_DSP, MAP_TYPE_I_O);
+            map_index(0xa0, 0xbf, 0x8000, 0xffff, MAP_DSP, MAP_TYPE_I_O);
+            break;
          }
-      }
+      case 2:
+         map_index(0x20, 0x3f, 0x6000, 0x6fff, MAP_DSP, MAP_TYPE_I_O);
+         map_index(0x20, 0x3f, 0x8000, 0xbfff, MAP_DSP, MAP_TYPE_I_O);
+         map_index(0xa0, 0xbf, 0x6000, 0x6fff, MAP_DSP, MAP_TYPE_I_O);
+         map_index(0xa0, 0xbf, 0x8000, 0xbfff, MAP_DSP, MAP_TYPE_I_O);
+         break;
+      case 3:
+         map_index(0x20, 0x3f, 0x8000, 0xffff, MAP_DSP, MAP_TYPE_I_O);
+         map_index(0xa0, 0xbf, 0x8000, 0xffff, MAP_DSP, MAP_TYPE_I_O);
+         break;
+      case 4:
+         map_index(0x30, 0x3f, 0x8000, 0xffff, MAP_DSP, MAP_TYPE_I_O);
+         map_index(0xb0, 0xbf, 0x8000, 0xffff, MAP_DSP, MAP_TYPE_I_O);
+         break;
    }
+}
 
+void SetaDSPMap()
+{
+   int32_t c;
+   int32_t i;
 
    // Banks 00->3f and 80->bf
    for (c = 0; c < 0x400; c += 16)
@@ -1709,14 +1700,7 @@ void SetaDSPMap()
 
       for (i = c + 8; i < c + 16; i++)
       {
-         int32_t e = 3;
-         int32_t d = c >> 4;
-         while (d > mask[0])
-         {
-            d &= mask[e];
-            e--;
-         }
-         Memory.Map [i] = Memory.Map [i + 0x800] = Memory.ROM + (((d) - 1) * 0x8000);
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
@@ -1725,17 +1709,7 @@ void SetaDSPMap()
    for (c = 0; c < 0x400; c += 16)
    {
       for (i = c + 8; i < c + 16; i++)
-      {
-         int32_t e = 3;
-         int32_t d = (c + 0x400) >> 4;
-         while (d > mask[0])
-         {
-            d &= mask[e];
-            e--;
-         }
-
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = Memory.ROM + (((d) - 1) * 0x8000);
-      }
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize] - 0x8000;
 
       //only upper half is ROM
       for (i = c + 8; i < c + 16; i++)
@@ -1762,22 +1736,6 @@ void SetaDSPMap()
       }
    }
 
-   int32_t sum = 0, k, l, bankcount;
-   bankcount = 1 << (Memory.ROMSize - 7); //Mbits
-   //safety for corrupt headers
-   if (bankcount > 128)
-      bankcount = (Memory.CalculatedSize / 0x8000) / 4;
-   bankcount *= 4; //to banks
-   bankcount <<= 4; //Map banks
-   bankcount += 0x800; //normalize
-   for (k = 0x800; k < (bankcount); k += 16)
-   {
-      uint8_t* bank = 0x8000 + Memory.Map[k + 8];
-      for (l = 0; l < 0x8000; l++)
-         sum += bank[l];
-   }
-   Memory.CalculatedChecksum = sum & 0xFFFF;
-
    MapRAM();
    WriteProtectROM();
 }
@@ -1810,15 +1768,14 @@ void BSLoROMMap()
       Memory.BlockIsRAM [c + 7] = Memory.BlockIsRAM [c + 0x807] = true;
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) %
-                          Memory.CalculatedSize] - 0x8000;
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
 
    for (c = 0; c < 8; c++)
    {
-      Memory.Map[(c << 4) + 0x105] = (uint8_t*)MAP_LOROM_SRAM;
+      Memory.Map[(c << 4) + 0x105] = MAP_LOROM_SRAM_OR_NONE;
       Memory.BlockIsROM [(c << 4) + 0x105] = false;
       Memory.BlockIsRAM [(c << 4) + 0x105] = true;
    }
@@ -1827,7 +1784,7 @@ void BSLoROMMap()
    {
       for (i = 0; i < 16; i++)
       {
-         Memory.Map[0x400 + i + (c << 4)] = (uint8_t*)MAP_LOROM_SRAM;
+         Memory.Map[0x400 + i + (c << 4)] = MAP_LOROM_SRAM_OR_NONE;
          Memory.BlockIsRAM[0x400 + i + (c << 4)] = true;
          Memory.BlockIsROM[0x400 + i + (c << 4)] = false;
       }
@@ -1864,43 +1821,6 @@ void HiROMMap()
 {
    int32_t i;
    int32_t c;
-   int32_t j;
-
-   int32_t mask[4];
-   for (j = 0; j < 4; j++)
-      mask[j] = 0x00ff;
-
-   mask[0] = (Memory.CalculatedSize / 0x10000) - 1;
-
-   int32_t x;
-   bool foundZeros;
-   bool pastZeros;
-
-   for (j = 0; j < 3; j++)
-   {
-      x = 1;
-      foundZeros = false;
-      pastZeros = false;
-
-      mask[j + 1] = mask[j];
-
-      while (x > 0x100 && !pastZeros)
-      {
-         if (mask[j]&x)
-         {
-            x <<= 1;
-            if (foundZeros)
-               pastZeros = true;
-         }
-         else
-         {
-            foundZeros = true;
-            pastZeros = false;
-            mask[j + 1] |= x;
-            x <<= 1;
-         }
-      }
-   }
 
    // Banks 00->3f and 80->bf
    for (c = 0; c < 0x400; c += 16)
@@ -1914,28 +1834,12 @@ void HiROMMap()
       Memory.Map [c + 3] = Memory.Map [c + 0x803] = (uint8_t*) MAP_PPU;
       Memory.Map [c + 4] = Memory.Map [c + 0x804] = (uint8_t*) MAP_CPU;
       Memory.Map [c + 5] = Memory.Map [c + 0x805] = (uint8_t*) MAP_CPU;
-
-      if (Settings.DSP1Master)
-      {
-         Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) MAP_DSP;
-         Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_DSP;
-      }
-      else
-      {
-         Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) MAP_NONE;
-         Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_NONE;
-      }
+      Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) MAP_NONE;
+      Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_NONE;
 
       for (i = c + 8; i < c + 16; i++)
       {
-         int32_t e = 3;
-         int32_t d = c >> 4;
-         while (d > mask[0])
-         {
-            d &= mask[e];
-            e--;
-         }
-         Memory.Map [i] = Memory.Map [i + 0x800] = Memory.ROM + (d * 0x10000);
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 12) % Memory.CalculatedSize];
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
@@ -1943,10 +1847,10 @@ void HiROMMap()
    // Banks 30->3f and b0->bf, address ranges 6000->7fff is S-RAM.
    for (c = 0; c < 16; c++)
    {
-      Memory.Map [0x306 + (c << 4)] = (uint8_t*) MAP_HIROM_SRAM;
-      Memory.Map [0x307 + (c << 4)] = (uint8_t*) MAP_HIROM_SRAM;
-      Memory.Map [0xb06 + (c << 4)] = (uint8_t*) MAP_HIROM_SRAM;
-      Memory.Map [0xb07 + (c << 4)] = (uint8_t*) MAP_HIROM_SRAM;
+      Memory.Map [0x306 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map [0x307 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map [0xb06 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map [0xb07 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
       Memory.BlockIsRAM [0x306 + (c << 4)] = true;
       Memory.BlockIsRAM [0x307 + (c << 4)] = true;
       Memory.BlockIsRAM [0xb06 + (c << 4)] = true;
@@ -1958,30 +1862,13 @@ void HiROMMap()
    {
       for (i = c; i < c + 16; i++)
       {
-         int32_t e = 3;
-         int32_t d = (c) >> 4;
-         while (d > mask[0])
-         {
-            d &= mask[e];
-            e--;
-         }
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = Memory.ROM + (d * 0x10000);
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 12) % Memory.CalculatedSize];
          Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
       }
    }
 
-   int32_t bankmax = 0x40 + (1 << (Memory.ROMSize - 6));
-   //safety for corrupt headers
-   if (bankmax > 128)
-      bankmax = 0x80;
-   int32_t sum = 0;
-   for (i = 0x40; i < bankmax; i++)
-   {
-      uint8_t* bank_low = (uint8_t*)Memory.Map[i << 4];
-      for (c = 0; c < 0x10000; c++)
-         sum += bank_low[c];
-   }
-   Memory.CalculatedChecksum = sum & 0xFFFF;
+   if (Settings.DSP)
+      DSPMap();
 
    MapRAM();
    WriteProtectROM();
@@ -1991,6 +1878,7 @@ void TalesROMMap(bool Interleaved)
 {
    int32_t c;
    int32_t i;
+
    uint32_t OFFSET0 = 0x400000;
    uint32_t OFFSET1 = 0x400000;
    uint32_t OFFSET2 = 0x000000;
@@ -2019,8 +1907,8 @@ void TalesROMMap(bool Interleaved)
       //ToP seems to use sram to skip intro???
       if (c >= 0x300)
       {
-         Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) MAP_HIROM_SRAM;
-         Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_HIROM_SRAM;
+         Memory.Map [c + 6] = Memory.Map [c + 0x806] = MAP_HIROM_SRAM_OR_NONE;
+         Memory.Map [c + 7] = Memory.Map [c + 0x807] = MAP_HIROM_SRAM_OR_NONE;
          Memory.BlockIsRAM [6 + c] = Memory.BlockIsRAM [7 + c] =
                                      Memory.BlockIsRAM [0x806 + c] = Memory.BlockIsRAM [0x807 + c] = true;
       }
@@ -2099,7 +1987,7 @@ void AlphaROMMap()
 
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [c << 11] - 0x8000;
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = true;
       }
    }
@@ -2124,13 +2012,10 @@ void DetectSuperFxRamSize()
 {
    if (Memory.ROM[0x7FDA] == 0x33)
       Memory.SRAMSize = Memory.ROM[0x7FBD];
+   else if (strncmp(Memory.ROMName, "STAR FOX 2", 10) == 0)
+      Memory.SRAMSize = 6;
    else
-   {
-      if (strncmp(Memory.ROMName, "STAR FOX 2", 10) == 0)
-         Memory.SRAMSize = 6;
-      else
-         Memory.SRAMSize = 5;
-   }
+      Memory.SRAMSize = 5;
 }
 
 void SuperFXROMMap()
@@ -2158,7 +2043,7 @@ void SuperFXROMMap()
 
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [c << 11] - 0x8000;
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
@@ -2240,7 +2125,7 @@ void SA1ROMMap()
       Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_BWRAM;
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [c << 11] - 0x8000;
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
@@ -2320,7 +2205,7 @@ void LoROM24MBSMap()
 
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [c << 11] - 0x8000;
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
@@ -2342,7 +2227,7 @@ void LoROM24MBSMap()
 
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i + 0x800] = &Memory.ROM [c << 11] - 0x8000 + 0x200000;
+         Memory.Map [i + 0x800] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i + 0x800] = true;
       }
    }
@@ -2351,10 +2236,10 @@ void LoROM24MBSMap()
    for (c = 0; c < 0x400; c += 16)
    {
       for (i = c; i < c + 8; i++)
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) + 0x200000];
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize];
 
       for (i = c + 8; i < c + 16; i++)
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) + 0x200000 - 0x8000];
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize] - 0x8000;
 
       for (i = c; i < c + 16; i++)
          Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
@@ -2394,10 +2279,10 @@ void SufamiTurboLoROMMap()
    for (c = 0; c < 0x400; c += 16)
    {
       for (i = c; i < c + 8; i++)
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) + 0x200000];
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize];
 
       for (i = c + 8; i < c + 16; i++)
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) + 0x200000 - 0x8000];
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize] - 0x8000;
 
       for (i = c; i < c + 16; i++)
          Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
@@ -2426,7 +2311,7 @@ void SufamiTurboLoROMMap()
    // Banks 60->67, S-RAM
    for (c = 0; c < 0x80; c++)
    {
-      Memory.Map [c + 0x600] = (uint8_t*) MAP_LOROM_SRAM;
+      Memory.Map [c + 0x600] = MAP_LOROM_SRAM_OR_NONE;
       Memory.BlockIsRAM [c + 0x600] = true;
       Memory.BlockIsROM [c + 0x600] = false;
    }
@@ -2455,7 +2340,7 @@ void SRAM512KLoROMMap()
       Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) MAP_NONE;
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [c << 11] - 0x8000;
+         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
          Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
       }
    }
@@ -2464,10 +2349,10 @@ void SRAM512KLoROMMap()
    for (c = 0; c < 0x400; c += 16)
    {
       for (i = c; i < c + 8; i++)
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) + 0x200000];
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize];
 
       for (i = c + 8; i < c + 16; i++)
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) + 0x200000 - 0x8000];
+         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [((c << 11) + 0x200000) % Memory.CalculatedSize] - 0x8000;
 
       for (i = c; i < c + 16; i++)
          Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
@@ -2477,78 +2362,61 @@ void SRAM512KLoROMMap()
    WriteProtectROM();
 }
 
-void BSHiROMMap()
+void SRAM1024KLoROMMap()
 {
    int32_t c;
    int32_t i;
 
-   Memory.SRAMSize = 5;
-
    // Banks 00->3f and 80->bf
    for (c = 0; c < 0x400; c += 16)
    {
       Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.RAM;
-      Memory.BlockIsRAM [c + 0] = Memory.BlockIsRAM [c + 0x800] = true;
       Memory.Map [c + 1] = Memory.Map [c + 0x801] = Memory.RAM;
-      Memory.BlockIsRAM [c + 1] = Memory.BlockIsRAM [c + 0x801] = true;
-
-      Memory.Map [c + 2] = Memory.Map [c + 0x802] = (uint8_t*) MAP_PPU;
-      Memory.Map [c + 3] = Memory.Map [c + 0x803] = (uint8_t*) MAP_PPU;
-      Memory.Map [c + 4] = Memory.Map [c + 0x804] = (uint8_t*) MAP_CPU;
-      // XXX: How large is SRAM??
-      Memory.Map [c + 5] = Memory.Map [c + 0x805] = (uint8_t*) Memory.RAM;
-      Memory.BlockIsRAM [c + 5] = Memory.BlockIsRAM [c + 0x805] = true;
-
-      Memory.Map [c + 6] = Memory.Map [c + 0x806] = (uint8_t*) Memory.RAM;
-      Memory.BlockIsRAM [c + 6] = Memory.BlockIsRAM [c + 0x806] = true;
-      Memory.Map [c + 7] = Memory.Map [c + 0x807] = (uint8_t*) Memory.RAM;
-      Memory.BlockIsRAM [c + 7] = Memory.BlockIsRAM [c + 0x807] = true;
+      Memory.BlockIsRAM [c + 0] = Memory.BlockIsRAM [c + 0x800] = Memory.BlockIsRAM [c + 0x400] = Memory.BlockIsRAM [c + 0xc00] = true;
+      Memory.BlockIsRAM [c + 1] = Memory.BlockIsRAM [c + 0x801] = Memory.BlockIsRAM [c + 0x401] = Memory.BlockIsRAM [c + 0xc01] = true;
+
+      Memory.Map [c + 2] = Memory.Map [c + 0x802] = Memory.Map [c + 0x402] = Memory.Map [c + 0xc02] = (uint8_t*) MAP_PPU;
+      Memory.Map [c + 3] = Memory.Map [c + 0x803] = Memory.Map [c + 0x403] = Memory.Map [c + 0xc03] = (uint8_t*) MAP_PPU;
+      Memory.Map [c + 4] = Memory.Map [c + 0x804] = Memory.Map [c + 0x404] = Memory.Map [c + 0xc04] = (uint8_t*) MAP_CPU;
+      Memory.Map [c + 5] = Memory.Map [c + 0x805] = Memory.Map [c + 0x405] = Memory.Map [c + 0xc05] = (uint8_t*) MAP_CPU;
+      Memory.Map [c + 6] = Memory.Map [c + 0x806] = Memory.Map [c + 0x406] = Memory.Map [c + 0xc06] = (uint8_t*) MAP_NONE;
+      Memory.Map [c + 7] = Memory.Map [c + 0x807] = Memory.Map [c + 0x407] = Memory.Map [c + 0xc07] = (uint8_t*) MAP_NONE;
       for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i] = Memory.Map [i + 0x800] = &Memory.ROM [(c << 12) % Memory.CalculatedSize];
-         Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = true;
+         Memory.Map [i] = Memory.Map [i + 0x800] = Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
+         Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
       }
    }
 
-   // Banks 60->7d offset 0000->7fff & 60->7f offset 8000->ffff PSRAM
-   // XXX: How large is PSRAM?
+   MapExtraRAM();
+   WriteProtectROM();
+}
 
-   //not adjusted, but The Dumper says "4 Mbits"
-   for (c = 0x600; c < 0x7e0; c += 16)
-   {
-      for (i = c; i < c + 8; i++)
-      {
-         Memory.Map [i] = &Memory.ROM [0x400000 + (c << 11)];
-         Memory.BlockIsRAM [i] = true;
-      }
-      for (i = c + 8; i < c + 16; i++)
-      {
-         Memory.Map [i] = &Memory.ROM [0x400000 + (c << 11) - 0x8000];
-         Memory.BlockIsRAM [i] = true;
-      }
-   }
+void CapcomProtectLoROMMap()
+{
+   int32_t c;
+   int32_t i;
 
-   // Banks 40->7f and c0->ff
+   // Banks 00->3f and 80->bf
    for (c = 0; c < 0x400; c += 16)
    {
-      for (i = c; i < c + 16; i++)
+      Memory.Map [c + 0] = Memory.Map [c + 0x800] = Memory.Map [c + 0x400] = Memory.Map [c + 0xc00] = Memory.RAM;
+      Memory.Map [c + 1] = Memory.Map [c + 0x801] = Memory.Map [c + 0x401] = Memory.Map [c + 0xc01] = Memory.RAM;
+      Memory.BlockIsRAM [c + 0] = Memory.BlockIsRAM [c + 0x800] = Memory.BlockIsRAM [c + 0x400] = Memory.BlockIsRAM [c + 0xc00] = true;
+      Memory.BlockIsRAM [c + 1] = Memory.BlockIsRAM [c + 0x801] = Memory.BlockIsRAM [c + 0x401] = Memory.BlockIsRAM [c + 0xc01] = true;
+
+      Memory.Map [c + 2] = Memory.Map [c + 0x802] = Memory.Map [c + 0x402] = Memory.Map [c + 0xc02] = (uint8_t*) MAP_PPU;
+      Memory.Map [c + 3] = Memory.Map [c + 0x803] = Memory.Map [c + 0x403] = Memory.Map [c + 0xc03] = (uint8_t*) MAP_PPU;
+      Memory.Map [c + 4] = Memory.Map [c + 0x804] = Memory.Map [c + 0x404] = Memory.Map [c + 0xc04] = (uint8_t*) MAP_CPU;
+      Memory.Map [c + 5] = Memory.Map [c + 0x805] = Memory.Map [c + 0x405] = Memory.Map [c + 0xc05] = (uint8_t*) MAP_CPU;
+      Memory.Map [c + 6] = Memory.Map [c + 0x806] = Memory.Map [c + 0x406] = Memory.Map [c + 0xc06] = (uint8_t*) MAP_NONE;
+      Memory.Map [c + 7] = Memory.Map [c + 0x807] = Memory.Map [c + 0x407] = Memory.Map [c + 0xc07] = (uint8_t*) MAP_NONE;
+      for (i = c + 8; i < c + 16; i++)
       {
-         Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 12) % Memory.CalculatedSize];
-         Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
+         Memory.Map [i] = Memory.Map [i + 0x800] = Memory.Map [i + 0x400] = Memory.Map [i + 0xc00] = &Memory.ROM [(c << 11) % Memory.CalculatedSize] - 0x8000;
+         Memory.BlockIsROM [i] = Memory.BlockIsROM [i + 0x800] = Memory.BlockIsROM [i + 0x400] = Memory.BlockIsROM [i + 0xc00] = true;
       }
    }
-   for (i = 0; i < 0x80; i++)
-   {
-      Memory.Map[0x700 + i] = &Memory.BSRAM[0x10000 * (i / 16)];
-      Memory.BlockIsRAM[0x700 + i] = true;
-      Memory.BlockIsROM[0x700 + i] = false;
-   }
-   for (i = 0; i < 8; i++)
-   {
-      Memory.Map[0x205 + (i << 4)] = Memory.Map[0x285 + (i << 4)] = Memory.Map[0x305 + (i << 4)] = Memory.Map[0x385 + (i << 4)] = Memory.Map[0x705 + (i << 4)];
-      Memory.BlockIsRAM[0x205 + (i << 4)] = Memory.BlockIsRAM[0x285 + (i << 4)] = Memory.BlockIsRAM[0x305 + (i << 4)] = Memory.BlockIsRAM[0x385 + (i << 4)] = true;
-      Memory.BlockIsROM[0x205 + (i << 4)] = Memory.BlockIsROM[0x285 + (i << 4)] = Memory.BlockIsROM[0x305 + (i << 4)] = Memory.BlockIsROM[0x385 + (i << 4)] = false;
-   }
 
    MapRAM();
    WriteProtectROM();
@@ -2668,8 +2536,8 @@ void SPC7110HiROMMap()
       Memory.Map [c + 4] = Memory.Map [c + 0x804] = (uint8_t*) MAP_CPU;
       Memory.Map [c + 5] = Memory.Map [c + 0x805] = (uint8_t*) MAP_CPU;
 
-      Memory.Map [c + 6] = (uint8_t*) MAP_HIROM_SRAM;
-      Memory.Map [c + 7] = (uint8_t*) MAP_HIROM_SRAM;
+      Memory.Map [c + 6] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map [c + 7] = MAP_HIROM_SRAM_OR_NONE;
       Memory.Map [c + 0x806] = Memory.Map [c + 0x807] = (uint8_t*) MAP_NONE;
 
       for (i = c + 8; i < c + 16; i++)
@@ -2682,8 +2550,8 @@ void SPC7110HiROMMap()
    // Banks 30->3f and b0->bf, address ranges 6000->7fff is S-RAM.
    for (c = 0; c < 16; c++)
    {
-      Memory.Map [0x306 + (c << 4)] = (uint8_t*) MAP_HIROM_SRAM;
-      Memory.Map [0x307 + (c << 4)] = (uint8_t*) MAP_HIROM_SRAM;
+      Memory.Map [0x306 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map [0x307 + (c << 4)] = MAP_HIROM_SRAM_OR_NONE;
       Memory.Map [0xb06 + (c << 4)] = (uint8_t*) MAP_NONE;
       Memory.Map [0xb07 + (c << 4)] = (uint8_t*) MAP_NONE;
       Memory.BlockIsRAM [0x306 + (c << 4)] = true;
@@ -2732,17 +2600,17 @@ void SPC7110Sram(uint8_t newstate)
 {
    if (newstate & 0x80)
    {
-      Memory.Map[6] = (uint8_t*)MAP_HIROM_SRAM;
-      Memory.Map[7] = (uint8_t*)MAP_HIROM_SRAM;
-      Memory.Map[0x306] = (uint8_t*)MAP_HIROM_SRAM;
-      Memory.Map[0x307] = (uint8_t*)MAP_HIROM_SRAM;
+      Memory.Map[6] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map[7] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map[0x306] = MAP_HIROM_SRAM_OR_NONE;
+      Memory.Map[0x307] = MAP_HIROM_SRAM_OR_NONE;
    }
    else
    {
-      Memory.Map[6] = (uint8_t*)MAP_RONLY_SRAM;
-      Memory.Map[7] = (uint8_t*)MAP_RONLY_SRAM;
-      Memory.Map[0x306] = (uint8_t*)MAP_RONLY_SRAM;
-      Memory.Map[0x307] = (uint8_t*)MAP_RONLY_SRAM;
+      Memory.Map[6] = MAP_RONLY_SRAM_OR_NONE;
+      Memory.Map[7] = MAP_RONLY_SRAM_OR_NONE;
+      Memory.Map[0x306] = MAP_RONLY_SRAM_OR_NONE;
+      Memory.Map[0x307] = MAP_RONLY_SRAM_OR_NONE;
    }
 }
 
@@ -2786,7 +2654,7 @@ const char* KartContents()
    static char tmp [30];
    static const char* CoPro [16] =
    {
-      "DSP1", "SuperFX", "OBC1", "SA-1", "S-DD1", "S-RTC", "CoPro#6",
+      "DSP", "SuperFX", "OBC1", "SA-1", "S-DD1", "S-RTC", "CoPro#6",
       "CoPro#7", "CoPro#8", "CoPro#9", "CoPro#10", "CoPro#11", "CoPro#12",
       "CoPro#13", "CoPro#14", "CoPro-Custom"
    };
@@ -2805,6 +2673,8 @@ const char* KartContents()
       sprintf(tmp, "%s+%s", tmp, "SPC7110+RTC");
    else if (Settings.SPC7110)
       sprintf(tmp, "%s+%s", tmp, "SPC7110");
+   else if(Settings.C4)
+      sprintf(tmp, "%s+%s", tmp, "C4");
    else if (Settings.SETA != 0)
    {
       switch (Settings.SETA)
@@ -2821,7 +2691,12 @@ const char* KartContents()
       }
    }
    else if ((Memory.ROMType & 0xf) >= 3)
-      sprintf(tmp, "%s+%s", tmp, CoPro [(Memory.ROMType & 0xf0) >> 4]);
+   {
+      if (Memory.ROMType & 0xf0)
+         sprintf(tmp, "%s+%s", tmp, CoPro [(Memory.ROMType & 0xf0) >> 4]);
+      else
+         sprintf(tmp, "%s+DSP%d", tmp, Settings.DSP == 0 ? 1 : Settings.DSP);
+   }
 
    return (tmp);
 }
@@ -2838,6 +2713,16 @@ const char* ROMID()
    return (Memory.ROMId);
 }
 
+bool match_na(const char* str)
+{
+   return (strcmp(Memory.ROMName, str) == 0);
+}
+
+bool match_id(const char* str)
+{
+   return (strncmp(Memory.ROMId, str, strlen(str)) == 0);
+}
+
 void ApplyROMFixes()
 {
    /*
@@ -2851,95 +2736,19 @@ void ApplyROMFixes()
    [14:25:27] <@Nach>     case 0x340f23e5: //Donkey Kong Country 3 (U) copier hack - handled
    */
 
-   //Ambiguous chip function pointer assignments
-
-   //DSP switching:
-   if (strncmp(Memory.ROMName, "DUNGEON MASTER", 14) == 0)
-   {
-      //Set DSP-2
-      SetDSP = &DSP2SetByte;
-      GetDSP = &DSP2GetByte;
-   }
-
-#ifdef DSP_DUMMY_LOOPS
-   if (strncmp(ROMName, "SD\x0b6\x0de\x0dd\x0c0\x0de\x0d1GX", 10) == 0)
-   {
-      //Set DSP-3
-      SetDSP = &DSP3SetByte;
-      GetDSP = &DSP3GetByte;
-   }
-#endif
-
-   if (strncmp(Memory.ROMName, "TOP GEAR 3000", 13) == 0
-         || strncmp(Memory.ROMName, "PLANETS CHAMP TG3000", 20) == 0)
-   {
-      //Set DSP-4
-      SetDSP = &DSP4SetByte;
-      GetDSP = &DSP4GetByte;
-   }
-
-   //memory map corrections
-   if (strncmp(Memory.ROMName, "XBAND", 5) == 0)
-   {
-      int32_t c;
-      for (c = 0xE00; c < 0xE10; c++)
-      {
-         Memory.Map [c] = (uint8_t*) MAP_LOROM_SRAM;
-         Memory.BlockIsRAM [c] = true;
-         Memory.BlockIsROM [c] = false;
-      }
-      WriteProtectROM();
-   }
-
    //not MAD-1 compliant
    if (strcmp(Memory.ROMName, "WANDERERS FROM YS") == 0)
    {
       int32_t c;
       for (c = 0; c < 0xE0; c++)
       {
-         Memory.Map[c + 0x700] = (uint8_t*)MAP_LOROM_SRAM;
+         Memory.Map[c + 0x700] = MAP_LOROM_SRAM_OR_NONE;
          Memory.BlockIsROM[c + 0x700] = false;
          Memory.BlockIsRAM[c + 0x700] = true;
       }
       WriteProtectROM();
    }
 
-   if (strcmp(Memory.ROMName, "GOGO ACKMAN3") == 0 ||
-         strcmp(Memory.ROMName, "HOME ALONE") == 0)
-   {
-      // Banks 00->3f and 80->bf
-      int32_t c;
-      for (c = 0; c < 0x400; c += 16)
-      {
-         Memory.Map [c + 6] = Memory.Map [c + 0x806] = Memory.SRAM;
-         Memory.Map [c + 7] = Memory.Map [c + 0x807] = Memory.SRAM;
-         Memory.BlockIsROM [c + 6] = Memory.BlockIsROM [c + 0x806] = false;
-         Memory.BlockIsROM [c + 7] = Memory.BlockIsROM [c + 0x807] = false;
-         Memory.BlockIsRAM [c + 6] = Memory.BlockIsRAM [c + 0x806] = true;
-         Memory.BlockIsRAM [c + 7] = Memory.BlockIsRAM [c + 0x807] = true;
-      }
-      WriteProtectROM();
-   }
-
-   if (strcmp(Memory.ROMName, "RADICAL DREAMERS") == 0 ||
-         strcmp(Memory.ROMName, "TREASURE CONFLIX") == 0)
-   {
-      int32_t c;
-
-      for (c = 0; c < 0x80; c++)
-      {
-         Memory.Map [c + 0x700] = Memory.ROM + 0x200000 + 0x1000 * (c & 0xf0);
-         Memory.BlockIsRAM [c + 0x700] = true;
-         Memory.BlockIsROM [c + 0x700] = false;
-      }
-      for (c = 0; c < 0x400; c += 16)
-      {
-         Memory.Map [c + 5] = Memory.Map [c + 0x805] = Memory.ROM + 0x300000;
-         Memory.BlockIsRAM [c + 5] = Memory.BlockIsRAM [c + 0x805] = true;
-      }
-      WriteProtectROM();
-   }
-
    if (strncmp(Memory.ROMName, "WAR 2410", 8) == 0)
    {
       Memory.Map [0x005] = (uint8_t*) Memory.RAM;
@@ -2947,13 +2756,6 @@ void ApplyROMFixes()
       Memory.BlockIsROM [0x005] = false;
    }
 
-   if (strcmp(Memory.ROMName, "BATMAN--REVENGE JOKER") == 0)
-   {
-      Memory.HiROM = false;
-      Memory.LoROM = true;
-      LoROMMap();
-   }
-
    //NMI hacks
    CPU.NMITriggerPoint = 4;
    if (strcmp(Memory.ROMName, "CACOMA KNIGHT") == 0)
@@ -2981,9 +2783,10 @@ void ApplyROMFixes()
          strncmp(Memory.ROMId, "JG", 2) == 0 ||
          strcmp(Memory.ROMName, "GAIA GENSOUKI 1 JPN") == 0)
       IAPU.OneCycle = 13;
-
+   else if (strcmp (Memory.ROMName, "UMIHARAKAWASE") == 0)
+      IAPU.OneCycle = 20;
    // RENDERING RANGER R2
-   if (strcmp(Memory.ROMId, "AVCJ") == 0 ||
+   else if (strcmp(Memory.ROMId, "AVCJ") == 0 ||
          //Mark Davis
          strncmp(Memory.ROMName, "THE FISHING MASTER", 18) == 0 || //needs >= actual APU timing. (21 is .002 Mhz slower)
          // Star Ocean
@@ -3036,8 +2839,8 @@ void ApplyROMFixes()
                          strcmp(Memory.ROMName, "DIRT RACER") == 0 ||
                          Settings.StarfoxHack;
 
-   if ((strcmp(Memory.ROMName, "LEGEND") == 0 && !Settings.PAL) ||
-         strcmp(Memory.ROMName, "King Arthurs World") == 0)
+   if((strcmp(Memory.ROMName, "LEGEND") == 0 && !Settings.PAL)||
+       strcmp(Memory.ROMName, "King Arthurs World") == 0)
       SNESGameFixes.EchoOnlyOutput = true;
 
    Settings.HBlankStart = (256 * Settings.H_Max) / SNES_HCOUNTER_MAX;
@@ -3050,8 +2853,7 @@ void ApplyROMFixes()
        strcmp(Memory.ROMName, "ZENKI TENCHIMEIDOU") == 0 ||
        strcmp(Memory.ROMName, "GANBA LEAGUE") == 0)
       SNESGameFixes.APU_OutPorts_ReturnValueFix = true;
-
-   if (strcmp(Memory.ROMName, "FURAI NO SIREN") == 0)
+   else if (strcmp(Memory.ROMName, "FURAI NO SIREN") == 0)
       SNESGameFixes.SoundEnvelopeHeightReading2 = true;
 
    //CPU timing hacks
@@ -3063,30 +2865,29 @@ void ApplyROMFixes()
          (strcmp(Memory.ROMName, "STONE PROTECTORS") == 0) ||
          (strcmp(Memory.ROMName, "SUPER BATTLETANK 2") == 0))
       Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 130) / 100;
-
-   if (strcmp(Memory.ROMName, "HOME IMPROVEMENT") == 0)
+   else if (strcmp(Memory.ROMName, "HOME IMPROVEMENT") == 0)
       Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 200) / 100;
-
-   if (strcmp(Memory.ROMId, "ASRJ") == 0 && Settings.CyclesPercentage == 100)
+   else if (strcmp(Memory.ROMId, "ASRJ") == 0 && Settings.CyclesPercentage == 100)
       // Street Racer
       Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 95) / 100;
-
    // Power Rangers Fight
-   if (strncmp(Memory.ROMId, "A3R", 3) == 0 ||
+   else if (strncmp(Memory.ROMId, "A3R", 3) == 0 ||
          // Clock Tower
          strncmp(Memory.ROMId, "AJE", 3) == 0)
       Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 103) / 100;
-
-   if (strncmp(Memory.ROMId, "A3M", 3) == 0 && Settings.CyclesPercentage == 100)
+   else if (strncmp(Memory.ROMId, "A3M", 3) == 0 && Settings.CyclesPercentage == 100)
       // Mortal Kombat 3. Fixes cut off speech sample
       Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 110) / 100;
-
-   if (strcmp(Memory.ROMName, "\x0bd\x0da\x0b2\x0d4\x0b0\x0bd\x0de") == 0 &&
+   else if (strcmp(Memory.ROMName, "\x0bd\x0da\x0b2\x0d4\x0b0\x0bd\x0de") == 0 &&
          Settings.CyclesPercentage == 100)
       Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 101) / 100;
-
+   else if (strcmp(Memory.ROMName, "WILD TRAX") == 0 ||
+         strcmp(Memory.ROMName, "STAR FOX 2") == 0 ||
+         strcmp(Memory.ROMName, "YOSSY'S ISLAND") == 0 ||
+         strcmp(Memory.ROMName, "YOSHI'S ISLAND") == 0)
+      CPU.TriedInterleavedMode2 = true;
    // Start Trek: Deep Sleep 9
-   if (strncmp(Memory.ROMId, "A9D", 3) == 0 && Settings.CyclesPercentage == 100)
+   else if (strncmp(Memory.ROMId, "A9D", 3) == 0 && Settings.CyclesPercentage == 100)
       Settings.H_Max = (SNES_CYCLES_PER_SCANLINE * 110) / 100;
 
    //SA-1 Speedup settings
@@ -3094,162 +2895,180 @@ void ApplyROMFixes()
    SA1.WaitByteAddress1 = NULL;
    SA1.WaitByteAddress2 = NULL;
 
-   /* Bass Fishing */
-   if (strcmp(Memory.ROMId, "ZBPJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x0093f1 >> MEMMAP_SHIFT] + 0x93f1;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x304a;
-   }
-   /* DAISENRYAKU EXPERTWW2 */
-   if (strcmp(Memory.ROMId, "AEVJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x0ed18d >> MEMMAP_SHIFT] + 0xd18d;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x3000;
-   }
-   /* debjk2 */
-   if (strcmp(Memory.ROMId, "A2DJ") == 0)
-      SA1.WaitAddress = SA1.Map [0x008b62 >> MEMMAP_SHIFT] + 0x8b62;
-   /* Dragon Ballz HD */
-   if (strcmp(Memory.ROMId, "AZIJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x008083 >> MEMMAP_SHIFT] + 0x8083;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x3020;
-   }
-   /* SFC SDGUNDAMGNEXT */
-   if (strcmp(Memory.ROMId, "ZX3J") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x0087f2 >> MEMMAP_SHIFT] + 0x87f2;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x30c4;
-   }
-   /* ShougiNoHanamichi */
-   if (strcmp(Memory.ROMId, "AARJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0xc1f85a >> MEMMAP_SHIFT] + 0xf85a;
-      SA1.WaitByteAddress1 = Memory.SRAM + 0x0c64;
-      SA1.WaitByteAddress2 = Memory.SRAM + 0x0c66;
-   }
-   /* KATO HIFUMI9DAN SYOGI */
-   if (strcmp(Memory.ROMId, "A23J") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0xc25037 >> MEMMAP_SHIFT] + 0x5037;
-      SA1.WaitByteAddress1 = Memory.SRAM + 0x0c06;
-      SA1.WaitByteAddress2 = Memory.SRAM + 0x0c08;
-   }
-   /* idaten */
-   if (strcmp(Memory.ROMId, "AIIJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0xc100be >> MEMMAP_SHIFT] + 0x00be;
-      SA1.WaitByteAddress1 = Memory.SRAM + 0x1002;
-      SA1.WaitByteAddress2 = Memory.SRAM + 0x1004;
-   }
-   /* igotais */
-   if (strcmp(Memory.ROMId, "AITJ") == 0)
-      SA1.WaitAddress = SA1.Map [0x0080b7 >> MEMMAP_SHIFT] + 0x80b7;
-   /* J96 DREAM STADIUM */
-   if (strcmp(Memory.ROMId, "AJ6J") == 0)
-      SA1.WaitAddress = SA1.Map [0xc0f74a >> MEMMAP_SHIFT] + 0xf74a;
-   /* JumpinDerby */
-   if (strcmp(Memory.ROMId, "AJUJ") == 0)
-      SA1.WaitAddress = SA1.Map [0x00d926 >> MEMMAP_SHIFT] + 0xd926;
-   /* JKAKINOKI SHOUGI */
-   if (strcmp(Memory.ROMId, "AKAJ") == 0)
-      SA1.WaitAddress = SA1.Map [0x00f070 >> MEMMAP_SHIFT] + 0xf070;
-   /* HOSHI NO KIRBY 3 & KIRBY'S DREAM LAND 3 JAP & US */
-   if (strcmp(Memory.ROMId, "AFJJ") == 0 || strcmp(Memory.ROMId, "AFJE") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x0082d4 >> MEMMAP_SHIFT] + 0x82d4;
-      SA1.WaitByteAddress1 = Memory.SRAM + 0x72a4;
-   }
-   /* KIRBY SUPER DELUXE JAP */
-   if (strcmp(Memory.ROMId, "AKFJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x008c93 >> MEMMAP_SHIFT] + 0x8c93;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x300a;
-      SA1.WaitByteAddress2 = Memory.FillRAM + 0x300e;
-   }
-   /* KIRBY SUPER DELUXE US */
-   if (strcmp(Memory.ROMId, "AKFE") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x008cb8 >> MEMMAP_SHIFT] + 0x8cb8;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x300a;
-      SA1.WaitByteAddress2 = Memory.FillRAM + 0x300e;
-   }
-   /* SUPER MARIO RPG JAP & US */
-   if (strcmp(Memory.ROMId, "ARWJ") == 0 || strcmp(Memory.ROMId, "ARWE") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0xc0816f >> MEMMAP_SHIFT] + 0x816f;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x3000;
-   }
-   /* marvelous.zip */
-   if (strcmp(Memory.ROMId, "AVRJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x0085f2 >> MEMMAP_SHIFT] + 0x85f2;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x3024;
-   }
-   /* AUGUSTA3 MASTERS NEW */
-   if (strcmp(Memory.ROMId, "AO3J") == 0)
+   if (Settings.SA1)
    {
-      SA1.WaitAddress = SA1.Map [0x00dddb >> MEMMAP_SHIFT] + 0xdddb;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x37b4;
-   }
-   /* OSHABERI PARODIUS */
-   if (strcmp(Memory.ROMId, "AJOJ") == 0)
-      SA1.WaitAddress = SA1.Map [0x8084e5 >> MEMMAP_SHIFT] + 0x84e5;
-   /* PANIC BOMBER WORLD */
-   if (strcmp(Memory.ROMId, "APBJ") == 0)
-      SA1.WaitAddress = SA1.Map [0x00857a >> MEMMAP_SHIFT] + 0x857a;
-   /* PEBBLE BEACH NEW */
-   if (strcmp(Memory.ROMId, "AONJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x00df33 >> MEMMAP_SHIFT] + 0xdf33;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x37b4;
-   }
-   /* PGA EUROPEAN TOUR */
-   if (strcmp(Memory.ROMId, "AEPE") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x003700 >> MEMMAP_SHIFT] + 0x3700;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x3102;
-   }
-   /* PGA TOUR 96 */
-   if (strcmp(Memory.ROMId, "A3GE") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x003700 >> MEMMAP_SHIFT] + 0x3700;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x3102;
-   }
-   /* POWER RANGERS 4 */
-   if (strcmp(Memory.ROMId, "A4RE") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x009899 >> MEMMAP_SHIFT] + 0x9899;
-      SA1.WaitByteAddress1 = Memory.FillRAM + 0x3000;
-   }
-   /* SD F1 GRAND PRIX */
-   if (strcmp(Memory.ROMId, "AGFJ") == 0)
-      SA1.WaitAddress = SA1.Map [0x0181bc >> MEMMAP_SHIFT] + 0x81bc;
-   /* SHOUGI MARJONG */
-   if (strcmp(Memory.ROMId, "ASYJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0x00f2cc >> MEMMAP_SHIFT] + 0xf2cc;
-      SA1.WaitByteAddress1 = Memory.SRAM + 0x7ffe;
-      SA1.WaitByteAddress2 = Memory.SRAM + 0x7ffc;
-   }
-   /* shogisai2 */
-   if (strcmp(Memory.ROMId, "AX2J") == 0)
-      SA1.WaitAddress = SA1.Map [0x00d675 >> MEMMAP_SHIFT] + 0xd675;
-   /* SHINING SCORPION */
-   if (strcmp(Memory.ROMId, "A4WJ") == 0)
-      SA1.WaitAddress = SA1.Map [0xc048be >> MEMMAP_SHIFT] + 0x48be;
-   /* SHIN SHOUGI CLUB */
-   if (strcmp(Memory.ROMId, "AHJJ") == 0)
-   {
-      SA1.WaitAddress = SA1.Map [0xc1002a >> MEMMAP_SHIFT] + 0x002a;
-      SA1.WaitByteAddress1 = Memory.SRAM + 0x0806;
-      SA1.WaitByteAddress2 = Memory.SRAM + 0x0808;
+      /* Itoi Shigesato no Bass Tsuri No.1 (J) */
+      if (match_id("ZBPJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x0093f1 >> MEMMAP_SHIFT] + 0x93f1;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x304a;
+      }
+      /* Daisenryaku Expert WWII (J) */
+      else if (match_id("AEVJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x0ed18d >> MEMMAP_SHIFT] + 0xd18d;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3000;
+      }
+      /* Derby Jockey 2 (J) */
+      else if (match_id("A2DJ"))
+         SA1.WaitAddress = SA1.Map [0x008b62 >> MEMMAP_SHIFT] + 0x8b62;
+      /* Dragon Ball Z - Hyper Dimension (J) */
+      else if (match_id("AZIJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x008083 >> MEMMAP_SHIFT] + 0x8083;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3020;
+      }
+      /* SD Gundam G NEXT (J) */
+      else if (match_id("ZX3J"))
+      {
+         SA1.WaitAddress = SA1.Map [0x0087f2 >> MEMMAP_SHIFT] + 0x87f2;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x30c4;
+      }
+      /* Shougi no Hanamichi (J) */
+      else if (match_id("AARJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0xc1f85a >> MEMMAP_SHIFT] + 0xf85a;
+         SA1.WaitByteAddress1 = Memory.SRAM + 0x0c64;
+         SA1.WaitByteAddress2 = Memory.SRAM + 0x0c66;
+      }
+      /* Asahi Shinbun Rensai Katou Hifumi Kudan Shougi Shingiryu (J) */
+      if (match_id("A23J"))
+      {
+         SA1.WaitAddress = SA1.Map [0xc25037 >> MEMMAP_SHIFT] + 0x5037;
+         SA1.WaitByteAddress1 = Memory.SRAM + 0x0c06;
+         SA1.WaitByteAddress2 = Memory.SRAM + 0x0c08;
+      }
+      /* Taikyoku Igo - Idaten (J) */
+      else if (match_id("AIIJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0xc100be >> MEMMAP_SHIFT] + 0x00be;
+         SA1.WaitByteAddress1 = Memory.SRAM + 0x1002;
+         SA1.WaitByteAddress2 = Memory.SRAM + 0x1004;
+      }
+      /* Takemiya Masaki Kudan no Igo Taishou (J) */
+      else if (match_id("AITJ"))
+         SA1.WaitAddress = SA1.Map [0x0080b7 >> MEMMAP_SHIFT] + 0x80b7;
+      /* J. League '96 Dream Stadium (J) */
+      else if (match_id("AJ6J"))
+         SA1.WaitAddress = SA1.Map [0xc0f74a >> MEMMAP_SHIFT] + 0xf74a;
+      /* Jumpin' Derby (J) */
+      else if (match_id("AJUJ"))
+         SA1.WaitAddress = SA1.Map [0x00d926 >> MEMMAP_SHIFT] + 0xd926;
+      /* Kakinoki Shougi (J) */
+      else if (match_id("AKAJ"))
+         SA1.WaitAddress = SA1.Map [0x00f070 >> MEMMAP_SHIFT] + 0xf070;
+      /* Hoshi no Kirby 3 (J), Kirby's Dream Land 3 (U) */
+      else if (match_id("AFJJ") || match_id("AFJE"))
+      {
+         SA1.WaitAddress = SA1.Map [0x0082d4 >> MEMMAP_SHIFT] + 0x82d4;
+         SA1.WaitByteAddress1 = Memory.SRAM + 0x72a4;
+      }
+      /* Hoshi no Kirby - Super Deluxe (J) */
+      else if (match_id("AKFJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x008c93 >> MEMMAP_SHIFT] + 0x8c93;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x300a;
+         SA1.WaitByteAddress2 = Memory.FillRAM + 0x300e;
+      }
+      /* Kirby Super Star (U) */
+      else if (match_id("AKFE"))
+      {
+         SA1.WaitAddress = SA1.Map [0x008cb8 >> MEMMAP_SHIFT] + 0x8cb8;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x300a;
+         SA1.WaitByteAddress2 = Memory.FillRAM + 0x300e;
+      }
+      /* Super Mario RPG (J), (U) */
+      else if (match_id("ARWJ") || match_id("ARWE"))
+      {
+         SA1.WaitAddress = SA1.Map [0xc0816f >> MEMMAP_SHIFT] + 0x816f;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3000;
+      }
+      /* Marvelous (J) */
+      else if (match_id("AVRJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x0085f2 >> MEMMAP_SHIFT] + 0x85f2;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3024;
+      }
+      /* Harukanaru Augusta 3 - Masters New (J) */
+      else if (match_id("AO3J"))
+      {
+         SA1.WaitAddress = SA1.Map [0x00dddb >> MEMMAP_SHIFT] + 0xdddb;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x37b4;
+      }
+      /* Jikkyou Oshaberi Parodius (J) */
+      else if (match_id("AJOJ"))
+         SA1.WaitAddress = SA1.Map [0x8084e5 >> MEMMAP_SHIFT] + 0x84e5;
+      /* Super Bomberman - Panic Bomber W (J) */
+      else if (match_id("APBJ"))
+         SA1.WaitAddress = SA1.Map [0x00857a >> MEMMAP_SHIFT] + 0x857a;
+      /* Pebble Beach no Hatou New - Tournament Edition (J) */
+      else if (match_id("AONJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x00df33 >> MEMMAP_SHIFT] + 0xdf33;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x37b4;
+      }
+      /* PGA European Tour (U) */
+      else if (match_id("AEPE"))
+      {
+         SA1.WaitAddress = SA1.Map [0x003700 >> MEMMAP_SHIFT] + 0x3700;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3102;
+      }
+      /* PGA Tour 96 (U) */
+      else if (match_id("A3GE"))
+      {
+         SA1.WaitAddress = SA1.Map [0x003700 >> MEMMAP_SHIFT] + 0x3700;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3102;
+      }
+      /* Power Rangers Zeo - Battle Racers (U) */
+      else if (match_id("A4RE"))
+      {
+         SA1.WaitAddress = SA1.Map [0x009899 >> MEMMAP_SHIFT] + 0x9899;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3000;
+      }
+      /* SD F-1 Grand Prix (J) */
+      else if (match_id("AGFJ"))
+         SA1.WaitAddress = SA1.Map [0x0181bc >> MEMMAP_SHIFT] + 0x81bc;
+      /* Saikousoku Shikou Shougi Mahjong (J) */
+      else if (match_id("ASYJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x00f2cc >> MEMMAP_SHIFT] + 0xf2cc;
+         SA1.WaitByteAddress1 = Memory.SRAM + 0x7ffe;
+         SA1.WaitByteAddress2 = Memory.SRAM + 0x7ffc;
+      }
+      /* Shougi Saikyou II (J) */
+      else if (match_id("AX2J"))
+         SA1.WaitAddress = SA1.Map [0x00d675 >> MEMMAP_SHIFT] + 0xd675;
+      /* Mini Yonku Shining Scorpion - Let's & Go!! (J) */
+      else if (match_id("A4WJ"))
+         SA1.WaitAddress = SA1.Map [0xc048be >> MEMMAP_SHIFT] + 0x48be;
+      /* Shin Shougi Club (J) */
+      else if (match_id("AHJJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0xc1002a >> MEMMAP_SHIFT] + 0x002a;
+         SA1.WaitByteAddress1 = Memory.SRAM + 0x0806;
+         SA1.WaitByteAddress2 = Memory.SRAM + 0x0808;
+      }
+      /* ｼｮｳｷﾞｻｲｷｮｳ */
+      else if (match_id("AMSJ"))
+         SA1.WaitAddress = SA1.Map [0x00CD6A >> MEMMAP_SHIFT] + 0xCD6A;
+      /* ﾊﾌﾞﾒｲｼﾞﾝﾉｵﾓｼﾛｼｮｳｷﾞ */
+      else if (match_id("IL"))
+         SA1.WaitAddress = SA1.Map [0x008549 >> MEMMAP_SHIFT] + 0x8549;
+      /* MASOUKISHIN */
+      else if (match_id("ALXJ"))
+      {
+         SA1.WaitAddress = SA1.Map [0x00EC9C >> MEMMAP_SHIFT] + 0xEC9C;
+         SA1.WaitByteAddress1 = Memory.FillRAM + 0x3072;
+      }
+      /* SUPER SHOGI3 */
+      else if (match_id("A3IJ"))
+         SA1.WaitAddress = SA1.Map [0x00F669 >> MEMMAP_SHIFT] + 0xF669;
    }
 
    //Other
 
    // Additional game fixes by sanmaiwashi ...
-   //Gundam Knight Story
+   // Gundam Knight Story
    if (strcmp(Memory.ROMName, "SFX \xC5\xB2\xC4\xB6\xDE\xDD\xC0\xDE\xD1\xD3\xC9\xB6\xDE\xC0\xD8 1") == 0)
    {
       bytes0x2000 [0xb18] = 0x4c;
@@ -3258,135 +3077,149 @@ void ApplyROMFixes()
       SNESGameFixes.SRAMInitialValue = 0x6b;
    }
 
-   // HITOMI3
-   if (strcmp(Memory.ROMName, "HITOMI3") == 0)
-   {
-      Memory.SRAMSize = 1;
-      Memory.SRAMMask = Memory.SRAMSize ? ((1 << (Memory.SRAMSize + 3)) * 128) - 1 : 0;
-   }
-
    //sram value fixes
    if (strcmp(Memory.ROMName, "SUPER DRIFT OUT") == 0 ||
          strcmp(Memory.ROMName, "SATAN IS OUR FATHER!") == 0 ||
          strcmp(Memory.ROMName, "goemon 4") == 0)
       SNESGameFixes.SRAMInitialValue = 0x00;
 
-#define RomPatch(adr,ov,nv) \
-   if (Memory.ROM [adr] == ov) \
-    Memory.ROM [adr] = nv
-
-   // Love Quest
-   if (strcmp(Memory.ROMName, "LOVE QUEST") == 0)
-   {
-      RomPatch(0x1385ec, 0xd0, 0xea);
-      RomPatch(0x1385ed, 0xb2, 0xea);
-   }
-   //BNE D0 into nops
-
-   //seems like the next instruction is a BRA
-   //otherwise, this one's too complex for MKendora
-   // Nangoku Syonen Papuwa Kun
-   if (strcmp(Memory.ROMName, "NANGOKUSYONEN PAPUWA") == 0)
-      RomPatch(0x1f0d1, 0xa0, 0x6b);
-   //turns an LDY into an RTL?
-
-   //this is a cmp on $00:2140
-   // Super Batter Up
-   if (strcmp(Memory.ROMName, "Super Batter Up") == 0)
-   {
-      RomPatch(0x27ae0, 0xd0, 0xea);
-      RomPatch(0x27ae1, 0xfa, 0xea);
-   }
-   //BNE
+   if(Settings.BS && Memory.LoROM &&
+      strcmp(Memory.ROMName, "F-ZERO") == 0 &&
+      Memory.ROMChecksum == 0xb10d &&
+      Memory.ROMComplementChecksum == 0x4ef2)
+     Memory.ROM[0x7fd0] = 0xFF; // fix memory pack position bits
 }
 
-int32_t is_bsx(uint8_t* p)
+// 7FC0h or FFC0h
+//
+// FFC0h - FFCFh: CartName
+// FFD0h        : Memory pack location
+// FFD1h - FFD5 : 00:00:00:00:00 (??)
+// FFD6h        : Month 10h, 20h, 30h...
+// FFD7h        : Day   This byte / 8  low 3bits is unknown.
+// FFD8h        : ROMSpeed
+// FFD9h        : Satellaview ROM Type
+// FFDAh        : Maker ID
+// FFDBh        : ROM Version
+
+static bool is_bsx(uint8_t *p) // p == "0xFFC0" or "0x7FC0" ROM offset pointer
 {
    uint32_t c;
+   int32_t i;
+   bool b = false;
+   bool bb = false;
 
+   // Satellaview ROM Type
    if (p[0x19] & 0x4f)
-      goto notbsx;
+      return false;
+
+   // Maker ID
    c = p[0x1a];
    if ((c != 0x33) && (c != 0xff))   // 0x33 = Manufacturer: Nintendo
-      goto notbsx;
+      return false;
+
+   // Month, Day
    c = (p[0x17] << 8) | p[0x16];
    if ((c != 0x0000) && (c != 0xffff))
    {
       if ((c & 0x040f) != 0)
-         goto notbsx;
+         return false;
       if ((c & 0xff) > 0xc0)
-         goto notbsx;
+         return false;
    }
+
+   // ROMSpeed
    c = p[0x18];
    if ((c & 0xce) || ((c & 0x30) == 0))
-      goto notbsx;
+      return false;
+
+   // Memory pack location
+   if(p[0x10] == 0)
+      return false;
+
+   for(i = 0; i < 8; i++)
+   {
+      if(p[0x10] & (1 << i))
+      {
+         if(bb)
+            return false;
+         else
+            b = true;
+      }
+      else if(b)
+         bb = true;
+   }
+
    if ((p[0x15] & 0x03) != 0)
-      goto notbsx;
+      return false;
    c = p[0x13];
    if ((c != 0x00) && (c != 0xff))
-      goto notbsx;
+      return false;
    if (p[0x14] != 0x00)
-      goto notbsx;
-   if (bs_name(p) != 0)
-      goto notbsx;
-   return 0; // It's a Satellaview ROM!
-notbsx:
-   return -1;
+      return false;
+   return bs_name(p);
 }
 
-int32_t bs_name(uint8_t* p)
+static bool bs_name(uint8_t* p)
 {
-   uint32_t c;
    int32_t lcount;
-   int32_t numv; // number of valid name characters seen so far
-   numv = 0;
-   for (lcount = 16; lcount > 0; lcount--)
+   for(lcount = 16; lcount > 0; lcount--)
    {
-      if (check_char(c = *p++) != 0)
+      //null strings
+      if(*p == 0)
       {
-         c = *p++;
-         if (c < 0x20)
+         if(lcount != 16)
+            p++;
+         else
+            return false;
+      }
+      //SJIS single byte char
+      else if((*p >= 0x20 && *p <= 0x7f) ||
+              (*p >= 0xa0 && *p <= 0xdf))
+         p++;
+      //SJIS multi byte char
+      else if(lcount >= 2)
+      {
+         if(((*p >= 0x81 && *p <= 0x9f) ||
+            (*p >= 0xe0 && *p <= 0xfc)) &&
+            ((*(p + 1) >= 0x40 && *(p + 1) <= 0x7e) ||
+            (*(p + 1) >= 0x80 && *(p + 1) <= 0xfc)))
          {
-            if ((numv != 0x0b) || (c != 0))   // Dr. Mario Hack
-               goto notBsName;
+            p += 2;
+            lcount--;
          }
-
-         numv++;
-         lcount--;
-         continue;
+         else
+            return false;
       }
       else
-      {
-         if (c == 0)
-         {
-            if (numv == 0)
-               goto notBsName;
-            continue;
-         }
-
-         if (c < 0x20)
-            goto notBsName;
-         if (c >= 0x80)
-         {
-            if ((c < 0xa0) || (c >= 0xf0))
-               goto notBsName;
-         }
-         numv++;
-      }
+         return false;
    }
-   if (numv > 0)
-      return 0;
-notBsName:
-   return -1;
+   return true;
 }
 
 void ParseSNESHeader(uint8_t* RomHeader)
 {
-   Memory.SRAMSize = RomHeader [0x28];
-   strncpy(Memory.ROMName, (char*) &RomHeader[0x10], ROM_NAME_LEN - 1);
-   Memory.ROMSpeed = RomHeader [0x25];
-   Memory.ROMType = RomHeader [0x26];
-   Memory.ROMSize = RomHeader [0x27];
+   if(Settings.BS)
+   {
+      Memory.SRAMSize = 0x05;
+      strncpy(Memory.ROMName, (char *) &RomHeader[0x10], 17);
+      memset(&Memory.ROMName[0x11], 0, ROM_NAME_LEN - 1 - 17);
+      Memory.ROMSpeed = RomHeader [0x28];
+      Memory.ROMType = 0xe5;
+      Memory.ROMSize = 1;
+
+      uint32_t size_count;
+      for(size_count = 0x800; size_count < Memory.CalculatedSize; size_count <<= 1, ++Memory.ROMSize);
+   }
+   else
+   {
+      Memory.SRAMSize = RomHeader [0x28];
+      strncpy(Memory.ROMName, (char*) &RomHeader[0x10], ROM_NAME_LEN - 1);
+      Memory.ROMSpeed = RomHeader [0x25];
+      Memory.ROMType = RomHeader [0x26];
+      Memory.ROMSize = RomHeader [0x27];
+   }
+
    Memory.ROMChecksum = RomHeader [0x2e] + (RomHeader [0x2f] << 8);
    Memory.ROMComplementChecksum = RomHeader [0x2c] + (RomHeader [0x2d] << 8);
    Memory.ROMRegion = RomHeader[0x29];
diff --git a/source/memmap.h b/source/memmap.h
index 3a77033..3cf0138 100644
--- a/source/memmap.h
+++ b/source/memmap.h
@@ -55,10 +55,10 @@ bool LoadROM(const struct retro_game_info* game);
 #else
 bool LoadROM(const char*);
 #endif
-void  InitROM(bool);
+void InitROM(bool);
 bool S9xInitMemory();
-void  S9xDeinitMemory();
-void  FreeSDD1Data();
+void S9xDeinitMemory();
+void FreeSDD1Data();
 
 void WriteProtectROM();
 void FixROMSpeed();
@@ -70,6 +70,7 @@ void JumboLoROMMap(bool);
 void LoROMMap();
 void LoROM24MBSMap();
 void SRAM512KLoROMMap();
+void SRAM1024KLoROMMap();
 void SufamiTurboLoROMMap();
 void HiROMMap();
 void SuperFXROMMap();
@@ -81,6 +82,8 @@ void SPC7110HiROMMap();
 void SPC7110Sram(uint8_t);
 void SetaDSPMap();
 void ApplyROMFixes();
+void DSPMap();
+void CapcomProtectLoROMMap();
 
 const char* TVStandard();
 const char* Speed();
@@ -93,6 +96,7 @@ const char* Headers();
 const char* ROMID();
 const char* CompanyID();
 void ParseSNESHeader(uint8_t*);
+
 enum
 {
    MAP_PPU, MAP_CPU, MAP_DSP, MAP_LOROM_SRAM, MAP_HIROM_SRAM,
@@ -100,7 +104,17 @@ enum
    MAP_BWRAM_BITMAP2, MAP_SA1RAM, MAP_SPC7110_ROM, MAP_SPC7110_DRAM,
    MAP_RONLY_SRAM, MAP_OBC_RAM, MAP_SETA_DSP, MAP_SETA_RISC, MAP_LAST
 };
-enum { MAX_ROM_SIZE = 0x800000 };
+
+enum {
+   MAX_ROM_SIZE = 0x800000
+};
+
+enum
+{
+   MAP_TYPE_I_O,
+   MAP_TYPE_ROM,
+   MAP_TYPE_RAM
+};
 
 typedef struct
 {
diff --git a/source/snes9x.h b/source/snes9x.h
index a3b6c98..9d7019c 100644
--- a/source/snes9x.h
+++ b/source/snes9x.h
@@ -205,6 +205,7 @@ typedef struct
    bool    SPC7110;
    bool    SPC7110RTC;
    bool    OBC1;
+   uint8_t DSP;
    /* Sound options */
    uint32_t SoundPlaybackRate;
 #ifdef USE_BLARGG_APU